CN113806123B - Server downtime positioning system and method and server - Google Patents
Server downtime positioning system and method and server Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/079—Root cause analysis, i.e. error or fault diagnosis
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- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3041—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is an input/output interface
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
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- G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
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Abstract
The invention discloses a downtime positioning system and method of a server and the server, wherein the system comprises: a south bridge chip; a complex programmable logic device connected with the south bridge chip; a micro control unit connected with the complex programmable logic device; a south bridge chip flash memory connected with the micro control unit; the complex programmable logic device is configured to receive the SPI clock signal and the data sent by the south bridge chip, analyze the clock signal and the data, and compare the analyzed data with the received data read by the micro control unit from the south bridge chip flash memory after the data stops being transmitted, so as to find the stopping position of SPI data transmission when the server is down. According to the scheme provided by the invention, the SPI stopping position is rapidly positioned, and the working efficiency and the fault checking efficiency are improved.
Description
Technical Field
The present invention relates to the field of server technologies, and in particular, to a system and a method for locating downtime of a server, and a server.
Background
In the times of cloud computing and big data, massive data needs to be stored and computed, and the deployment density of servers of a data center is increased. In the era of sudden increase in data volume, data are stored and calculated in a classified manner at any moment, and thus requirements on long-term stability and reliability of a data center server are increasingly high. Although the stability of the server is generally higher, as the service time of the server becomes longer, the failure rate of the server inevitably increases, and the SPI (Serial Peripheral Interface ) is an important data transmission bus essential in the server system, which is a high-speed, full-duplex, synchronous communication bus. The POST phase of the server, i.e. the process from power-up to power-on of the server, is the period during which the SPI is communicating. When the POST phase downtime problem of the server occurs, a great deal of time is usually spent on checking the problem, and when the server is abnormal in data transmission in a customer data center room, the fault cause usually has a certain correlation with the current use environment of the customer and the running service, and the fault usually does not occur stably, so that higher requirements are put forward on the accuracy of fault judgment and processing. The fault judgment is usually based on LOGs recorded by the BIOS serial ports LOG and BMC, but the problem that the data analysis of the server POST phase downtime problem has large data quantity, the probability problem cannot be reproduced quickly and the like, so that the analysis range of the fault is enlarged, and more inconvenience is brought to the fault judgment.
Disclosure of Invention
In view of the above, the invention provides a downtime positioning system, a method and a server of a server, which solve the problems that when the server is downtime in the POST stage, only BIOS serial port information and BMC logs can be read as debug information collection means, SPI stopping positions cannot be directly checked, the reproduction time is long, the data volume is large, the problem positioning efficiency is low and the like.
Based on the above objects, an aspect of the embodiments of the present invention provides a downtime positioning system of a server, which specifically includes:
a south bridge chip;
a complex programmable logic device connected with the south bridge chip;
a micro control unit connected with the complex programmable logic device;
a south bridge chip flash memory connected with the micro control unit;
the complex programmable logic device is configured to receive the SPI clock signal and the data sent by the south bridge chip, analyze the clock signal and the data, and compare the analyzed data with the received data read by the micro control unit from the south bridge chip flash memory after the data stops being transmitted, so as to find the stopping position of SPI data transmission when the server is down.
In some embodiments, the complex programmable logic device includes a data parsing module configured to parse the clock signal and the data to generate parsed data;
the complex programmable logic device is configured to send the received clock signal and the data to the data analysis module for analysis and to delay the clock signal for a preset time before sending to the micro control unit.
In some embodiments, the micro-control unit comprises a memory;
the micro control unit is configured to receive the clock signal sent by the complex programmable logic device in a delayed manner for the preset time, read data from the south bridge chip flash memory and store the data into the memory.
In some embodiments, the data parsing module is further configured to add a timestamp to the parsed data;
the micro control unit is further configured to add a time stamp to the data.
In some embodiments, the complex programmable logic device further comprises: the data comparison module is connected with the data analysis module;
the complex programmable logic device is further configured to send a watchdog signal to the data comparison module and a watchdog signal delayed by the preset time to the micro control unit in response to the data parsing module stopping parsing data;
the data comparison module is configured to capture time-stamped parsed data from the data parsing module in response to receiving the watchdog signal.
In some embodiments, the micro control unit is further configured to stop reading data from the south bridge chip flash memory and send the time stamped data that has been read to the data comparison module in response to receiving a delayed watchdog signal;
the data comparison module is further configured to compare the time-stamped data with the time-stamped analysis data after receiving the time-stamped data sent by the micro control unit, so as to find a stop position of SPI data transmission when the server is down.
In some embodiments, the system further comprises a data kinescope;
the data comparison module is further configured to send the stopping position of the analysis data to the data kinescope for display based on the stopping position.
In some embodiments, sending the stopping position of the resolved data to the data kinescope for display comprises:
and converting the stopping position of the analysis data into seven-segment nixie tube format data, and sending the seven-segment nixie tube format data to the data kinescope for display.
In another aspect of the embodiment of the present invention, there is also provided a downtime positioning method of a server, including:
analyzing the received SPI clock signal and data sent by the south bridge chip through a complex programmable logic device, delaying the clock signal for a preset time and then sending the delayed clock signal to a micro control unit;
receiving the delayed clock signal through the micro control unit, and reading data from the south bridge chip flash memory and storing the data;
transmitting a delayed watchdog signal to the micro-control unit through the complex programmable logic device in response to the data stopping transmission;
the micro control unit receives the delayed watchdog signal, stops reading data, and sends the read data to the complex programmable logic device;
and comparing the data with the analyzed data through the complex programmable logic device to find the stopping position of SPI data transmission when the server is down.
In another aspect of the embodiment of the invention, a server is also provided, including the downtime positioning system as described above.
The invention has the following beneficial technical effects: the CPLD and the micro control unit monitor and analyze the SPI actual transmission state, so that the SPI stopping position is rapidly positioned, a visual debug problem positioning mode is provided, and the working efficiency and the fault checking efficiency are improved.
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In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are necessary for the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention and that other embodiments may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an embodiment of a downtime positioning system of a server according to the present invention;
FIG. 2 is a schematic diagram illustrating a downtime positioning system of a server according to another embodiment of the present invention;
FIG. 3 is a block diagram of an embodiment of a method for downtime of a server according to the present invention;
fig. 4 is a schematic structural diagram of an embodiment of a server according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
It should be noted that, in the embodiments of the present invention, all the expressions "first" and "second" are used to distinguish two entities with the same name but different entities or different parameters, and it is noted that the "first" and "second" are only used for convenience of expression, and should not be construed as limiting the embodiments of the present invention, and the following embodiments are not described one by one.
Based on the above objects, in a first aspect of the embodiments of the present invention, an embodiment of a downtime positioning system of a server is provided. As shown in fig. 1, includes:
a south bridge chip 100;
a complex programmable logic device 200 connected to the south bridge chip 100;
a micro control unit 300 connected to the complex programmable logic device 200;
a south bridge chip flash memory 400 connected to the micro control unit 300;
the complex programmable logic device 200 is configured to receive the SPI clock signal and the data sent by the south bridge chip 100, analyze the clock signal and the data, and compare the analyzed data with the received data read from the south bridge chip flash memory 400 by the micro control unit 300 after the data stops being transmitted, so as to find the stop position of the SPI data transmission when the server is down.
The CPLD and the micro control unit monitor and analyze the SPI actual transmission state, so that the SPI stopping position is rapidly positioned, and the working efficiency and the fault checking efficiency are improved.
In some embodiments, the complex programmable logic device includes a data parsing module configured to parse the clock signal and the data to generate parsed data, and the complex programmable logic device is configured to send the received clock signal and the data to the data parsing module for parsing and to delay the clock signal for a preset time before sending to the micro control unit.
In some embodiments, the micro-control unit comprises a memory;
the micro control unit is configured to receive the clock signal sent by the complex programmable logic device in a delayed manner for the preset time, read data from the south bridge chip flash memory and store the data into the memory.
In some embodiments, the data parsing module is further configured to add a timestamp to the parsed data;
the micro control unit is further configured to add a time stamp to the data.
In some embodiments, the complex programmable logic device further comprises: the data comparison module is connected with the data analysis module;
the complex programmable logic device is further configured to send a watchdog signal to the data comparison module and a watchdog signal delayed by the preset time to the micro control unit in response to the data parsing module stopping parsing data;
the data comparison module is configured to capture time-stamped parsed data from the data parsing module in response to receiving the watchdog signal.
In some embodiments, the micro control unit is further configured to stop reading data from the south bridge chip flash memory and send the time stamped data that has been read to the data comparison module in response to receiving a delayed watchdog signal;
the data comparison module is further configured to compare the time-stamped data with the time-stamped analysis data after receiving the time-stamped data sent by the micro control unit, so as to find a stop position of SPI data transmission when the server is down.
In some embodiments, the system further comprises a data kinescope;
the data comparison module is further configured to send the stopping position of the analysis data to the data kinescope for display based on the stopping position.
In some embodiments, sending the stopping position of the resolved data to the data kinescope for display comprises:
and converting the stopping position of the analysis data into seven-segment nixie tube format data, and sending the seven-segment nixie tube format data to the data kinescope for display.
Embodiments of the present invention will be described below by way of specific examples.
Fig. 2 is a schematic structural diagram of a downtime positioning system of another server according to the present invention.
The downtime positioning system comprises: the device comprises a south bridge chip PCH, a south bridge chip FLASH memory PCH FLASH, a complex programmable logic device CPLD, a micro control unit MCU and a data kinescope, wherein the complex programmable logic device comprises a data analysis module and a data comparison module, and the MCU comprises a memory.
Furthermore, the data kinescope can select 80PORT LED, and the memory can select EEPROM.
In fig. 2, the PCH transmits the SPL CLK signal, i.e., the i.e., clock signal, and data to the CPLD, which receives the CLK signal and data, transmits the CLK signal and data to the data parsing module for data parsing, and adds a time stamp to the parsed data.
After the CPLD sends the CLK signal to the data analysis module for a period of time, the CLK signal is sent to the MCU, and after the MCU receives the CLK signal which is delayed to send, the MCU starts to read the Binary data from the PCH FLASH, adds a time stamp to the Binary data and stores the Binary data in the EEPROM. The above-mentioned period of time is preset, and in this embodiment, the period of time is set to 100ms, and may also be 200ms, 300ms, etc.
When the system is down, the SPI stops data transmission, after the watchdog in the CPLD detects that the SPI stops data transmission, a watchdog signal is sent to the data comparison module and the MCU, and the watchdog signal sent to the MCU is also delayed for a preset time to be sent, so that the data size is consistent during comparison, and is set to be 100ms.
After receiving the delayed watchdog signal, the MCU stops reading the Binary data from the PCH FLASH, and sends the read Binary data to the data comparison module for data comparison.
After receiving the watchdog signal, the data comparison module grabs the analyzed data from the data analysis module, compares the two groups of data after receiving the Binary data sent by the MCU, obtains the position where SPI data transmission stops, and converts the stop position into data in a nixie tube format, namely, the data are sent to a data kinescope as POST CODE LED <0:7> for display.
Further, the downtime positioning system as described above may be disposed on the server motherboard or on other boards of the server.
The CPLD and the micro control unit monitor and analyze the SPI actual transmission state, so that the SPI stop position is quickly positioned, a visual debug problem positioning mode is provided, and the working efficiency is improved.
Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 3, an embodiment of the present invention further provides a downtime positioning method of a server, including the following steps:
s101, analyzing the received SPI clock signal and data sent by the south bridge chip through a complex programmable logic device, delaying the clock signal for a preset time and then sending the delayed clock signal to a micro control unit;
s103, receiving the delayed clock signal through the micro control unit, and reading data from the south bridge chip flash memory and storing the data;
s105, responding to data stop transmission, and sending a delayed watchdog signal to the micro control unit through the complex programmable logic device;
s107, receiving the delayed watchdog signal through the micro control unit, stopping reading data, and sending the read data to the complex programmable logic device;
s109, comparing the data with the analyzed data through the complex programmable logic device to find a stop position of SPI data transmission when the server is down.
Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 4, an embodiment of the present invention further provides a server 500, including the downtime localization system 510 as described above.
Finally, it should be noted that, as will be appreciated by those skilled in the art, all or part of the procedures in implementing the methods of the embodiments described above may be implemented by a computer program for instructing relevant hardware, and the program may be stored in a computer readable storage medium, and the program may include the procedures of the embodiments of the methods described above when executed. The storage medium of the program may be a magnetic disk, an optical disk, a read-only memory (ROM), a random-access memory (RAM), or the like. The computer program embodiments described above may achieve the same or similar effects as any of the method embodiments described above.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that as used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The foregoing embodiment of the present invention has been disclosed with reference to the number of embodiments for the purpose of description only, and does not represent the advantages or disadvantages of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program for instructing relevant hardware, and the program may be stored in a computer readable storage medium, where the storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will appreciate that: the above discussion of any embodiment is merely exemplary and is not intended to imply that the scope of the disclosure of embodiments of the invention, including the claims, is limited to such examples; combinations of features of the above embodiments or in different embodiments are also possible within the idea of an embodiment of the invention, and many other variations of the different aspects of the embodiments of the invention as described above exist, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. of the embodiments should be included in the protection scope of the embodiments of the present invention.
Claims (10)
1. A downtime positioning system for a server, comprising:
a south bridge chip;
a complex programmable logic device connected with the south bridge chip;
a micro control unit connected with the complex programmable logic device;
a south bridge chip flash memory connected with the micro control unit;
the complex programmable logic device is configured to receive the SPI clock signal and the data sent by the south bridge chip, analyze the clock signal and the data, and compare the analyzed data with the received data read by the micro control unit from the south bridge chip flash memory after the data stops being transmitted, so as to find the stopping position of SPI data transmission when the server is down.
2. The system of claim 1, wherein the complex programmable logic device comprises a data parsing module configured to parse the clock signal and the data to generate parsed data;
the complex programmable logic device is configured to send the received clock signal and the data to the data analysis module for analysis and to delay the clock signal for a preset time before sending to the micro control unit.
3. The system of claim 2, wherein the micro control unit comprises a memory;
the micro control unit is configured to receive the clock signal sent by the complex programmable logic device in a delayed manner for the preset time, read data from the south bridge chip flash memory and store the data into the memory.
4. The system of claim 3, wherein the data parsing module is further configured to add a timestamp to the parsed data;
the micro control unit is further configured to add a time stamp to the data.
5. The system of claim 4, the complex programmable logic device further comprising:
the data comparison module is connected with the data analysis module;
the complex programmable logic device is further configured to send a watchdog signal to the data comparison module and a watchdog signal delayed by the preset time to the micro control unit in response to the data parsing module stopping parsing data;
the data comparison module is configured to capture time-stamped parsed data from the data parsing module in response to receiving the watchdog signal.
6. The system of claim 5, wherein the micro control unit is further configured to stop reading data from the south bridge chip flash memory and send the time stamped data that has been read to the data comparison module in response to receiving a delayed watchdog signal;
the data comparison module is further configured to compare the time-stamped data with the time-stamped analysis data after receiving the time-stamped data sent by the micro control unit, so as to find a stop position of SPI data transmission when the server is down.
7. The system of claim 6, further comprising a data display tube;
the data comparison module is further configured to send the stopping position of the analysis data to the data kinescope for display based on the stopping position.
8. The system of claim 7, wherein transmitting the stopping position of the parsed data to the data kinescope for display comprises:
and converting the stopping position of the analysis data into seven-segment nixie tube format data, and sending the seven-segment nixie tube format data to the data kinescope for display.
9. The downtime positioning method of the server is characterized by comprising the following steps of:
analyzing the received SPI clock signal and data sent by the south bridge chip through a complex programmable logic device, delaying the clock signal for a preset time and then sending the delayed clock signal to a micro control unit;
receiving the delayed clock signal through the micro control unit, and reading data from the south bridge chip flash memory and storing the data;
transmitting a delayed watchdog signal to the micro-control unit through the complex programmable logic device in response to the data stopping transmission;
receiving the delayed watchdog signal through the micro control unit, stopping reading data, and sending the read data to the complex programmable logic device;
and comparing the received data read by the micro control unit from the south bridge chip flash memory with the analyzed data through the complex programmable logic device so as to find the stopping position of SPI data transmission when the server is down.
10. A server comprising the downtime localization system of any one of claims 1-8.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111722954A (en) * | 2020-06-30 | 2020-09-29 | 曙光信息产业(北京)有限公司 | Server abnormity positioning method and device, storage medium and server |
| CN112667462A (en) * | 2020-12-15 | 2021-04-16 | 苏州浪潮智能科技有限公司 | System, method and medium for monitoring double flash memory operation of server |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111722954A (en) * | 2020-06-30 | 2020-09-29 | 曙光信息产业(北京)有限公司 | Server abnormity positioning method and device, storage medium and server |
| CN112667462A (en) * | 2020-12-15 | 2021-04-16 | 苏州浪潮智能科技有限公司 | System, method and medium for monitoring double flash memory operation of server |
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