CN113609046A - Storage device suitable for VPX framework server and VPX framework server - Google Patents
Storage device suitable for VPX framework server and VPX framework server Download PDFInfo
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Abstract
The invention provides a storage device suitable for a VPX architecture server and the VPX architecture server, which comprise a Feiteng processor, a PCI-E to gigabit network control chip, a PCI-E to SRIO chip, a PCI-E to SATA/SAS chip, an SATA/SAS interface expansion chip, a storage management PHY chip, a PCI-E to USB chip, a memory module, a gigabit network PHY chip, a serial port chip, a firmware chip and a clock chip. The invention adopts a domestic Feiteng processor, eliminates the potential safety hazard caused by the storage device depending on key software and hardware in foreign countries seriously, and solves the problem that the storage device can not be used normally in severe environment.
Description
Technical Field
The present invention relates to the technical field of VPX architecture servers, and in particular, to a storage device suitable for a VPX architecture server and a VPX architecture server.
Background
VPX is based on a new generation bus standard of a high-speed serial bus, can provide ultra-large bandwidth and power for a server, and is a computer system architecture of a bus of the high-speed serial bus proposed by Versamoudule Eurocard International trade Association. The VPX architecture is a new bus standard proposed by the international trade association organization, and uses high-speed buses such as 10GbE, PCI-E, and SRIO for system internal and external interconnection, so that a server adopting the VPX architecture exhibits excellent performance in terms of storage rate, data availability, and I/O service, and becomes an indispensable core facility for a high-performance information processing system. The storage device is used as the basis of a VPX architecture server, is mainly designed based on intel to strong series of processors at present, and runs a Windows operating system, so that the key soft and hard technologies of the storage device are monopolized abroad.
The storage device of the VPX architecture server in the market is characterized in that key software and hardware technologies of the storage device are seriously dependent on foreign countries, backdoor and leak risks exist in the technology, potential hazards of sanctions and forbidden transportation exist in the trade, information safety of China is seriously threatened, and when the storage device based on a super processor is used in a severe environment, the storage device cannot meet the use requirements of high and low temperature, damp heat and the like, so that the stability is greatly reduced.
Patent document CN110879790A discloses a high-speed memory board supporting multiple main-stream VPX data bus formats and capable of being used directly without changing the structure of the VPX-architecture chassis. The technical scheme includes that external system data of a VPX connector, an interface expansion chip, a storage control chip, a high-speed DDR cache and an SSD hard disk set are connected with the storage control chip and the interface expansion chip through the VPX connector, the external data enter the interface expansion chip through an SRIO interface and an Ethernet interface on the VPX connector, the external data are accessed into the storage control chip through a 1G Ethernet interface on the VPX connector, the interface expansion chip is connected with the VPX connector and connected with the storage control chip through an LVDS data interface, and the storage control chip is connected with the high-speed DDR cache and the SSD hard disk set. However, this patent document still has a drawback that when used in a severe environment, the use requirements such as high and low temperatures and moist heat cannot be satisfied, and the stability is significantly lowered.
Disclosure of Invention
In view of the defects in the prior art, the present invention is directed to a storage device suitable for a VPX framework server and a VPX framework server.
The storage device suitable for the VPX architecture server comprises a Feiteng processor, a PCI-E to gigabit network control chip, a PCI-E to SRIO chip, a PCI-E to SATA/SAS chip, an SATA/SAS interface expansion chip, a storage management PHY chip, a PCI-E to USB chip, a memory module, a gigabit network PHY chip, a serial port chip, a firmware chip and a clock chip, wherein the PCI-E to SATA/SAS chip is connected with the storage management module through the USB interface expansion chip;
the Feiteng processor is connected with a PCI-E to gigabit network control chip, a PCI-E to SRIO chip, a PCI-E to SATA/SAS chip, a storage management chip, a PCI-E to USB chip, a memory module, a gigabit network PHY chip, a serial port chip, a firmware chip and a clock chip; the PCI-E to gigabit network control chip outputs a gigabit Ethernet interface, and the Feiteng processor outputs a PCI-E3.0X 8 interface;
the PCI-E to SATA/SAS chip is connected with the SATA/SAS interface expansion chip; the SATA/SAS interface expansion chip outputs an SATA/SAS interface, and the storage management chip outputs a display interface and a storage management IIC interface;
the storage management chip is connected with the storage management PHY chip; the storage management PHY chip outputs a storage management kilomega network port, the PCI-E conversion USB chip outputs a USB3.0 interface, the kilomega network PHY chip outputs the kilomega network port, and the serial port chip outputs a serial port.
Preferably, the Feiteng processor adopts an industrial grade FT-2000/4 processor;
the Feiteng processor is integrated with a PCI-E _ X8a interface, a PCI-E _ X8b interface, a PCI-E _ X8c interface, a PCI-E _ X8d interface, a PCI-E _ X1a interface and a PCI-E _ X1b interface, wherein:
the PCI-E _ X8a interface is connected with the PCI-E to gigabit network control chip, the PCI-E _ X8b interface is connected with the PCI-E3.0X 8 interface, the PCI-E _ X8c interface is connected with the PCI-E to SRIO chip, the PCI-E _ X8d interface is connected with the PCI-E to SATA/SAS chip, the PCI-E _ X1a interface is connected with the storage management chip, and the PCI-E _ X1b interface is connected with the PCI-E to USB chip.
Preferably, the Feiteng processor is integrated with a PCI-E interface, a GPIO interface and an LPC interface;
the Feiteng processor is connected with the storage management chip through a PCI-E interface, a GPIO interface and an LPC interface, and the storage management chip adopts an AST2400 chip.
Preferably, the FT processor is integrated with an MC interface;
the Feiteng processor is connected with the memory module through an MC interface, and the memory module is M88SC26 HZ.
Preferably, the Feiteng processor is integrated with an RMII interface;
the Feiteng processor is connected with the gigabit network PHY chip through an RMII interface, and the gigabit network PHY chip is a JEM88E1111 chip.
Preferably, the Feiteng processor is integrated with a URAT interface;
the Feiteng processor is connected with the serial port chip through a URAT interface, and the serial port chip is an SM3232 chip.
Preferably, the Feiteng processor is integrated with an SPI interface;
the Feiteng processor is connected with the firmware chip through an SPI (serial peripheral interface), and the firmware chip is a GD5F4GQ5UA chip.
Preferably, the Feiteng processor is integrated with an IIC interface;
the Feiteng processor is connected with the clock chip through an IIC interface, and the clock chip is a 6P41505BN chip.
Preferably, the PCI-E to gigabit network control chip is an SP1000A chip; the PCI-E to SRIO chip is an XC7K325T chip; the PCI-E to SATA/SAS chip is an SAS3008 chip; the SATA/SAS interface expansion chip is an SAS2X36 chip; the storage management PHY chip adopts a JEM88E1111 chip; the PCI-E to USB chip is a VL805 chip.
The invention also provides a VPX architecture server, which comprises the storage device suitable for the VPX architecture server.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention provides a storage device suitable for a VPX architecture server, which adopts a domestic Feiteng processor, eliminates potential safety hazards caused by the fact that the storage device depends heavily on foreign key software and hardware, and solves the problem that the storage device cannot be normally used in a severe environment;
2. the storage device suitable for the VPX architecture server provided by the invention adopts a domestic Feiteng processor, can carry domestic Korea firmware, runs a domestic Galaxy kylin operating system, is used as an important component of the VPX server, realizes independent controllability of software and hardware technologies, and has important significance for breaking foreign monopoly and ensuring national information safety;
3. the storage device supports RAID 0/1/1E/10 and other data protection modes, the data storage rate is up to 12Gbps, and the storage device can be flexibly expanded to 1024 SATA/SAS devices, so that the storage device has high-reliability data protection, high-speed data transmission and mass data storage, and can be applied to the fields of radar high-speed storage, cloud storage, computing centers and the like;
4. the storage device provided by the invention adopts an industrial grade Feiteng processor at (-40 ℃ to +105 ℃), and after the complete adding and fixing design development, the severe use environments of high and low temperature, damp and hot, low air pressure and the like are met, and the robustness of the VPX framework server is greatly improved.
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Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
fig. 1 is a structural diagram of a storage device suitable for a VPX architecture server according to the present invention.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that it would be obvious to those skilled in the art that various changes and modifications can be made without departing from the spirit of the invention. All falling within the scope of the present invention.
As shown in fig. 1, the storage device suitable for a VPX architecture server provided by the present invention includes a soar processor, a PCI-E to gigabit network control chip, a PCI-E to SRIO chip, a PCI-E to SATA/SAS chip, a SATA/SAS interface expansion chip, a storage management PHY chip, a PCI-E to USB chip, a memory module, a gigabit network PHY chip, a serial port chip, a firmware chip, and a clock chip, where the soar processor is connected to the PCI-E to gigabit network control chip, the PCI-E to SRIO chip, the PCI-E to SATA/SAS chip, the storage management chip, the PCI-E to USB chip, the memory module, the gigabit network PHY chip, the serial port chip, the firmware chip, and the clock chip; the PCI-E to gigabit network control chip outputs a gigabit Ethernet interface, the Feiteng processor outputs a PCI-E3.0X 8 interface, and the PCI-E to SATA/SAS chip is connected with an SATA/SAS interface expansion chip; the SATA/SAS interface expansion chip outputs an SATA/SAS interface, the storage management chip outputs a display interface and a storage management IIC interface, and the storage management chip is connected with the storage management PHY chip; the storage management PHY chip outputs a storage management kilomega network port, the PCI-E conversion USB chip outputs a USB3.0 interface, the kilomega network PHY chip outputs a kilomega network port, and the serial port chip outputs a serial port. The PCI-E to gigabit network control chip is an SP1000A chip, the PCI-E to SRIO chip is an XC7K325T chip, the PCI-E to SATA/SAS chip is an SAS3008 chip, the SATA/SAS interface expansion chip is an SAS2X36 chip, the storage management PHY chip is a JEM88E1111 chip, and the PCI-E to USB chip is a VL805 chip.
The FT processor adopts an industrial grade FT-2000/4 processor, and is integrated with a PCI-E _ X8a interface, a PCI-E _ X8b interface, a PCI-E _ X8c interface, a PCI-E _ X8d interface, a PCI-E _ X1a interface and a PCI-E _ X1b interface, wherein: the PCI-E _ X8a interface is connected with a PCI-E to gigabit network control chip, the PCI-E _ X8b interface is connected with a PCI-E3.0X 8 interface, the PCI-E _ X8c interface is connected with a PCI-E to SRIO chip, the PCI-E _ X8d interface is connected with a PCI-E to SATA/SAS chip, the PCI-E _ X1a interface is connected with a storage management chip, and the PCI-E _ X1b interface is connected with a PCI-E to USB chip.
The Feiteng processor is integrated with a PCI-E interface, a GPIO interface and an LPC interface, and is connected with a storage management chip through the PCI-E interface, the GPIO interface and the LPC interface, and the storage management chip adopts an AST2400 chip. The Feiteng processor is integrated with an MC interface, and is connected with a memory module through the MC interface, wherein the memory module is M88SC26 HZ. The Feiteng processor is integrated with an RMII interface, and is connected with a gigabit network PHY chip through the RMII interface, wherein the gigabit network PHY chip is a JEM88E1111 chip. The Feiteng processor is integrated with a URAT interface, and is connected with a serial port chip through the URAT interface, and the serial port chip is an SM3232 chip. The Feiteng processor is integrated with an SPI interface, is connected with a firmware chip through the SPI interface, and the firmware chip is a GD5F4GQ5UA chip. The Feiteng processor is integrated with an IIC interface, and is connected with a clock chip through the IIC interface, and the clock chip is a 6P41505BN chip.
The invention also provides a VPX architecture server, which comprises the storage device suitable for the VPX architecture server.
Preferred embodiment(s) of the invention：
A storage device suitable for a VPX framework server comprises a Feiteng processor, a PCI-E to gigabit network control chip, a PCI-E to SRIO chip, a PCI-E to SATA/SAS chip, a SATA/SAS interface expansion chip, a storage management PHY chip, a PCI-E to USB chip, a memory module, a gigabit network PHY chip, a serial port chip, a firmware chip and a clock chip. The Feiteng processor is connected with a PCI-E to gigabit network control chip, a PCI-E to SRIO chip, a PCI-E to SATA/SAS chip, a storage management chip, a PCI-E to USB chip, a memory module, a gigabit network PHY chip, a serial port chip, a firmware chip and a clock chip; the PCI-E converts the gigabit Ethernet interface to be output by the network control chip, the Feiteng processor outputs a PCI-E3.0X 8 interface, the PCI-E converts the SATA/SAS chip to be connected with the SATA/SAS interface expansion chip, the SATA/SAS interface expansion chip outputs the SATA/SAS interface, the storage management chip outputs a display interface and a storage management IIC interface, the storage management chip is connected with the storage management PHY chip, the storage management PHY chip outputs a storage management gigabit network port, the PCI-E converts the USB chip to output a USB3.0 interface, the gigabit network PHY chip outputs the gigabit network port, and the serial port chip outputs the serial port.
The Feiteng processor adopts an industrial grade (40 ℃ to 105 ℃) FT-2000/4 processor, and is integrated with 6 paths of PCI-E3.0 interfaces including a PCI-E _ X8a interface, a PCI-E _ X8b interface, a PCI-E _ X8c interface, a PCI-E _ X8d interface, a PCI-E _ X1a interface and a PCI-E _ X1b interface, wherein the PCI-E _ X8a interface is connected with a PCI-E to gigabit network control chip, the PCI-E _ X8b interface is connected with a PCI-E3.0X 8 interface, the PCI-E _ X8c interface is connected with a PCI-E to SRIO chip, the PCI-E _ X8d interface is connected with a PCI-E to SATA/SAS chip, the PCI-E _ X1a interface is connected with a storage management chip, and the PCI-E _ X1b interface is connected with a PCI-E to a USB chip. [007] The PCI-E to gigabit network control chip is SP1000A, the SP1000A chip realizes the interconversion between the PCI-E3.0 protocol and the gigabit Ethernet protocol, and the two-path gigabit Ethernet signal of the SP1000A chip is connected with the gigabit Ethernet interface.
The PCI-E3.0X 8 interface is connected with the PCI-E3.0X 8 signal of the PCI-E _ X8b interface of the Feiteng processor. The PCI-E to SRIO chip is XC7K325T, the XC7K325T chip realizes the mutual conversion of a PCI-E3.0 protocol and an SRIO2.0 protocol, and two paths of SRIO 2.0X 4 signals of the XC7K325T chip are connected with an SRIO 2.0X 4 interface.
The PCI-E to SATA/SAS chip is SAS3008, the SAS3008 chip realizes the mutual conversion of the PCI-E3.0 protocol and the SATA/SAS protocol, and the eight SATA/SAS signals of the SAS3008 chip are connected with the SATA/SAS interface expansion chip.
The SATA/SAS interface expansion chip is SAS2X36, the SAS2X36 chip has twenty-four SATA/SAS expansion capabilities, and twenty-four SATA/SAS signals of the SAS2X36 chip are connected with the SATA/SAS interface.
The Feiteng processor is connected with the storage management chip through a PCI-E interface, a GPIO interface and an LPC interface, the storage management chip adopts an AST2400 chip, a VGA signal output display interface of the AST2400 chip, an IIC signal output storage management IIC interface of the AST2400 chip, and an RMII signal connection node storage management PHY chip of the AST2400 chip.
The storage management PHY chip adopts an MDI signal of JEM88E1111 chip and the JEM88E1111 chip to connect the storage management gigabit network port. The PCI-E to USB chip is VL805, and four paths of USB3.0 signals of the VL805 chip are connected with the USB3.0 interface.
The Feiteng processors are connected through an MC interface memory module, which is M88SC26 HZ. The Feiteng processor is connected with the gigabit network PHY chip through the RMII interface, the gigabit network PHY chip is JEM88E1111, and the MDI signal of the JEM88E1111 chip is connected with the gigabit network port. The Feiteng processor is connected with a serial port chip through a URAT interface, the serial port chip is SM3232, and an RS232 signal of the SM3232 chip is connected with a serial port. The Feiteng processor is connected with a firmware chip through an SPI interface, and the firmware chip is GD5F4GQ5 UA. The Feiteng processor is connected with a clock chip through an IIC interface, and the clock chip is 6P41505 BN.
VPX (a new generation bus standard based on high speed serial bus, which can provide very large bandwidth and power for servers, and refers to a computer system architecture of high speed serial bus proposed by the VersaMoudule Eurocard international trade association); SRIO (Serial Rapid IO, packet-switched based high-speed Serial interconnect bus technology); 10GbE (10Gigabit Ethernet, Gigabit Ethernet); PCI-E (Peripheral Component Interconnect Express, a high speed serial computer expansion bus technology); SATA (Serial Advanced Technology Attachment); SAS (Serial Attached Small Computer System Interface); PHY (Port Physical Layer); USB (Universal Serial Bus); GPIO (General Purpose Input/Output interface); LPC (low Pin Count); VGA (Video Graphics Array ); IIC (Inter-Integrated Circuit, Integrated Circuit bus); RMII (Reduced Media Independent Interface, simplified Media Independent Interface); MDI (Medium Dependent Interface); MC (Memory Controller); URAT (Universal Asynchronous Receiver/Transmitter); RS232 (a single-ended communication method of unbalanced transmission); SPI (Serial Peripheral Interface).
The invention provides a storage device suitable for a VPX (virtual private network) architecture server, which adopts a domestic Feiteng processor, eliminates potential safety hazards caused by the fact that the storage device depends on key software and hardware in foreign countries seriously, and solves the problem that the storage device cannot be used normally in a severe environment.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes or modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.
Claims (10)
1. A storage device suitable for a VPX framework server is characterized by comprising a Feiteng processor, a PCI-E to gigabit network control chip, a PCI-E to SRIO chip, a PCI-E to SATA/SAS chip, an SATA/SAS interface expansion chip, a storage management PHY chip, a PCI-E to USB chip, a memory module, a gigabit network PHY chip, a serial port chip, a firmware chip and a clock chip, wherein the PCI-E to SATA/SAS chip is connected with the storage management chip through the PCI-E to USB interface expansion chip;
the Feiteng processor is connected with a PCI-E to gigabit network control chip, a PCI-E to SRIO chip, a PCI-E to SATA/SAS chip, a storage management chip, a PCI-E to USB chip, a memory module, a gigabit network PHY chip, a serial port chip, a firmware chip and a clock chip; the PCI-E to gigabit network control chip outputs a gigabit Ethernet interface, and the Feiteng processor outputs a PCI-E3.0X 8 interface;
the PCI-E to SATA/SAS chip is connected with the SATA/SAS interface expansion chip; the SATA/SAS interface expansion chip outputs an SATA/SAS interface, and the storage management chip outputs a display interface and a storage management IIC interface;
the storage management chip is connected with the storage management PHY chip; the storage management PHY chip outputs a storage management kilomega network port, the PCI-E conversion USB chip outputs a USB3.0 interface, the kilomega network PHY chip outputs the kilomega network port, and the serial port chip outputs a serial port.
2. The storage device suitable for a VPX architecture server of claim 1, wherein the Feiteng processor is an industrial grade FT-2000/4 processor;
the Feiteng processor is integrated with a PCI-E _ X8a interface, a PCI-E _ X8b interface, a PCI-E _ X8c interface, a PCI-E _ X8d interface, a PCI-E _ X1a interface and a PCI-E _ X1b interface, wherein:
the PCI-E _ X8a interface is connected with the PCI-E to gigabit network control chip, the PCI-E _ X8b interface is connected with the PCI-E3.0X 8 interface, the PCI-E _ X8c interface is connected with the PCI-E to SRIO chip, the PCI-E _ X8d interface is connected with the PCI-E to SATA/SAS chip, the PCI-E _ X1a interface is connected with the storage management chip, and the PCI-E _ X1b interface is connected with the PCI-E to USB chip.
3. The storage device suitable for the VPX architecture server of claim 1, wherein the Feiteng processor is integrated with a PCI-E interface, a GPIO interface and an LPC interface;
the Feiteng processor is connected with the storage management chip through a PCI-E interface, a GPIO interface and an LPC interface, and the storage management chip adopts an AST2400 chip.
4. A storage device adapted for a VPX architecture server according to claim 1, wherein the FT processor is integrated with an MC interface;
the Feiteng processor is connected with the memory module through an MC interface, and the memory module is M88SC26 HZ.
5. A storage device adapted for a VPX architecture server as claimed in claim 1, wherein said FT processor is integrated with RMII interface;
the Feiteng processor is connected with the gigabit network PHY chip through an RMII interface, and the gigabit network PHY chip is a JEM88E1111 chip.
6. A storage device adapted for a VPX architecture server as claimed in claim 1, wherein the femtotem processor is integrated with a URAT interface;
the Feiteng processor is connected with the serial port chip through a URAT interface, and the serial port chip is an SM3232 chip.
7. The storage device suitable for a VPX architecture server of claim 1, wherein the Feiteng processor is integrated with an SPI interface;
the Feiteng processor is connected with the firmware chip through an SPI (serial peripheral interface), and the firmware chip is a GD5F4GQ5UA chip.
8. The storage device suitable for a VPX architecture server of claim 1, wherein the FT processor is integrated with IIC interface;
the Feiteng processor is connected with the clock chip through an IIC interface, and the clock chip is a 6P41505BN chip.
9. The storage device suitable for a VPX architecture server of claim 1, wherein the PCI-E to gigabit network control chip is an SP1000A chip; the PCI-E to SRIO chip is an XC7K325T chip; the PCI-E to SATA/SAS chip is an SAS3008 chip; the SATA/SAS interface expansion chip is an SAS2X36 chip; the storage management PHY chip adopts a JEM88E1111 chip; the PCI-E to USB chip is a VL805 chip.
10. A VPX framework server, comprising the storage apparatus adapted for a VPX framework server according to any one of claims 1 to 9.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116206637A (en) * | 2022-12-23 | 2023-06-02 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Storage device suitable for massive cold data |
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| CN207367115U (en) * | 2017-11-09 | 2018-05-15 | 湖南长城银河科技有限公司 | A kind of server master board and server based on Feiteng processor |
| CN111475459A (en) * | 2020-04-03 | 2020-07-31 | 上海领存信息技术有限公司 | 9U VPX data storage server and data processing method |
| CN211427336U (en) * | 2019-12-17 | 2020-09-04 | 长沙湘计海盾科技有限公司 | Embedded VPX calculation module |
| CN111984583A (en) * | 2020-07-24 | 2020-11-24 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Master control device suitable for VPX framework server |
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| CN207367115U (en) * | 2017-11-09 | 2018-05-15 | 湖南长城银河科技有限公司 | A kind of server master board and server based on Feiteng processor |
| CN211427336U (en) * | 2019-12-17 | 2020-09-04 | 长沙湘计海盾科技有限公司 | Embedded VPX calculation module |
| CN111475459A (en) * | 2020-04-03 | 2020-07-31 | 上海领存信息技术有限公司 | 9U VPX data storage server and data processing method |
| CN111984583A (en) * | 2020-07-24 | 2020-11-24 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Master control device suitable for VPX framework server |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116206637A (en) * | 2022-12-23 | 2023-06-02 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Storage device suitable for massive cold data |
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