CN113438818A - Preparation process of gold-copper connecting circuit of PCB - Google Patents

Preparation process of gold-copper connecting circuit of PCB Download PDF

Info

Publication number
CN113438818A
CN113438818A CN202110681474.7A CN202110681474A CN113438818A CN 113438818 A CN113438818 A CN 113438818A CN 202110681474 A CN202110681474 A CN 202110681474A CN 113438818 A CN113438818 A CN 113438818A
Authority
CN
China
Prior art keywords
gold
pcb
copper
dry film
outer layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110681474.7A
Other languages
Chinese (zh)
Inventor
陈凤
苏振艺
柯添
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dongguan Meadville Circuits Ltd
Original Assignee
Dongguan Meadville Circuits Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dongguan Meadville Circuits Ltd filed Critical Dongguan Meadville Circuits Ltd
Priority to CN202110681474.7A priority Critical patent/CN113438818A/en
Publication of CN113438818A publication Critical patent/CN113438818A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks

Abstract

A preparation process of a gold-copper connecting circuit of a PCB comprises the following steps: step one, laminating, copper thinning, drilling and copper deposition processing; step two, pulse electroplating; thirdly, pasting an outer dry film for the first time, windowing an electrogilding area needing electrogilding, and exposing the outer dry film by using an LDI exposure machine; electrically thickening hard gold at the exposed PCB electro-gold position; step five, removing the film; step six, pasting an outer layer dry film for the second time, making a circuit pattern, and simultaneously covering the position of the electrogilding; step seven, sequentially carrying out development, pattern electroplating, outer layer etching, outer layer AOI, resistance welding and stamp-pad ink processing on the PCB subjected to the second dry film; step eight, gold precipitation. The invention can not only reduce the thickness of copper to be etched by improving the electroplating deep plating capability, but also solve the problems of left and right circuit deviation and circuit deformation caused by the unevenness of the connecting position, thereby realizing smooth connection of the copper position. The invention has strong practicability and stronger popularization significance.

Description

Preparation process of gold-copper connecting circuit of PCB
Technical Field
The invention relates to a PCB manufacturing process, in particular to a PCB gold-copper connecting circuit manufacturing process.
Background
At present, part of PCBs require that the PAD to be welded is designed to be gold-plated, and the wire for connecting the PAD cannot be plated with gold, so that the PCB is required to be designed to be gold-copper connection. However, the PCB is manufactured by using a conventional manufacturing method, and has the following problems: firstly, the line connected with the PAD needs to be dried for a plurality of times, so that a larger deviation error exists, and the connecting position is easy to be attacked by etching liquid medicine to break the line in the etching process. Secondly, the gold-copper connection is uneven, and the film has bubbles, thereby seriously affecting the product quality.
Disclosure of Invention
Therefore, the invention aims to provide a preparation process of a gold-copper connecting circuit of a PCB, which aims to solve the problems that the traditional gold-copper connecting circuit of the PCB is easy to generate deviation error, is broken by being attacked by etching liquid, is uneven in gold-copper connection and has air bubbles in a film.
A preparation process of a gold-copper connecting circuit of a PCB comprises the following steps:
step one, an early process, namely providing a plurality of PCB base materials, and sequentially carrying out laminating, copper thinning, drilling and copper deposition on the plurality of base materials to form a semi-finished PCB;
step two, performing pulse electroplating on the PCB processed by the copper deposition in the step one;
thirdly, pasting an outer dry film for the first time, windowing an electrogilding area needing electrogilding, and exposing the outer dry film by using an LDI exposure machine;
electrically thickening hard gold at the exposed PCB electro-gold position;
step five, removing the film;
step six, pasting an outer layer dry film for the second time, making a circuit pattern, and simultaneously covering the position of the electrogilding;
step seven, sequentially carrying out development, pattern electroplating, outer layer etching, outer layer AOI, resistance welding and stamp-pad ink processing on the PCB subjected to the second dry film;
step eight, gold precipitation.
Further, when the selective gold deposition area is arranged on the surface of the PCB, a step is required to be added between the seventh step and the eighth step, wherein the step is to paste an outer layer dry film for the third time and cover the position, which is not subjected to gold deposition, on the surface of the PCB.
Further, in the third step, the film adopted by the cover foil area is 4 mil.
Further, in the third step, the outer layer dry film is pasted by a soft rolling mill at the temperature of 115 ℃ and the pasting speed of 2.0 m/min.
In summary, by adopting pulsed light electroplating and three-way sequence of the outer dry film I, the outer dry film II and the outer dry film, the invention not only can reduce the thickness of copper to be etched by improving electroplating deep plating capability, but also can solve the problems of left and right circuit deviation and circuit deformation caused by unevenness of a connecting position, thereby realizing smooth connection of copper and cash positions. The invention has strong practicability and stronger popularization significance.
Drawings
FIG. 1 is a schematic diagram of a circuit board manufactured by the manufacturing process of the gold-copper connection circuit of the PCB of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments.
As shown in fig. 1, a PCB is manufactured by using the gold-copper connection circuit manufacturing process of the PCB of the present invention. The PCB is provided with a gold-copper circuit, and the gold-copper circuit is provided with a copper area 10, a connecting position 20 and an electrogilding area 30. The preparation process of the PCB gold-copper connecting circuit comprises the following steps:
step one, an early stage process, namely providing a plurality of PCB base materials, and sequentially laminating, thinning copper, drilling and depositing copper on the plurality of base materials to form a semi-finished PCB, wherein the part of the process is a common process, so the specific process is not repeated herein;
step two, pulse electroplating; performing pulse electroplating on the PCB processed by the first copper deposition step to improve the electroplating deep plating capacity of the PCB, so that the flatness of the connecting position 20 can be improved, and the connecting position 20 is prevented from being uneven;
step three, pasting an outer dry film for the first time, processing the outer dry film on the PCB processed in the step two, windowing an electrogilding area 30 needing electrogilding, and exposing the outer dry film by using an LDI exposure machine, so that the problem of deviation of a gold-copper connecting position 20 can be solved, and the alignment tolerance is controlled within +/-0.5 mil;
step four, performing electric thick hard gold treatment on the electric gold area;
step five, removing the film, namely removing the first outer dry film;
step six, second outer layer dry film, namely, pasting the outer layer dry film on the PCB processed in the step five, making a circuit pattern, simultaneously covering the position of the electrogilding, wherein the film covering the electrogilding area is 4mil, pasting the outer layer dry film by adopting a soft press roller at 60 ℃, and pasting the film at the temperature of 115 ℃ at the speed of 2.0 m/min;
step seven, later-stage working procedures, namely sequentially carrying out development, pattern electroplating, outer layer etching, outer layer AOI, resistance welding and stamp-pad ink processing on the PCB subjected to the second dry film making;
step eight, pasting an outer layer dry film for the third time, and covering the position where gold is not deposited; the step is specific to the circuit board with the selective gold immersion area on the board surface, and the step can be cancelled if the selective gold immersion area is not arranged on the PCB board surface.
Step nine, gold precipitation.
In summary, by adopting pulsed light electroplating and three-way sequence of the outer dry film I, the outer dry film II and the outer dry film, the invention not only can reduce the thickness of copper to be etched by improving electroplating deep plating capability, but also can solve the problems of left and right circuit deviation and circuit deformation caused by unevenness of a connecting position, thereby realizing smooth connection of copper and cash positions. The invention has strong practicability and stronger popularization significance.
The above-mentioned embodiments only represent one embodiment of the present invention, and the description is specific and detailed, but not understood as the limitation of the scope of the invention, it should be noted that, for those skilled in the art, many variations and modifications can be made without departing from the concept of the present invention, and these are within the scope of the invention, and therefore, the scope of the invention should be determined by the appended claims.

Claims (4)

1. A PCB gold copper interconnecting link preparation technology is used for preparing gold copper interconnecting links, and is characterized in that: the gold-copper connecting circuit comprises a copper area, a connecting position and an electric gold area; the preparation process of the PCB gold-copper connecting circuit comprises the following steps:
step one, an early process, namely providing a plurality of PCB base materials, laminating the base materials, and then sequentially performing copper thinning, drilling and copper deposition processing to form a semi-finished PCB;
step two, performing pulse electroplating on the PCB processed by the copper deposition in the step one;
thirdly, pasting an outer dry film for the first time, windowing an electrogilding area needing electrogilding, and exposing the outer dry film by using an LDI exposure machine;
electrically thickening hard gold at the exposed PCB electro-gold position;
step five, removing the film;
step six, pasting an outer layer dry film for the second time, making a circuit pattern, and simultaneously covering the electrogilding area;
step seven, sequentially carrying out development, pattern electroplating, outer layer etching, outer layer AOI, resistance welding and stamp-pad ink processing on the PCB subjected to the second dry film;
step eight, gold precipitation.
2. The PCB gold-copper connection circuit preparation process of claim 1, wherein: when the selective gold deposition area is arranged on the surface of the PCB, a step is required to be added between the seventh step and the eighth step, wherein the step is to paste an outer layer dry film for the third time and cover the non-gold deposition position on the surface of the PCB.
3. The PCB gold-copper connection circuit preparation process of claim 1, wherein: in the third step, the film adopted by the cover foil area is 4 mil.
4. The PCB gold-copper connection circuit preparation process of claim 1, wherein: in the third step, the outer layer dry film is pasted by a soft rolling wheel with the temperature of 60 ℃, the temperature is 115 ℃, and the pasting speed is 2.0 m/min.
CN202110681474.7A 2021-06-18 2021-06-18 Preparation process of gold-copper connecting circuit of PCB Pending CN113438818A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110681474.7A CN113438818A (en) 2021-06-18 2021-06-18 Preparation process of gold-copper connecting circuit of PCB

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110681474.7A CN113438818A (en) 2021-06-18 2021-06-18 Preparation process of gold-copper connecting circuit of PCB

Publications (1)

Publication Number Publication Date
CN113438818A true CN113438818A (en) 2021-09-24

Family

ID=77756655

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110681474.7A Pending CN113438818A (en) 2021-06-18 2021-06-18 Preparation process of gold-copper connecting circuit of PCB

Country Status (1)

Country Link
CN (1) CN113438818A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5209817A (en) * 1991-08-22 1993-05-11 International Business Machines Corporation Selective plating method for forming integral via and wiring layers
CN102946693A (en) * 2012-12-11 2013-02-27 桂林电子科技大学 Step circuit board with gold-masking copper-plating hybrid surface process and manufacture method thereof
CN103687322A (en) * 2013-12-11 2014-03-26 广州兴森快捷电路科技有限公司 Method for manufacturing lead-free printed circuit board partially plated with hard gold
CN110996531A (en) * 2020-01-02 2020-04-10 深圳市景旺电子股份有限公司 Processing and manufacturing method for PCB molding
CN111586981A (en) * 2020-05-28 2020-08-25 深圳市博敏电子有限公司 Design and manufacturing method of integrated coupling printed board

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5209817A (en) * 1991-08-22 1993-05-11 International Business Machines Corporation Selective plating method for forming integral via and wiring layers
CN102946693A (en) * 2012-12-11 2013-02-27 桂林电子科技大学 Step circuit board with gold-masking copper-plating hybrid surface process and manufacture method thereof
CN103687322A (en) * 2013-12-11 2014-03-26 广州兴森快捷电路科技有限公司 Method for manufacturing lead-free printed circuit board partially plated with hard gold
CN110996531A (en) * 2020-01-02 2020-04-10 深圳市景旺电子股份有限公司 Processing and manufacturing method for PCB molding
CN111586981A (en) * 2020-05-28 2020-08-25 深圳市博敏电子有限公司 Design and manufacturing method of integrated coupling printed board

Similar Documents

Publication Publication Date Title
WO2015085933A1 (en) Method for manufacturing leadless printed circuit board locally plated with hard gold
CN107041077A (en) A kind of circuit board producing method of turmeric and the golden compound base amount method of electricity
CN104244616B (en) A kind of preparation method of centreless thin base sheet
CN102821553B (en) Method for manufacturing key position partial electro-gold-plated PCB (printed circuit board)
WO2017071393A1 (en) Printed circuit board and fabrication method therefor
CN105282983A (en) Lead wire etching technology with gold fingers with three surfaces wrapped by gold
CN111511120B (en) Raided Pad manufacturing method
CN108901137A (en) A kind of method that temperature control dissociation film auxiliary makes ultra-thin printed circuit board
CN108668459A (en) A kind of printed board Novel electric platinum surface treatment method
CN105704948A (en) Manufacturing method of ultra-thin printed circuit board and ultra-thin printed circuit board
TWI252721B (en) Method of manufacturing double-sided printed circuit board
CN108401381B (en) Method for manufacturing disconnected gold finger type printed circuit board
CN109890149B (en) Manufacturing method of double-sided compression-joint PCB and PCB
CN113438818A (en) Preparation process of gold-copper connecting circuit of PCB
CN103369865A (en) A method for producing a circuit board
CN108366492B (en) leadless electroplating method based on finger connection position pre-enlargement
CN100417313C (en) Method for improving high quality ratio of circuit board process
CN211047360U (en) Edge-covered circuit board
US6426290B1 (en) Electroplating both sides of a workpiece
CN106535504A (en) Manufacturing technology of whole-plate nickel and gold plating half-slotted hole
CN110944454A (en) Circuit board production process
CN104968163A (en) Golden finger processing method characterized by no lead wire residues
CN107529293B (en) A kind of mobile terminal, multilayer PCB circuit board and its manufacturing method
CN210694480U (en) Line structure with interlayer guide hole
CN109302808B (en) Method for manufacturing fine circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination