High-efficiency low-loss silicon solar cell
Technical Field
The invention belongs to the technical field of solar cells, and particularly relates to a high-efficiency low-loss silicon solar cell.
Background
With the increasing consumption of conventional fossil energy such as global coal, oil, natural gas and the like, the ecological environment is continuously deteriorated, and particularly, the sustainable development of the human society is seriously threatened due to the increasingly severe global climate change caused by the emission of greenhouse gases. Various countries in the world make respective energy development strategies to deal with the limitation of conventional fossil energy resources and the environmental problems caused by development and utilization. Solar energy has become one of the most important renewable energy sources by virtue of the characteristics of reliability, safety, universality, long service life, environmental protection and resource sufficiency, and is expected to become a main pillar of global power supply in the future. In a new energy revolution process, the photovoltaic industry in China has grown into a strategic emerging industry with international competitive advantages. However, the development of the photovoltaic industry still faces many problems and challenges, and the conversion efficiency and reliability are the biggest technical obstacles restricting the development of the photovoltaic industry, while the cost control and the scale-up are economically restricted.
The solar cell is mainly based on semiconductor materials, the working principle is that photoelectric conversion reaction occurs after photoelectric materials absorb light energy, and the solar cell can be divided into the following parts according to different used materials: silicon solar cells, cells made of inorganic salt compounds, cadmium sulfide, copper indium selenide and other multi-component compounds, solar cells made of functional polymer materials, nanocrystalline solar cells and the like.
However, the current main single crystal cell production process is basically an SE + PERC cell structure, and the front laser heavy doping technology (SE) and the local contact back passivation technology (PERC) are combined, so that the efficiency of the solar cell is greatly improved. The existing cell preparation method of the SE + PERC superposition back polishing process is divided into two methods, one is an acid etching preparation method, and the other is an alkali etching method. In the preparation process of the SE + PERC battery, the efficiency of the SE + PERC battery is influenced by the etching and polishing method; although the acid polishing process is simple, the reflectivity is low, the light projection loss is large, and the conversion efficiency is low, while the alkali polishing realizes the improvement of the back reflectivity, the conversion efficiency of the solar cell is not greatly improved.
Meanwhile, the upper electrode and the lower electrode are manufactured by printing the electronic paste during the production of the solar cell, and because the price of the electronic paste is high, how to reduce the proportion of poor printing in the screen printing process becomes a key factor in the production process of the solar cell. Because the screen printer camera catches the precision not high, the phenomenon that often exists the printing figure skew when carrying out back electrode and back electric field figure chromatography, the great phenomenon that can lead to the back to expose silicon of skew makes back field passivation effect reduce, the too big figure of skew need clean and print again simultaneously, manufacturing cost has been increased, and generally when producing the skew through debugging printing parameter on one side, utilize slide caliper to measure to correct on one side, the process of debugging often needs a long time, and the alignment degree of back electrode and back electric field is relatively poor, production efficiency has been influenced.
The above problems are to be solved, and therefore the present invention provides a high efficiency low loss silicon solar cell to solve the above problems.
Disclosure of Invention
The invention aims to provide a high-efficiency low-loss silicon solar cell to solve the problems in the background technology.
In order to achieve the purpose, the invention provides the following technical scheme: a high-efficiency low-loss silicon solar cell comprises a substrate and grid lines arranged on the top surface and the bottom surface of the substrate, wherein the substrate comprises an N-type semiconductor layer and a P-type semiconductor layer, a PN junction layer is formed at the contact surface of the N-type semiconductor layer and the P-type semiconductor layer, an aluminum oxide passivation layer is arranged on the top surface of the P-type semiconductor layer, a silicon oxide antireflection layer is arranged on the other contact surface of the aluminum oxide passivation layer, a silicon dioxide tunneling layer is arranged on the bottom surface of the N-type semiconductor layer, an N-type passivation layer is arranged on the bottom surface of the silicon dioxide tunneling layer, a silicon nitride antireflection layer is arranged on the bottom surface of the N-type passivation layer, the grid lines comprise secondary grid lines and main grid lines, the secondary grid lines and the main grid lines can be made of one or more of silver, gold, copper, aluminum, nickel and the like, a back electrode is arranged on the bottom surface of the silicon nitride antireflection layer, and alignment marks are arranged on the lateral side of the bottom surface of the silicon nitride antireflection layer, for positioning when printing the pattern of the back electrode. Compared with the method for measuring by using the vernier caliper in the prior art, the solar cell provided by the embodiment has the advantages that the alignment mark is arranged on the back surface, so that the alignment is more accurate when the back electrode is printed, the alignment mark plays a role of a position reference object, the offset type can be quickly judged, and the printing offset can be solved by quickly adjusting the printing parameters, so that the proportion of bad wafers is effectively reduced, the wiping probability of the crystalline silicon solar cell is reduced, the production efficiency is improved, and the production cost is reduced.
Preferably, the secondary grid lines comprise top side secondary grid lines arranged on the top surface of the silicon oxide antireflection layer and bottom side secondary grid lines arranged on the bottom surface of the silicon nitride antireflection layer.
Preferably, the POF films are wrapped on the top surface of the silicon oxide antireflection layer and the bottom surface of the silicon nitride antireflection layer, so that the solar cell can be wrapped in a sealed mode, and transportation is facilitated.
Preferably, the thickness of the N-type semiconductor layer is 120-200 μm, and the P-type semiconductor layer is a structural layer configured after an N-type passivation layer is prepared.
Preferably, the thickness of the aluminum oxide passivation layer is 5nm-15 nm.
Preferably, the thickness of the silicon dioxide tunneling layer is 1nm-2 nm.
Preferably, the N-type passivation layer is arranged on the bottom surface of the silicon dioxide tunneling layer, the N-type passivation layer is a phosphorus-doped passivation layer and can protect the silicon dioxide tunneling layer and can provide passivation for the solar cell, the thickness of the N-type passivation layer is 100nm-200nm, the thicknesses of the silicon oxide anti-reflection layer and the silicon nitride anti-reflection layer are 100nm-150nm, and the thickness of the POF film is 400 μm.
Preferably, the alignment mark is disposed on the bottom surface of the silicon nitride anti-reflection layer by screen printing. In the actual production and processing process, firstly, the alignment mark is printed while the back electrode pattern is printed, and when the back electric field pattern is printed, the back electrode and the alignment mark are vacant to form an overprint alignment mode.
Preferably, the alignment marks are arranged at the edge part of the back surface of the solar cell piece, the middle part is reserved for printing the pattern of the back electrode, the limited space on the solar cell piece is fully utilized, and meanwhile, the alignment marks arranged at the periphery cannot be mixed with the middle pattern, so that the solar cell piece is more striking and is easy to identify.
Preferably, the distance between the alignment marks and the edge of the solar cell is 1-2mm, the specific number of the alignment marks is 2-4, the alignment marks are respectively arranged at the positions corresponding to the patterns of the back electrode, the alignment marks with proper number can play a sufficient positioning role, and meanwhile, the interference of excessive alignment marks on the patterns of the back electrode is also avoided.
Compared with the prior art, the invention has the beneficial effects that: the solar cell provided by the invention has a simple structure, is easy to produce and manufacture, can effectively protect the solar cell through the POF film, and the arranged alumina passivation layer and the silica tunneling layer improve the performance of the solar cell, and have the advantages of high reliability, small reflection coefficient, high efficiency, low loss and the like.
Drawings
FIG. 1 is a schematic structural layer diagram of a high-efficiency low-loss silicon solar cell of the present invention;
fig. 2 is a schematic bottom view of a high-efficiency low-loss silicon solar cell according to the present invention;
in the figure: 1. an N-type semiconductor layer; 2. a P-type semiconductor layer; 3. a PN junction layer; 4. an alumina passivation layer; 5. a silicon oxide antireflective layer; 6. a top side secondary grid line; 7. a silicon dioxide tunneling layer; 8. an N-type passivation layer; 9. a silicon nitride antireflective layer; 10. a bottom side secondary grid line; 11. a back electrode; 12. aligning and marking; 13. POF film.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
Referring to fig. 1-2, the present invention provides the following technical solutions: a high-efficiency low-loss silicon solar cell comprises a substrate and grid lines arranged on the top surface and the bottom surface of the substrate, wherein the substrate comprises an N-type semiconductor layer 1 and a P-type semiconductor layer 2, a PN junction layer 3 is formed at the contact surface of the N-type semiconductor layer 1 and the P-type semiconductor layer 2, an aluminum oxide passivation layer 4 is arranged on the top surface of the P-type semiconductor layer 2, a silicon oxide anti-reflection layer 5 is arranged on the other contact surface of the aluminum oxide passivation layer 4, a silicon dioxide tunneling layer 7 is arranged on the bottom surface of the N-type semiconductor layer 1, an N-type passivation layer 8 is arranged on the bottom surface of the silicon dioxide tunneling layer 7, a silicon nitride anti-reflection layer 9 is arranged on the bottom surface of the N-type passivation layer 8, the grid lines comprise secondary grid lines and main grid lines, the secondary grid lines can be made of one or more of silver, gold, copper, aluminum, nickel and the like, a back electrode 11 is arranged on the bottom surface of the silicon nitride anti-reflection layer 9, the silicon nitride antireflection layer 9 is provided with alignment marks 12 on the bottom surface sides thereof for positioning when the pattern of the back electrode 11 is printed. Compared with the method for measuring by using the vernier caliper in the prior art, the solar cell provided by the embodiment has the advantages that the alignment mark 12 is arranged on the back surface, so that the alignment of the back electrode 11 is more accurate during printing, and the alignment mark 12 plays a role of a position reference object, so that the offset type can be quickly judged, and the printing offset can be solved by rapidly adjusting the printing parameters, thereby effectively reducing the proportion of bad cells, reducing the wiping probability of the crystalline silicon solar cell, improving the production efficiency and reducing the production cost.
In order to make the gate lines more clear, in this embodiment, it is preferable that the finger lines include top side finger lines 6 disposed on the top surface of the silicon oxide anti-reflection layer 5 and bottom side finger lines 10 disposed on the bottom surface of the silicon nitride anti-reflection layer 9.
In order to improve the overall integrity of the solar cell, in this embodiment, preferably, the POF films 13 are wrapped outside the top surface of the silicon oxide antireflection layer 5 and the bottom surface of the silicon nitride antireflection layer 9, so that the solar cell can be hermetically wrapped and transported conveniently.
In order to make the N-type semiconductor layer 1 more practical, in this embodiment, it is preferable that the thickness of the N-type semiconductor layer 1 is 120 μm to 200 μm, the P-type semiconductor layer 2 is a structural layer configured after the N-type passivation layer 8 is prepared, the thickness of the aluminum oxide passivation layer 4 is approximately 5nm to 15nm, and the thickness of the silicon dioxide tunneling layer 7 is approximately 1nm to 2 nm.
In order to make the solar cell more stable, in this embodiment, it is preferable that the N-type passivation layer 8 is disposed on the bottom surface of the silicon dioxide tunneling layer 7, and the N-type passivation layer 8 is a phosphorus-doped passivation layer capable of protecting the silicon dioxide tunneling layer 7 and providing passivation for the solar cell, the thickness of the N-type passivation layer 7 may be, for example, 100nm to 200nm, the thicknesses of the silicon oxide anti-reflection layer 5 and the silicon nitride anti-reflection layer 9 may be 100nm to 150nm, and the thickness of the POF film 13 is 400 μm. In the manufacturing process, the N-type passivation layer is generated firstly and then boron doping is carried out on the surface of the silicon wafer, so that a PN junction is not formed on the top surface of the silicon wafer when the N-type passivation layer is generated, and the performance of the solar cell cannot be influenced even if phosphorus is plated to the top surface in a winding manner, so that the redundant working procedure is omitted, the cost is reduced, and the provided crystalline silicon solar cell is simple in structure and easy to produce and manufacture.
Preferably, the alignment marks 12 are disposed on the bottom surface of the silicon nitride anti-reflection layer 9 by screen printing. In the actual production process, the alignment mark 12 is printed at the same time as the back electrode 11 pattern is printed, and the back electrode 11 and the alignment mark 12 are set free to form an overprint alignment mode when the back electric field pattern is printed.
Preferably, the alignment marks 12 are arranged at the edge part of the back surface of the solar cell, the middle part is reserved for printing the pattern of the back electrode 11, the limited space on the solar cell is fully utilized, and meanwhile, the alignment marks 12 arranged at the periphery are not mixed with the middle pattern, so that the solar cell is more striking and easy to identify.
In order to make the alignment marks more clear, in this embodiment, preferably, the distance between the alignment marks 12 and the edge of the solar cell is 1-2mm, and the specific number of the alignment marks 12 is 2-4, and the alignment marks are respectively disposed at positions corresponding to the patterns of the back electrode 11, so that the appropriate number of the alignment marks 12 can perform a sufficient positioning function, and meanwhile, the interference of too many alignment marks 12 on the patterns of the back electrode 11 is also avoided.
The solar cell provided by the invention has a simple structure, is easy to produce and manufacture, can effectively protect the solar cell through the POF film 13, has the advantages of high reliability, small reflection coefficient, high efficiency, low loss and the like due to the arrangement of the aluminum oxide passivation layer 4 and the silicon dioxide tunneling layer 7, and has wide market prospects in the application and popularization of solar cell production, the alignment mark 12 is adopted to ensure that the back electrode 11 is aligned more accurately during printing, the printing offset probability of the solar cell is reduced, the wiping probability is reduced, the production efficiency is further improved, the cost is reduced, and the POF film 13 can ensure that the solar cell is transported more safely.
Here, the color, material, and the like of the alignment marks 12 are not particularly limited, and any method that is sufficiently conspicuous to function as a positioning mark is possible. Of course, the shape and size of the alignment marks 12 are not limited thereto, and can be adjusted appropriately according to the actual size of the crystalline silicon solar cell and the specific use situation, and various modifications of these embodiments will be obvious to those skilled in the art and will not be described herein again.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The foregoing description of various embodiments of the invention is provided for the purpose of illustration to one of ordinary skill in the relevant art. It is not intended that the invention be limited to a single disclosed embodiment. As mentioned above, many alternatives and modifications of the present invention will be apparent to those skilled in the art of the above teachings. Thus, while some alternative embodiments are specifically described, other embodiments will be apparent to, or relatively easily developed by, those of ordinary skill in the art. The present invention is intended to embrace all such alternatives, modifications and variances of the present invention described herein, and other embodiments that fall within the spirit and scope of the present invention as described above
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.