CN113206176B - 选区刻蚀外延Micro-LED芯片及其设计、制备方法 - Google Patents
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Abstract
本发明公开了一种选区刻蚀外延Micro‑LED芯片及其设计、制备方法。具体为:在蓝宝石衬底上依次生长n‑GaN层、多量子阱层、p‑GaN层,沉积SiO2绝缘层,在SiO2绝缘层上刻蚀微孔阵列,利用改性的p‑GaN的低导电性,电流拓展只在微孔阵列下方,实现微孔像素点的隔离,在衬底上放置颜色转换单元,包括:表面涂覆Ag的超黑矩阵遮光层、GaInP纳米线聚合物薄膜、紫外光AlGaN/GaNDBR反射镜、RGB三色滤光片,得到减少串扰提高颜色转换效率Micro‑LED芯片。
Description
技术领域
本发明涉及半导体发光器件技术领域,具体涉及一种选区刻蚀外延Micro-LED芯片及其设计、制备方法。
背景技术
将LED芯片的尺寸缩小至几十微米甚至几微米时,则称为Micro-LED芯片,Micro-LED 显示是一种由微米级半导体发光单元组成的阵列显示技术,和传统的OLED、LCD显示技术相比,Micro-LED具有高亮度、宽色域、能耗低、响应时间快、可靠性高等优点,因此在可穿戴设备、增强现实(AR)、虚拟现实(VR)、可见光通信等领域具有十分广阔的应用前景,也被视为下一代显示技术。
和一般的大尺寸LED芯片相比,Micro-LED芯片的侧壁面积和台面面积之比更大,而且在器件制备过程中采用干法刻蚀工艺会不可避免的在芯片侧壁附近造成损伤,对于大尺寸LED 干法刻蚀导致的表面损伤问题可以近似忽略,但是对于小尺寸Micro-LED芯片,尤其是作为 AR、VR关键器件的尺寸小于5μm的Micro-LED芯片,会导致Micro-LED芯片表面非辐射复合比例上升,辐射复合下降,从而使得内量子效率下降,外量子效率也因而下降。由于 Micro-LED在较低电流密度下工作,如何抑制表面非辐射复合从而提高内量子效率是影响器件性能的重要因素。
将Micro-LED用在显示上实现全彩化,需要解决RGB三基色的问题,和一般的将RGB三基色LED芯片分别集成在同衬底上的技术相比,利用短波长紫外光激发纳米线阵列发光实现颜色转换的全彩显示方案无需在不同晶圆上分割出单色Micro-LED芯片组成RGB像素,但是容易出现RGB三基色的串扰,降低Micro-LED的显示性能。
发明内容
本发明要解决的技术问题是:减少传统的干法刻蚀工艺对于Micro-LED芯片造成的侧壁损失,提高内量子效率从而提高外量子效率,减少全彩化Micro-LED RGB三基色的串扰,通过颜色转换单元提高全彩化Micro-LED颜色转换效率,提高Micro-LED芯片显示性能。
为了实现上述目的,本发明所采取的技术方案如下:
第一方面,本发明提供一种选区刻蚀外延Micro-LED芯片,其特征在于:它包括:衬底、衬底上依次外延生长有n-GaN层、多量子阱层、p-GaN层,沉积SiO2绝缘层,在SiO2绝缘层刻蚀直达p-GaN层的特定形状像素点阵列,置于Micro-LED芯片衬底的颜色转换单元,颜色转换单元包括:表面涂覆Ag的超黑矩阵遮光层、放置在遮光层网格内的GaInP纳米线阵列聚合物薄膜、紫外光AlGaN/GaN DBR反射镜、RGB三色滤光片。
按上述方案,所述衬底为蓝宝石衬底,厚度为200-300μm;所述n-GaN层厚度为2-4μm;所述多量子阱层为多对AlxGa1-xN/AlyGa1-yN;所述SiO2绝缘层厚度为5-10μm;所述Micro-LED 芯片有源区发出的为波长在390nm以下的紫外光。
按上述方案,在所述SiO2绝缘层刻蚀形成的特定形状微孔阵列,刻蚀至暴露出p-GaN层,刻蚀深度与SiO2绝缘层厚度一致,每个微孔尺寸为边长10-20μm的正方形,相邻微孔间距为 3μm。
按上述方案,对外延结构在室温下进行等离子处理,所述外延结构包含n-GaN层、多量子阱层、p-GaN层和沉积SiO2绝缘层;对p-GaN进行改性,降低其导电性,利用p-GaN的低导电性,电流拓展只在微孔阵列下方,每个微孔对应发光像素点的大小由刻蚀形成微孔阵列尺寸决定,实现像素点间的隔离。
按上述方案,放置于Micro-LED芯片衬底的颜色转换单元,表面涂覆Ag的超黑矩阵遮光层具有网格化几何图形,网格化几何图形中的网格尺寸与SiO2绝缘层刻蚀形成的像素点尺寸一致,网格化几何图形中的网格间距与SiO2绝缘层刻蚀形成的像素点间距一致,超黑矩阵遮光层高度为10-15μm。
按上述方案,在与像素点一一对应的颜色转换单元网格内部放置GaInP纳米线阵列聚合物薄膜,所述GaInP纳米线阵列聚合物薄膜通过在GaAs衬底上生长GaInP,经选区刻蚀获得纳米线阵列,剥离衬底后嵌入PDMS中获得,改变GaInP纳米线阵列中Ga In组分实现三种颜色转换。
按上述方案,紫外光AlGaN/GaN DBR反射镜置于超黑矩阵遮光层上,在紫外光AlGaN/GaN DBR反射镜上放置与网格(像素点)对准的RGB三色滤光片。
第二方面,本发明提供一种上述选区刻蚀外延Micro-LED芯片设计、制备方法,按上述方案,其特征在于:包括如下步骤:
S1.提供蓝宝石衬底,利用MOCVD技术在蓝宝石衬底上依次生长n-GaN层、多量子阱层、 p-GaN层;
S2.利用PECVD技术在p-GaN上沉积SiO2绝缘层;
S3.采用光刻技术将掩膜版上的图形转移到SiO2绝缘层上,然后采用ICP技术对SiO2绝缘层进行选区刻蚀形成微孔阵列,每个微孔深度直达p-GaN层表面,在所述包含n-GaN层、多量子阱层、p-GaN层,沉积SiO2绝缘层的外延边缘刻蚀直达n-GaN层,形成台面结构;
S4.室温下采用等离子体处理技术对p-GaN进行改性,降低其导电性;
S5.采用电子束蒸发技术沉积Cr/Al/Ti/Au多金属层,采用剥离工艺去除部分金属,在n-GaN 层台面结构上制备n电极,在暴露出p-GaN的微孔阵列上制备p电极;
S6.将超黑矩阵遮光层置于Micro-LED芯片衬底,超黑矩阵遮光层形成网格结构,并将超黑矩阵遮光层网格与SiO2绝缘层上刻蚀微孔阵列一一对准,在网格内部放置GaInP纳米线阵列聚合物薄膜;
S7.将紫外光AlGaN/GaN DBR反射镜置于超黑矩阵遮光层上,在紫外光AlGaN/GaNDBR 反射镜上放置与像素点对准的RGB三色滤光片;
S8.将p、n电极分别与基板固定连接,得到倒装结构的选区刻蚀外延Micro-LED芯片。
按上述方案,所述S5中采用电子束蒸发技术沉积Cr/Al/Ti/Au多金属层将SiO2绝缘层上微孔阵列完全填充,微孔阵列中多金属层厚度与SiO2绝缘层厚度一致。
本发明的优点及有益效果如下:
本发明利用一种新的方法定义Micro-LED芯片像素点的尺寸,避免了传统干法刻蚀工艺在芯片侧壁附近造成损伤,降低芯片表面非辐射复合效率,提高了芯片内部辐射复合效率,同时在倒装结构Micro-LED芯片衬底上放置减少颜色串扰提高颜色转换效率的颜色转换单元,颜色转换单元内部放置GaInP纳米线阵列聚合物薄膜,实现了全彩显示,减少了光学串扰,提高了颜色转换效率,提高了显示性能。
附图说明
图1为本发明实例制备的Micro-LED芯片完整结构示意图;
图2为本发明实例沉积SiO2绝缘层结构示意图
图3为本发明实例选择性刻蚀SiO2绝缘层形成微孔阵列以及台面结构示意图
图4为本发明实例制备n、p电极结构示意图
图5为本发明实例颜色转换单元平面结构示意图
图6为本发明实例颜色转换单元侧面结构示意图
图中:1.蓝宝石衬底 2.n-GaN层 3.多量子阱层 4.p-GaN层 5.SiO2绝缘层 6.p电极 7.基板 8.n电极 9.超黑矩阵遮光层 10.GaInP纳米线阵列聚合物薄膜 11.表面涂覆Ag薄膜 12.紫外光 AlGaN/GaN DBR反射镜 13.滤光片
具体实施方式
以下将结合具体实施例和附图对本发明的方案作进一步地详细描述。
实施例1
提供一种选区刻蚀外延的减少串扰全彩化Micro-LED阵列设计及制备方法,具体包括以下步骤:
S1.提供厚度为200μm的蓝宝石衬底1,利用MOCVD技术在蓝宝石衬底上依次生长厚度为3μm的n-GaN层2、总厚度为65nm的5对Al0.47Ga0.53N(10nm)/Al0.57Ga0.43N(3nm)多量子阱层3、厚度为3μm的p-GaN层4;
S2.在S1所得外延结构上,外延结构包含n-GaN层、多量子阱层、p-GaN层和沉积SiO2绝缘层,利用PECVD技术在p-GaN上沉积厚度为5μm的SiO2绝缘层5,如图2所示;
S3.采用光刻技术将掩膜版上的图形转移到SiO2绝缘层上,然后采用ICP技术对SiO2绝缘层进行选区刻蚀形成微孔阵列,单个微孔几何形状为边长为10μm的正方形,相邻微孔间距为3μm,微孔深度直达p-GaN层表面,在所述外延边缘刻蚀直达n-GaN层,形成台面结构,如图3所示;
S4.对S3所得外延结构在室温下采用CHF3、Ar气体对p-GaN进行等离子体处理,对p-GaN 进行改性,降低其导电性;
S5.采用电子束蒸发技术沉积Cr/Al/Ti/Au多金属层,采用剥离工艺去除部分金属,在540℃ N2氛围下退火,在n-GaN层台面结构上制备n电极8,在暴露出p-GaN的微孔阵列上制备p 电极6;
S6.将超黑矩阵遮光层9置于Micro-LED芯片衬底,超黑矩阵遮光层形成网格结构,并将超黑矩阵遮光层网格与SiO2绝缘层上刻蚀微孔阵列一一对准,在网格内部放置GaInP纳米线阵列聚合物薄膜10;
S7.将紫外光AlGaN/GaN DBR 12反射镜置于超黑矩阵遮光层上,在紫外光AlGaN/GaN DBR反射镜上放置与网格(像素点)对准的RGB三色滤光片13,组成的颜色转换单元如图6 所示;
S8.利用Au-Sn共晶焊技术将p、n电极分别与具有高热导率的目标基板7焊接,得到倒装结构的选区刻蚀外延Micro-LED芯片阵列,如图1所示。
Claims (7)
1.一种选区刻蚀外延Micro-LED芯片,其特征在于:包括衬底,所述衬底上依次外延生长有n-GaN层、多量子阱层、p-GaN层,沉积SiO2绝缘层;在所述SiO2绝缘层刻蚀直达p-GaN层的特定形状微孔构成像素点阵列,刻蚀深度与SiO2绝缘层厚度一致,置于Micro-LED芯片衬底的颜色转换单元,所述颜色转换单元包括:表面涂覆Ag的超黑矩阵遮光层,放置在遮光层网格内的GaInP纳米线阵列聚合物薄膜,紫外光AlGaN/GaN DBR反射镜和RGB三色滤光片;
室温下采用等离子体处理技术对p-GaN进行改性,降低其导电性;利用p-GaN的低导电性,电流拓展只在微孔阵列下方,每个微孔对应发光像素点的大小由刻蚀形成微孔阵列尺寸决定,实现像素点间的隔离;
在与像素点一一对应的颜色转换单元网格内部放置GaInP纳米线阵列聚合物薄膜;所述GaInP纳米线阵列聚合物薄膜通过在GaAs衬底上生长GaInP,经选区刻蚀获得纳米线阵列,剥离衬底后嵌入PDMS中获得,改变GaInP纳米线阵列中Ga In组分从而实现三种颜色转换。
2.根据权利要求1所述的选区刻蚀外延Micro-LED芯片,其特征在于:所述衬底为蓝宝石衬底,厚度为200-300μm;所述n-GaN层厚度为2-4μm;所述多量子阱层为多对AlxGa1-xN/AlyGa1-yN;所述SiO2绝缘层厚度为5-10μm;所述Micro-LED芯片多量子阱层发出的为波长在390nm以下的紫外光。
3.根据权利要求1或2所述的选区刻蚀外延Micro-LED芯片,其特征在于:在所述SiO2绝缘层刻蚀形成的特定形状微孔阵列,刻蚀至暴露出p-GaN层,刻蚀深度与SiO2绝缘层厚度一致,每个微孔尺寸为边长10-20μm的正方形,相邻微孔间距为3μm。
4.根据权利要求3所述的选区刻蚀外延Micro-LED芯片,其特征在于:放置于Micro-LED芯片衬底的颜色转换单元,表面涂覆Ag的超黑矩阵遮光层具有网格化几何图形,网格化几何图形中的网格尺寸与SiO2绝缘层刻蚀形成的像素点尺寸一致,网格化几何图形中的网格间距与SiO2绝缘层刻蚀形成的像素点间距一致,超黑矩阵遮光层高度为10-15μm。
5.根据权利要求4所述的选区刻蚀外延Micro-LED芯片,其特征在于:所述紫外光AlGaN/GaN DBR反射镜置于超黑矩阵遮光层上,在紫外光AlGaN/GaN DBR反射镜上放置与像素点对准的RGB三色滤光片。
6.一种如权利要求5所述的选区刻蚀外延Micro-LED芯片的设计、制备方法,其特征在于:包含如下步骤:
S1.提供蓝宝石衬底,利用MOCVD技术在蓝宝石衬底上依次生长n-GaN层、多量子阱层、p-GaN层;
S2.利用PECVD技术在p-GaN上沉积SiO2绝缘层;
S3.采用标准光刻技术将掩膜版上的图形转移到SiO2绝缘层上,然后采用ICP技术对SiO2绝缘层进行选区刻蚀形成微孔阵列,每个微孔深度直达p-GaN层表面,在包含n-GaN层、多量子阱层、p-GaN层,沉积SiO2绝缘层的外延结构边缘刻蚀直达n-GaN层,形成台面结构;
S4.室温下采用等离子体处理技术对p-GaN进行改性,降低其导电性;
S5.采用电子束蒸发技术沉积Cr/Al/Ti/Au多金属层,采用剥离工艺去除部分金属,在n-GaN层台面结构上制备n电极,在暴露出p-GaN的微孔阵列上制备p电极;
S6.将超黑矩阵遮光层置于Micro-LED芯片衬底,超黑矩阵遮光层形成网格结构,并将超黑矩阵遮光层网格与SiO2绝缘层上刻蚀微孔阵列一一对准,在网格内部放置GaInP纳米线阵列聚合物薄膜;
S7.将紫外光AlGaN/GaN DBR反射镜置于超黑矩阵遮光层上,在紫外光AlGaN/GaN DBR反射镜上放置与像素点对准的RGB三色滤光片;
S8.将p、n电极分别与基板固定连接,得到倒装结构的选区刻蚀外延Micro-LED芯片。
7.根据权利要求6所述的选区刻蚀外延Micro-LED芯片的设计、制备方法,其特征在于:所述S5中采用电子束蒸发技术沉积Cr/Al/Ti/Au多金属层将SiO2绝缘层上微孔阵列完全填充,微孔阵列中多金属层厚度与SiO2绝缘层厚度一致。
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