CN113201728A

CN113201728A - Semiconductor wafer bearing structure and metal organic chemical vapor deposition device

Info

Publication number: CN113201728A
Application number: CN202110469780.4A
Authority: CN
Inventors: 赖彦霖; 吴俊德; 陈佶亨
Original assignee: Chuangchuang Display Technology Co ltd
Current assignee: Chuangchuang Display Technology Co ltd
Priority date: 2021-04-28
Filing date: 2021-04-28
Publication date: 2021-08-03
Anticipated expiration: 2041-04-28
Also published as: CN113201728B

Abstract

The embodiment of the invention provides a semiconductor wafer bearing structure and a metal organic chemical vapor deposition device, wherein the semiconductor wafer bearing structure comprises: a carrier tray; and the patterned heat conducting part is arranged on the bearing plate, wherein at least one part of the patterned heat conducting part has a different heat conduction coefficient from that of the bearing plate.

Description

Semiconductor wafer bearing structure and metal organic chemical vapor deposition device

Technical Field

Embodiments of the present disclosure relate to a semiconductor wafer supporting structure, and more particularly, to a semiconductor wafer supporting structure including a patterned heat conducting portion and a metal organic chemical vapor deposition apparatus.

Background

In a process of Metal Organic Chemical Vapor Deposition (MOCVD) or the like in which a susceptor is used to support a wafer, a current mainstream method is to change a temperature distribution by adjusting a depth of a surface of the susceptor to further affect characteristics of a grown chip. For example, by adjusting the carrying structure for forming the Light Emitting Diode (LED) chip to have a uniform temperature distribution, the wavelength uniformity of the LED chip can be improved, so that the yield is improved and the production cost is reduced.

However, while conventional carrier trays generally meet their intended purpose, they have not been completely satisfactory in every aspect. In the conventional method, since the machining for adjusting the surface depth of the susceptor has its limitation, it is difficult to correct for a slight temperature change. Therefore, the conventional method for controlling the temperature of the carrier tray cannot satisfy the process of the component assembly requiring high dimensional accuracy, such as micro light emitting diode (micro LED). How to more effectively adjust the temperature distribution on the surface of the susceptor and further improve the properties of the wafer (e.g., the wavelength distribution of the led chips formed later) is still one of the issues of the present industry.

Disclosure of Invention

An embodiment of the present invention provides a semiconductor wafer supporting structure, including: a carrier tray; and the patterned heat conducting part is arranged on the bearing plate, wherein at least one part of the patterned heat conducting part has a different heat conduction coefficient from that of the bearing plate.

An embodiment of the present invention further provides a metal organic chemical vapor deposition apparatus, including: a carrier body (carrier body) having a plurality of carrier units; and the semiconductor wafer bearing structure is accommodated in at least one of the bearing units.

Drawings

The embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various features are not drawn to scale and are merely illustrative. In fact, the dimensions of the elements may be arbitrarily expanded or reduced to clearly illustrate the features of the embodiments of the present invention.

Figure 1A is a top view illustrating a semiconductor wafer carrier structure, according to some embodiments of the present disclosure;

figure 1B is a cross-sectional view illustrating a semiconductor wafer carrier structure, according to some embodiments of the present disclosure;

fig. 1C and 1D are cross-sectional views illustrating a semiconductor wafer carrier structure according to other embodiments of the present disclosure;

2A-2C are top views illustrating semiconductor wafer carrier structures according to other embodiments of the present disclosure;

figure 3A is a top view illustrating a semiconductor wafer carrier structure according to other embodiments of the present disclosure;

figure 3B is a cross-sectional view illustrating a semiconductor wafer carrier structure, according to other embodiments of the present disclosure;

FIG. 3C is a cross-sectional view of the first outer heat conducting portion according to the embodiment of FIGS. 3A and 3B;

FIG. 3D is a cross-sectional view of the second outer heat conducting portion according to the embodiment of FIGS. 3A and 3B;

figure 3E is a top view illustrating a semiconductor wafer carrier structure, according to other embodiments of the present disclosure;

fig. 4A is a cross-sectional view illustrating MOCVD apparatus 10, according to some embodiments of the present disclosure;

fig. 4B is a schematic diagram illustrating a semiconductor wafer carrier structure 100 including a carrier body 400 according to some embodiments of the present disclosure.

Description of the reference numerals

10 MOCVD apparatus

100,200,300 semiconductor wafer carrier structure

120 bearing disc

122 support part

124: projection

126,128 grooves

140,240,340 patterned thermal conductor

142,242,342 inner heat conducting part

144 outer heat conducting part

244,344 first external heat conducting part

246,346 second external heat-conducting portion

344-1,346-1 part

344-2,346-2 second part

360 protective layer

400 bearing body

420 bearing unit

440 spacer

500 supporting part

600 heating part

700 nozzle

800 at the air outlet

A-A, B-B cross section

D₁,D₂,D₃Width (L)

C is a cavity

W is wafer

Detailed Description

The following disclosure provides many different embodiments, or examples, for illustrating different components of embodiments of the invention. Specific examples of components and arrangements thereof are disclosed below to simplify the present disclosure. Of course, these specific examples are not intended to limit the disclosure. For example, the following summary of the present specification describes forming a first feature over or on a second feature, i.e., embodiments in which the formed first and second features are in direct contact, and embodiments in which additional features may be formed between the first and second features, i.e., the first and second features are not in direct contact. Moreover, various examples in the disclosure may use repeated reference characters and/or words. These repeated symbols or words are provided for simplicity and clarity and are not intended to limit the relationship between the various embodiments and/or the described configurations.

Also, spatially relative terms, such as "under …," "below," "lower," "above," "upper," and the like, may be used herein for convenience in describing the relationship of one element or component to another element(s) or component(s) in the figures. Spatially relative terms may encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. When the device is turned to a different orientation (e.g., rotated 90 degrees or otherwise), the spatially relative adjectives used herein will also be interpreted in terms of the turned orientation.

As used herein, the term "about", "about" or "substantially" generally means within 20%, preferably within 10%, and more preferably within 5%, or within 3%, or within 2%, or within 1%, or within 0.5% of a given value or range. It should be noted that the amounts provided in the specification are approximate amounts, i.e., the meanings of "about", "about" and "about" may be implied without specific recitation of "about", "about" and "about".

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Compared with the prior art in which the entire surface of the carrier tray is covered by a single material, in the semiconductor wafer carrier structure of the present disclosure, by forming the patterned heat conduction portion of the material having a different thermal conductivity coefficient relative to the carrier tray on the carrier tray, the temperature difference of the surface of the carrier tray during the manufacturing process can be more precisely adjusted, or the temperature distribution of the surface of the carrier tray can be adjusted or various modes of temperature distribution can be generated according to the temperature modulation required by the target wafer (e.g., the temperature modulation designed according to the wavelength of the led chip). For example, in the process of forming the micro light emitting diode by using the MOCVD process, the uniform temperature distribution which cannot be achieved by the prior art can be generated on the surface of the bearing disc of the semiconductor wafer bearing structure by changing the pattern and the heat conduction coefficient of the patterned heat conduction part, so that the formed micro light emitting diode chip has uniform wavelength distribution; in other embodiments, the temperature distribution of the surface of the carrier tray may be adjusted to make the formed micro led chip have a specific wavelength distribution.

Fig. 1A is a top view illustrating a semiconductor wafer carrier structure 100, according to some embodiments of the present disclosure. In the semiconductor wafer carrying structure 100, a carrier tray 120 for carrying a semiconductor wafer is provided, and a patterned thermal conduction portion 140 is disposed on a surface of the carrier tray 120 for carrying the wafer, wherein at least a portion of the patterned thermal conduction portion 140 has a different thermal conductivity from that of the carrier tray 120.

In some embodiments, the material of the carrier platter 120 may include graphite, silicon carbide, ceramic, quartz, graphene, combinations of the foregoing, or other suitable materials. Furthermore, in some embodiments, the material of the patterned thermal conductor 140 may include silicon carbide (SiC), tantalum carbide (TaC), graphite, ceramic, quartz, graphene, diamond-like films, combinations of the foregoing, or other suitable materials, as long as at least a portion of the patterned thermal conductor 140 has a different thermal conductivity coefficient than the carrier platter 120. For example, for the area of the carrier plate 120 that needs to be heated, a material with a relatively low thermal conductivity may be selected to form part of the patterned thermal conductive portion 140, so that heat is difficult to be conducted in a direction parallel to the surface of the carrier plate 120, thereby achieving the thermal insulation effect. On the other hand, for the area needing cooling, a material with a relatively high thermal conductivity coefficient may be selected to form a part of the patterned thermal conductive portion 140, so that heat is easily conducted in a direction parallel to the surface of the carrier tray 120, thereby achieving a heat dissipation effect. In some embodiments, some of the patterned thermal conductive portions 140 may have the same thermal conductivity coefficient as the carrier tray 120. In this case, the patterned thermal conductive portion 140 may be regarded as a part of the carrier tray 120. By fine-tuning the thickness of the patterned thermal conductive portion 140 having the same thermal conductivity as that of the carrier plate 120, the thermal conductivity of the carrier plate 120 can be locally changed to meet the process requirements.

The semiconductor wafer carrier structure 100 may carry a wafer for deposition in an MOCVD process, although the application of the present disclosure is not limited to the MOCVD process. The semiconductor wafer carrying structure 100 may also be used for other processes, such as Physical Vapor Deposition (PVD), Chemical Vapor Deposition (CVD), Atomic Layer Deposition (ALD), and the like. In some embodiments, since the semiconductor wafer carrier structure 100 can be rotated during the above-mentioned process to achieve a uniform temperature distribution on the surface of the susceptor 120, the pattern of the patterned thermal conduction portion 140 may include, for example, a circle, a ring, other symmetrical patterns, or a combination thereof, so as to be symmetrically distributed with respect to the center of the susceptor 120. In addition to achieving a uniform temperature distribution, in other embodiments, other patterns of temperature distribution on the surface of the carrier tray 120 may be formed by varying the pattern and/or thermal conductivity of the patterned thermal conductor according to manufacturing requirements.

According to some embodiments of the present disclosure, referring to fig. 1A, the patterned thermal conduction portion 140 may include an inner thermal conduction portion 142 and an outer thermal conduction portion 144 relatively distant from the center of the carrier platter in a radial direction. Furthermore, in the embodiment shown in fig. 1A, the inner heat conducting portion 142 is a circular heat conducting portion covering the center of the carrier tray 120, and the outer heat conducting portion 144 is an annular heat conducting portion. The width of the patterned thermal conductive portion 140 is not particularly limited in the embodiments of the present disclosure. In some embodiments, the diameter D1 of the carrier tray 120 is 25mm to 250mm, and the width of each of the patterned thermal conductors 140 (e.g., the width D2 of the inner thermal conductor 142 and the width D3 of the outer thermal conductor 144 in fig. 1A) may be less than 34% of the diameter D1 of the carrier tray 120, respectively. As described above, the width or distribution of the patterned thermal conduction portion 140 mainly affects the temperature field distribution of the semiconductor wafer carrying structure 100, so that the smaller width (or area) and the multi-layer distribution can help to finely control the temperature of each region on the wafer. However, the preferred ratio of the widths may vary as the dimensions of the susceptor 120 or carrier wafer evolve, as the thermal conductivity characteristics of the materials of the components vary, and so on.

As shown in fig. 1A, in some embodiments, the susceptor 120 has a plurality of supporting portions 122 at an edge thereof for supporting the wafer or the substrate, and the plurality of supporting portions 122 may be symmetrically distributed with respect to a center of the susceptor 120. Although only six supporting portions 122 are shown on the carrier tray 120 in fig. 1A, the disclosure is not limited thereto, and one skilled in the art can select the proper number, shape and position of the supporting portions 122 according to design requirements. In some embodiments, the support 122 may be formed of the same material as the carrier tray 120, and may be considered as a part of the carrier tray 120.

Fig. 1B is a cross-sectional view of the semiconductor wafer carrier structure 100, illustrated by section a-a of fig. 1A, according to some embodiments of the present disclosure. The thickness of the patterned thermal conductive portion 140 is not particularly limited in the embodiments of the present disclosure. For example, in an embodiment in which the diameter D1 of the carrier tray 120 is 25mm to 250mm, the thickness of the patterned thermal conduction part 140 may be 0.0006% to 0.7% of the diameter D1 of the carrier tray 120. As shown in fig. 1B, the top of the supporting portion 122 may be higher than the top of the patterned heat conduction portion in the thickness direction (Z direction) of the susceptor 120, so that the supporting portion 122 may be used to contact the back surface of the wafer W during the MOCVD process, and the patterned heat conduction portion 140 does not directly contact the wafer W.

According to some embodiments of the present disclosure, the cross-sectional shape of the patterned thermal conduction portion 140 may include a rectangle, a trapezoid, an arc, a triangle, a combination of the foregoing, or other suitable shapes when viewed from a direction parallel to the surface of the carrier tray 120. For example, in one embodiment, referring to fig. 1B, the cross-sectional shape of the patterned thermal conduction portion 140 is rectangular. In another embodiment, referring to fig. 1C, the cross-sectional shape of the patterned thermal conduction portion 140 is an arc. In yet another embodiment, referring to fig. 1D, the cross-sectional shape of the patterned thermal conduction portion is triangular. Although the inner and outer heat

conductive portions

142, 144 are shown as having the same cross-sectional shape in the embodiment shown in fig. 1B-1D (e.g., both inner and outer heat

conductive portions

142, 144 in fig. 1B are rectangular in cross-sectional shape), in other embodiments, the inner and outer heat

conductive portions

142, 144 may be formed with different cross-sectional shapes. By forming the patterned heat conductive part 140 with various sectional shapes, the temperature distribution can be adjusted on the surface of the carrier tray 120 according to the manufacturing requirements.

It should be understood that although the inner and outer

heat conduction portions

142 and 144 are formed to be spaced apart from each other in the embodiment of fig. 1A to 1D, a plurality of heat conduction portions may be connected to each other in other embodiments of the present disclosure. Further, in some embodiments, the same material may be used to form the inner and outer heat

conductive portions

142, 144, but in other embodiments, the inner and outer heat

conductive portions

142, 144 may be formed of materials having different thermal conductivity coefficients. For example, in some embodiments, the outer heat conducting portion 144 has a thermal conductivity greater than the thermal conductivity of the inner heat conducting portion 142. In various embodiments of the present disclosure, one skilled in the art can determine the thermal conductivity and relative position of each thermal conductive portion according to the temperature modulation required by the target wafer.

Fig. 2A is a top view illustrating a semiconductor wafer carrier structure 200 according to other embodiments of the present disclosure. For simplicity of description, like components will be designated with the same or similar reference numerals as in fig. 1A. Referring to fig. 2A, the patterned thermal conduction portion 240 on the carrier plate 120 includes an inner thermal conduction portion 242, a first outer thermal conduction portion 244, and a second outer thermal conduction portion 246 relatively far from the center of the carrier plate 120 in the radial direction, wherein each portion of the first outer thermal conduction portion 244 and the second outer thermal conduction portion 246 can be regarded as a plurality of outer thermal conduction areas. These outer heat transfer areas are spaced apart from each other and are symmetrically distributed with respect to the center of the carrier plate 120. Furthermore, in the embodiment shown in fig. 2A, the first outer heat conducting portion 244 is ring-shaped and the second outer heat conducting portion 246 is arc-shaped spaced from each other, seen in the Z-direction, with the support portion 122 of the carrier tray 120 located between the arc-shapes. With this arrangement, the temperature distribution on the surface of the susceptor 120 can be further adjusted along the outer side of the susceptor 120 while contacting the wafer with the supporting portions 122. Although the second outer thermal conductive portion 246 is illustrated as six outer thermal conductive areas spaced apart from one another in fig. 2A, in other embodiments, the shape and location of each outer thermal conductive area, and further the number of thermal conductive areas included in each thermal conductive portion, may be determined based on the desired temperature modulation of the target wafer. In some embodiments, the inner heat conducting portion 242, the first outer heat conducting portion 244, and the second outer heat conducting portion 246 may be formed of the same material. In other embodiments, portions of the inner heat transfer portion 242, the first outer heat transfer portion 244, and the second outer heat transfer portion 246 may be formed from materials that are not all identical.

Fig. 2B and 2C are top views of a semiconductor wafer carrier structure 200 according to other embodiments of the present disclosure. For simplicity of explanation, similar components will be denoted by the same or similar reference numerals as in fig. 1A, 2A. Those skilled in the art can use various shapes of heat conducting portions according to the desired temperature modulation of the target wafer, even using a combination of multiple heat conducting areas to form individual heat conducting portions and desired profiles.

In some embodiments, each heat conducting portion may include a plurality of heat conducting areas of various shapes, respectively. As shown in fig. 2B, the patterned thermal conduction portion 240 on the carrier plate 120 includes an inner thermal conduction portion 242, a first outer thermal conduction portion 244, and a second outer thermal conduction portion 246 relatively far from the center of the carrier plate 120 in the radial direction. In the embodiment shown in fig. 2B, the inner heat conducting portion 242 comprises a plurality of inner heat conducting areas in the shape of sectors spaced apart from each other and symmetrical with respect to the center of the carrier plate 120, and the arcs of the inner heat conducting areas in the shape of sectors collectively form a circular profile. The portions of the first and second outer

heat transfer portions

244, 246 in the embodiment shown in fig. 2B can be considered as a plurality of outer heat transfer areas that are spaced apart from each other and symmetrically distributed about the center of the carrier plate 120. In the embodiment shown in FIG. 2B, the first outer heat transfer portion 244 includes a plurality of curved, arcuate outer heat transfer areas, and the distribution of the arcuate outer heat transfer areas together generally defines an annular profile. Furthermore, the second outer heat conducting portions 246 are sectors spaced apart from each other, wherein the supporting portion 122 of the carrier tray 120 is located between the sectors. With this arrangement, the temperature distribution on the surface of the susceptor 120 can be further adjusted along the outer side of the susceptor 120 while contacting the wafer with the supporting portions 122. Although the second outer thermal conductive portion 246 is illustrated as six outer thermal conductive areas spaced apart from one another in fig. 2B, in other embodiments, the shape and location of each outer thermal conductive area, and further the number of thermal conductive areas included in each thermal conductive portion, may be determined based on the desired temperature modulation of the target wafer. In some embodiments, the respective thermal conduction areas of the inner thermal conduction portion 242, the first outer thermal conduction portion 244, and the second outer thermal conduction portion 246 may be formed of the same material. In other embodiments, the respective heat transfer areas of the inner heat transfer portion 242, the first outer heat transfer portion 244, and the second outer heat transfer portion 246 may be formed from different materials.

In some embodiments, as shown in fig. 2C, the patterned thermal conduction portion 240 on the carrier tray 120 includes an inner thermal conduction portion 242 and a first outer thermal conduction portion 244 relatively far from the center of the carrier tray 120 in the radial direction, and the patterned thermal conduction portion 240 is formed entirely by a plurality of circular thermal conduction areas. In the embodiment shown in fig. 2C, the inner heat conducting portion 242 comprises a plurality of circular inner heat conducting areas spaced apart from each other and symmetrical relatively far from the center of the carrier plate 120, and the circular inner heat conducting areas together form a substantially circular outline at their periphery. In the embodiment shown in fig. 2C, the first outer heat-conducting portion 244 includes a plurality of circular outer heat-conducting areas spaced apart from each other and symmetrical with respect to the center of the carrier plate 120, and the distribution of the circular outer heat-conducting areas together form a substantially annular profile. Although the inner heat conductive portion 242 is shown in fig. 2C as being formed of seven circular inner heat conductive areas and the first outer heat conductive portion 244 is shown as being a pattern having an annular arrangement of two circular outer heat conductive areas radially spaced from each other, the present disclosure is not limited thereto. The shape and position of each thermal conduction area can be determined according to the temperature modulation required by the target wafer, and the number of thermal conduction areas included in each thermal conduction part can be further determined. In some embodiments, each of the heat transfer areas of the inner and first outer

heat transfer portions

242, 244 may be formed of the same material. In other embodiments, the respective heat transfer areas of the inner and first outer

heat transfer portions

242, 244 may be formed from different materials.

Fig. 3A and 3B are a top view and a cross-sectional view of a semiconductor wafer carrier structure 300 according to another embodiment of the present disclosure, respectively, wherein fig. 3B is a cross-sectional view corresponding to section B-B in fig. 3A. For simplicity of description, like components will be designated with the same or similar reference numerals as in fig. 1A. Referring to fig. 3A and 3B, the patterned thermal conduction portion 340 includes an inner thermal conduction portion 342, a first outer thermal conduction portion 344, and a second outer thermal conduction portion 346 relatively distant from the center of the carrier tray 120 in a radial direction. In some embodiments, various grooves and/or projections can be formed on the surface of the carrier tray 120. In some embodiments, as shown in fig. 3B, the surface of the carrier tray 120 includes protrusions 124, grooves 126 surrounded by the protrusions 124, and grooves 128 radially outward of the protrusions 124. In some embodiments, portions of the patterned thermal conduction portion 340 (the inner thermal conduction portion 342 and the first outer thermal conduction portion 344) are embedded in the grooves 126,128, respectively, and portions of the patterned thermal conduction portion 340 (the second outer thermal conduction portion 346) are configured to protrude above the surface of the carrier tray 120, and the sidewalls are not surrounded by the carrier tray 120. In some embodiments, the structures on the surface of the susceptor 120, such as the protrusions 124, the grooves 126, and the grooves 128, may be formed by machining, photolithography, etching, a combination thereof, or other suitable processes.

In some embodiments, referring to fig. 3A and 3B, the semiconductor wafer supporting structure 100 further includes a protection layer 360 covering the surface of the supporting tray 120, and the patterned thermal conduction portion 340 is disposed on the protection layer 360. In addition, in some embodiments, the protection layer 360 may also cover the surface of the supporting portion 122, so that the semiconductor wafer supporting structure 100 contacts the back surface of the wafer with the protection layer 360 when supporting the wafer. Since the process gases used in the MOCVD process may be corrosive to the material of the susceptor 120 and/or the support 122, the process gases (e.g., NH) may be prevented from being introduced during the process by covering the surface of the susceptor 120 and/or the support 122 with the protective layer 360₃Etc.) attack on the carrier tray 120 and/or the support 122.

In some embodiments, the material of the protective layer 360 includes silicon carbide, tantalum carbide (TaC), graphite, ceramic, quartz, graphene, diamond-like film, combinations of the foregoing, or other suitable materials, and the material of the protective layer 360 is preferably a material having a coefficient of thermal expansion close to that of the carrier platter 120. In some embodiments of the present disclosure, at least a portion of the patterned thermal conductor 340 is different from the material of the protective layer 360, and the thickness of the patterned thermal conductor 340 of these portions is not limited by the present disclosure. In some embodiments, the patterned thermal conductor 340 has a different thermal conductivity than the protective layer 360. In addition, although the protection layer 360 is formed to conformally cover the surface of the susceptor 120 in the embodiment of fig. 3B, in other embodiments, the protection layer 360 may be formed to have a structure with a thickness variation or a height variation by photolithography, etching, or the like.

Although the top surfaces of the inner thermal conduction portion 342 and the first outer thermal conduction portion 344 are formed to be substantially flush with the top surface of the surrounding protective layer 360 in the embodiment of fig. 3B, in other embodiments, the top surfaces of the inner thermal conduction portion 342 and the first outer thermal conduction portion 344 embedded in the grooves 126,128, respectively, may be formed to be higher than the top surface of the carrier platter 120 or the protective layer 360 around the grooves 126,128, respectively, such that the inner thermal conduction portion 342 and/or the first outer thermal conduction portion 344 are closer to the wafer (e.g., such that the top surface of the first outer thermal conduction portion 344 is substantially flush with the top surface of the inner thermal conduction portion 342 or the second outer thermal conduction portion 346), thereby increasing the local thermal mass (heat mass) of the semiconductor wafer carrier structure 100 and changing the temperature profile of the surface of the carrier platter 120. For example, in some embodiments, the first outer thermal conduction portion 344 may be formed to have a top surface that is higher than the top surface of the surrounding carrier platter 120 or protective layer 360 such that the position of the top surface of the first outer thermal conduction portion 344 varies within the range of the dashed box 344d in fig. 3B, wherein the upper edge of the dashed box 344d is higher than the top surface of the surrounding carrier platter 120 or protective layer 360, but does not contact the lower surface of the wafer W.

FIGS. 3C and 3D are cross-sectional views of the first and second outer

heat transfer portions

344 and 346, respectively, according to the embodiments of FIGS. 3A and 3B. Referring to FIG. 3C, the first outer heat conduction portion 344 includes a first portion 344-1 and a second portion 344-2 that is lower in height in the Z direction; and referring to fig. 3D, the second outer heat conduction portion 346 includes a first portion 346-1 and a second portion 346-2 that is higher in height in the Z direction. As shown in fig. 3C, 3D, the sectional shapes of the first and second outer

heat conduction portions

344, 346 in the xz plane can be regarded as a combination of two rectangles that differ in height in the Z direction. In other embodiments, the cross-sectional shape of the patterned thermal conductor 340 may be rectangular, trapezoidal, arc-shaped, triangular, or other suitable combinations.

Although the second portion 344-2 of the first outer heat conducting portion 344 and the second portion 346-2 of the second outer heat conducting portion 346 are formed as rings symmetrically distributed with respect to the center of the carrier plate 120 in the embodiments of fig. 3C and 3D, in some other embodiments, the cross-section (cross-section perpendicular to the z-direction) of the second portions 344-2,346-2 parallel to the surface of the carrier plate 120 may be formed to have a plurality of circular shapes. Figure 3E is a top view illustrating the semiconductor wafer carrier structure 300, according to such an embodiment. Referring to fig. 3E, the patterned thermal conduction portion 340 includes an inner thermal conduction portion 342, a first outer thermal conduction portion 344, and a second outer thermal conduction portion 346 relatively distant from the center of the carrier tray 120 in a radial direction, wherein a second portion 344-2 of the first outer thermal conduction portion 344 and a second portion 346-2 of the second outer thermal conduction portion 346 are formed to have a plurality of circles having different sizes in a section parallel to the surface of the carrier tray 120. By forming the patterned thermal conductive portions 340 with different structures, the temperature distribution on the surface of the carrier tray 120 can be adjusted according to the manufacturing requirements. In addition, in the embodiment shown in fig. 3E, the inner heat conducting portion 342 has a plurality of heat conducting areas with circular grooves, and the depth of the heat conducting areas with circular grooves can also be varied. For example, the inner heat conducting portion 342 of fig. 3E may be composed of a larger, shallower depth outer circle and a plurality of smaller, deeper depth circular grooves. Of course, depending on the temperature field profile of the wafer, various embodiments of the shape, pattern profile, or relative height of the inner thermal conductors 342 (and the entire patterned thermal conductor 340) are possible, thereby changing the thermal mass of the surface of the susceptor 120 to produce a corresponding temperature profile.

Fig. 4A is a cross-sectional view illustrating MOCVD apparatus 10, according to some embodiments of the present disclosure. Fig. 4B is a schematic diagram illustrating a semiconductor wafer carrier structure 100 including a carrier body 400 according to some embodiments of the present disclosure. Referring to fig. 4A, the MOCVD apparatus 10 includes a carrier body 400 in the chamber C for placing a semiconductor wafer carrier (the semiconductor wafer carrier 100 is taken as an exemplary semiconductor wafer carrier in fig. 4 and the following description). In some embodiments, the carrier body 400 has a plurality of carrier units 420, and one or more semiconductor wafer carrier structures 100 carrying wafers W are accommodated therein. Furthermore, in some embodiments, as shown in fig. 4B, the plurality of bearing units 420 may be symmetrically distributed with respect to the center of the bearing body 400.

The supporting unit 420 may be a groove or other structure for accommodating the semiconductor wafer supporting structure 100. For example, in the embodiment of fig. 4A, the upper surface of the carrier body 400 has a spacer 440, and the carrier unit 420 for accommodating the semiconductor wafer carrier structure 100 can be formed on the upper surface of the carrier body 400 by forming the spacer 440 into a specific structure. However, in some other embodiments, the semiconductor wafer carrier structure 100 may be accommodated by forming the upper surface of the carrier body 400 into other structures.

Although the embodiment in which the carrier body 400 has a plurality of carrier units 420 thereon and a plurality of semiconductor wafer carriers are disposed has been described above, in other embodiments, only one carrier unit 420 and only one semiconductor wafer carrier may be disposed on the carrier body 400.

Referring to fig. 4A, in some embodiments of the present disclosure, the MOCVD device 10 further includes a support 500 below the carrier body 400, wherein the support 500 can be used to rotate the entire carrier body 400 along the z-axis. As such, in some embodiments, by accommodating one or more semiconductor wafer carrying structures 100 carrying wafers in at least one carrying unit 420 and rotating the entire carrying body 400 about its center (while each semiconductor wafer carrying structure 100 revolves about the center of the MOCVD device 10), a specific temperature distribution can be generated on the surface of the susceptor of each semiconductor wafer carrying structure 100 during the MOCVD process. In addition, in some embodiments, instead of rotating the entire MOCVD apparatus 10 about its center, one or more semiconductor wafer support structures 100 may also be rotated about their respective centers, thereby further adjusting the temperature distribution across the surface of the susceptor. As shown in fig. 4A, in some embodiments, the MOCVD device 10 may also include a heating section 600 below the carrier body 400 and/or around the support 500. The heating part 600 may be a member for generating patterns of various temperature distributions, and may have a heat conductive structure or the like capable of affecting a patterned design of the temperature distribution, which is not limited by the present disclosure. In addition, in some embodiments, the MOCVD apparatus 10 further includes a nozzle 700 for exhausting process gases into the chamber C and a gas outlet 800 for exhausting process gases. Although the nozzle 700 is shown in fig. 4A as a single nozzle 700 positioned directly above the cavity C, in some other embodiments, a plurality of smaller nozzles 700 may be formed above the cavity C, which is not limited by the present disclosure.

As described above, the present disclosure provides a semiconductor wafer supporting structure and an MOCVD apparatus including the same, in which a temperature difference of a surface of a supporting plate during a manufacturing process can be more precisely adjusted by forming a patterned heat conduction portion of a material having a different thermal conductivity coefficient from that of the supporting plate on the supporting plate, or a temperature distribution of the surface of the supporting plate can be adjusted or various modes of temperature distribution can be generated according to a desired temperature modulation (e.g., a temperature modulation designed corresponding to a wavelength of an led chip) of a target wafer, compared to a conventional technology in which the entire surface of the supporting plate is covered with a single material. For example, in the process of forming the micro light emitting diode by using the MOCVD process, the uniform temperature distribution which cannot be achieved by the prior art can be generated on the surface of the bearing disc of the semiconductor wafer bearing structure by changing the pattern and the heat conduction coefficient of the patterned heat conduction part, so that the formed micro light emitting diode chip has uniform wavelength distribution; in other embodiments, the temperature distribution of the surface of the carrier tray may be adjusted to make the formed micro led chip have a specific wavelength distribution.

While the present invention has been described with reference to the preferred embodiments, it is not intended to be limited thereto. Those skilled in the art to which the invention pertains will readily appreciate that numerous changes and modifications can be made without departing from the spirit and scope of the invention. Therefore, the protection scope of the present invention is subject to the following claims.

Claims

1. A semiconductor wafer carrier structure, comprising:

a carrier tray; and

a patterned heat conducting part arranged on the bearing plate,

wherein at least a portion of the patterned thermal conduction portion has a different thermal conductivity coefficient from the carrier platter.

2. A semiconductor wafer carrier structure according to claim 1, wherein the patterned thermal conductors are symmetrically distributed about a center of the carrier platter.

3. A semiconductor wafer carrier structure according to claim 1, wherein the patterned thermal conduction portion comprises an inner thermal conduction portion and an outer thermal conduction portion radially relatively far from a center of the carrier platter.

4. The semiconductor wafer carrier structure of claim 3, wherein the inner and outer thermally conductive portions are spaced apart from each other.

5. The semiconductor wafer carrier structure of claim 3, wherein the inner thermal conductive portion and the outer thermal conductive portion have different thermal conductivity coefficients.

6. The semiconductor wafer carrier structure of claim 3, wherein the outer thermally conductive portion has a thermal conductivity greater than the thermal conductivity of the inner thermally conductive portion.

7. A semiconductor wafer carrier structure according to claim 3, wherein the inner thermally conductive portion covers the center of the carrier platter.

8. The semiconductor wafer carrier structure of claim 3, wherein the outer thermally conductive portion is annular.

9. A semiconductor wafer carrier structure according to claim 3, wherein the outer heat conducting portion comprises a plurality of outer heat conducting areas spaced apart from each other and symmetrically distributed about the center of the carrier platter.

10. The semiconductor wafer carrier structure of claim 1, wherein the cross-sectional shape of the patterned thermal conductor comprises a rectangle, a trapezoid, an arc, a triangle, or a combination thereof.

11. A semiconductor wafer carrier structure according to claim 1, wherein the surface of the carrier platter comprises grooves and/or protrusions.

12. The semiconductor wafer carrier structure of claim 11, wherein a portion of the patterned thermal conduction portion is embedded in the recess.

13. The semiconductor wafer carrier structure of claim 1, further comprising:

and the protective layer covers the surface of the bearing disc, and the patterned heat conduction part is arranged on the protective layer.

14. The semiconductor wafer carrier structure of claim 13, wherein the material of the patterned thermal conductor and the protective layer comprises silicon carbide, tantalum carbide, graphite, ceramic, quartz, graphene, diamond-like films, or combinations thereof.

15. The semiconductor wafer carrier structure of claim 14, wherein at least a portion of the patterned thermal conductor is a different material than the protective layer.

16. The semiconductor wafer carrier structure of claim 14, wherein the patterned thermal conduction portion has a different thermal conductivity than the protective layer.

17. A semiconductor wafer carrier structure according to claim 1, wherein the material of the carrier platter comprises graphite, silicon carbide, or a combination thereof.

18. A semiconductor wafer carrier structure according to claim 1, wherein the carrier platter has a plurality of supports located at the edge of the carrier platter.

19. The semiconductor wafer carrier structure of claim 18, wherein tops of the plurality of support portions are higher than tops of the patterned thermal conductive portions in a thickness direction of the carrier platter.

20. A metal organic chemical vapor deposition apparatus comprising:

the bearing body is provided with a plurality of bearing units; and

the semiconductor wafer carrier structure of any one of claims 1-19, being housed in at least one of the plurality of carrier units.