CN113190400B - Bus monitoring module and monitoring method suitable for AHB protocol - Google Patents
Bus monitoring module and monitoring method suitable for AHB protocol Download PDFInfo
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- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3041—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is an input/output interface
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- G06F11/3055—Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
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- G06F11/3089—Monitoring arrangements determined by the means or processing involved in sensing the monitored data, e.g. interfaces, connectors, sensors, probes, agents
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- G06F11/3452—Performance evaluation by statistical analysis
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- G06F11/349—Performance evaluation by tracing or monitoring for interfaces, buses
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Abstract
The invention relates to the field of integrated circuits, in particular to a bus monitoring module and a monitoring method applicable to an AHB protocol, wherein the bus monitoring module comprises a plurality of channels, a plurality of master control devices and slave devices on a bus are respectively connected with the input end of each channel, the output of all the channels is gathered to an interrupt management unit, the interrupt management unit is used as the output end of the bus monitoring module to be connected with the master control devices, each channel comprises a monitoring selection unit, an access filtering unit and a counting comparison unit, an address range is set for each channel, and the address range of each channel is not repeated; the invention can generate interruption when the specific bus access reaches a certain number of times, and enriches the control mode and the debugging method of the processor.
Description
Technical Field
The present invention relates to the field of integrated circuits, and in particular, to a bus monitoring module and a bus monitoring method applicable to an AHB protocol.
Background
The MCU chip is usually based on a bus architecture, and a master control device such as a processor/DMA accesses a slave device such as a memory/communication module through a bus to implement functions such as general computation and real-time control. The bus is an interface bridge between the master and slave devices. The working state and the operating efficiency of the bus are analyzed, and ideas and basis can be provided for debugging and optimizing the whole chip.
The advanced high performance bus (AHB) protocol of ARM corporation is a bus protocol popular in the industry, and defines the interface signals of bus access, control timing and so on. Multiple master devices and multiple slave devices may be mounted on the AHB bus and allowed to initiate access to one or more slave devices in parallel. In the debugging and optimizing process of the chip, the bus access behaviors of a plurality of master control devices and slave devices are often required to be monitored simultaneously, or the bus access behaviors of different address intervals of the same device are monitored. The monitoring result can be used for judging whether the working state of the chip is normal or not and can also be used for improving the efficiency of executing the software code of the chip.
In a patent "system chip bus priority dynamic configuration device based on bus monitor" (CN 201010562898.3), a bus monitor is provided, which is mainly used for monitoring conflicts of multiple master control devices for memory access and adjusting access priorities of the multiple master control devices. The bus monitor cannot meet the monitoring requirement of monitoring the bus access behaviors of different address intervals of the same device.
Disclosure of Invention
In order to monitor the bus access behaviors of a plurality of main control devices and slave devices simultaneously, monitor the bus access behaviors of the same device in different address intervals and optimize software performance according to a monitoring result, the invention provides a bus monitoring module and a monitoring method suitable for an AHB protocol, wherein the bus monitoring module comprises a bus provided with a main device and a slave device, the main control device and the slave device on the bus are both connected with a middle control module, the bus monitoring module comprises a plurality of channels, all the main control devices and the slave devices on the bus are respectively connected with the input end of each channel, the output of all the channels is gathered to an interrupt management unit, the interrupt management unit is used as the output end of the bus monitoring module to be connected with a processor, each channel comprises a monitoring selection unit, an access filtering unit and a counting comparison unit, and an address range is set for each channel.
Further, when configuring the channels of the bus monitoring module, each channel selects one of the master control device and the slave device on the AHB bus as the monitoring device according to the configuration of the processor; when the selected monitoring equipment is the master control equipment, the channel monitors all bus access operations initiated by the master control equipment, filters out concerned operations from the bus access operations for counting, and generates a channel trigger signal when the count value is equal to the comparison value; when the selected monitoring device is a slave device, the channel monitors all bus operations accessing the slave device and filters out the concerned operations therefrom for counting, and generates a channel trigger signal when the count value equals the comparison value.
Furthermore, when the channel selects the monitoring master control device, partial connection signals between the master control device and the AHB bus, including haddr, htrans, hready and hwrite, are sent to the access filtering unit; when the slave device is selected to be monitored, part of the connection signals between the slave device and the AHB bus, including hsel, haddr, htrans, hready, and hwrite, are fed into the access filter unit.
Further, the access filtering unit judges whether the device is in a set address range through a signal haddr; judging whether the read-write accords with a set value or not through the signal hwrite; and judging whether the access of the equipment is single transmission or continuous transmission through the signal htrans, and taking the access meeting all the conditions as countable access of the equipment.
Furthermore, the counting comparison unit accumulates the countable access times passing through the access filter unit, generates a channel trigger signal when the accumulated value is equal to the configured comparison value, and generates the channel trigger signal when the counter overflows if the comparison value configured by the counting comparison unit is 0.
Furthermore, the interrupt management unit determines the access address range, the access times of the address and the access time of the address of the monitored device according to the trigger signal generated by the channel, outputs an interrupt signal to the processor according to the configuration, inserts a breakpoint into the interrupt function executed by the terminal management unit, and suspends the system for online debugging.
A bus monitoring method suitable for an AHB protocol comprises the following steps in a system of any bus monitoring module:
s1, a master control device monitors bus reading access of a certain master control device or slave device by using channels 1 to n of a bus monitoring module, and sets different address ranges for each channel;
s2, the main control equipment simultaneously starts the channels 1 to n;
s3, after the processor is interrupted for a fixed time or the bus monitoring module is captured, closing the channels and recording the count value of each channel;
and S4, expanding the address range of the channels 1 to n to increase the width or reducing the address range to increase the precision according to the channel count value, and repeating the steps S1 to S3 until the width and the precision of the address range meet the requirements.
Compared with the prior art, the invention has the following beneficial effects:
1. the bus monitoring module provided by the invention can perform statistical comparison on bus access behaviors of a plurality of main control devices and slave devices within a period of time, is convenient for observing the working state of each module, can generate interruption when a certain number of times of specific bus access is reached, and enriches the control mode and debugging method of a processor;
2. the bus monitoring method provided by the invention can count the access times of the processor to different address ranges of the external memory, position the address range of high-frequency access, facilitate the optimization of a software storage structure and improve the software execution efficiency.
Drawings
FIG. 1 is a block diagram of an embodiment of a bus monitoring module according to the present invention;
fig. 2 is an embodiment of an MCU system to which the bus monitoring method provided by the present invention is applied.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
This embodiment provides a specific implementation of a bus monitoring module suitable for the AHB protocol.
Referring to fig. 1, a bus is provided with a master device and a slave device, the master device and the slave device on the bus are both connected with a middle control module, the bus monitoring module includes a plurality of channels, all the master devices and the slave devices on the bus are respectively connected with an input end of each channel, outputs of all the channels are collected to an interrupt management unit, the interrupt management unit is used as an output end of the bus monitoring module to be connected with a processor, each channel includes a monitoring selection unit, an access filtering unit and a counting comparison unit, and an address range is set for each channel.
In this embodiment, when configuring the channels of the bus monitoring module, each channel selects one of the master control device and the slave device on the AHB bus as the monitoring device according to the configuration of the processor; when the selected monitoring equipment is the master control equipment, the channel monitors all bus access operations initiated by the master control equipment, filters out concerned operations from the bus access operations for counting, and generates a channel trigger signal when the count value is equal to the comparison value; when the selected monitoring device is a slave device, the channel monitors all bus operations accessing the slave device and filters out the concerned operations therefrom for counting, and generates a channel trigger signal when the count value equals the comparison value.
The access filtering submodule filters all bus effective accesses of the monitored equipment, and selects specific accesses from the bus effective accesses to be sent to the count comparison module. The filtering operation is based on the configuration of the processor, and comprises address filtering, read-write filtering, category filtering and the like, and hsel, htrans and hready signals are used for effective access judgment, and the method specifically comprises the following steps:
the address filtering is to judge whether the haddr is in a set address range;
reading and writing filtering to judge whether the hwrite meets a set value;
the category filtering judges whether the access is single transmission or continuous transmission through the htrans;
bus accesses that satisfy all of the above filtering conditions become countable accesses for the device.
The counting comparison submodule accumulates the countable accesses of the monitored equipment, generates a channel trigger signal when the accumulated value is equal to the configured comparison value, and generates the channel trigger signal when the counter overflows if the configured comparison value is 0.
The interrupt management submodule summarizes the trigger signals generated by all the channels and outputs interrupts to the processor according to the configuration, and the processor can acquire the time when the monitored equipment accesses a specific address for a specific number of times and suspend the system for online debugging in a mode of inserting a breakpoint into an interrupt processing function.
Fig. 2 is a schematic diagram of an MCU system applying the bus monitoring method provided by the present invention, in the MCU system, part of the codes of the processor are run on the RAM inside the MCU, and the other part of the codes are run on the FLASH memory connected outside the MCU, in order to improve the running efficiency of the FLASH codes, the processor accesses the AHB bus through a CACHE (CACHE) module; if the FLASH code accessed by the processor is already stored in the cache (namely cache hit), the access will not appear on the bus, otherwise, the cache module will convert the access of the processor into the cache bus access, read the code on the FLASH through the AHB bus and transfer the code to the processor. When the cache is not hit, the processor cannot acquire the FLASH code in time, and the performance is often affected. The processor has high access speed to the internal RAM and does not need to pass through a cache, so the cache bypass mode is set.
Example 2
In this embodiment, a specific implementation of a bus monitoring method suitable for an AHB protocol is provided on the basis of embodiment 1.
Taking the MCU system of the bus monitoring method of fig. 2 as an example, in the MCU system, the processor is used as a master control device, and the RAM and the FLASH are used as slave devices, applying the bus monitoring method provided by the present invention can locate the high frequency access code in the operation process of the processor by counting the access times of different code segments of the FLASH, and transfer it to the RAM, thereby improving the operation efficiency of the system; the bus monitoring method comprises the following steps:
1. the processor sets channels 1 to n of a bus monitoring module to monitor the bus reading access of the FLASH slave equipment, and each channel sets a different address range;
2. the processor simultaneously starts the channels 1 to n and runs the operation, the operation can be a certain program run by the processor in practice, and the processor counts the access times to the flash in the process of running the program;
3. stopping the channels 1 to n after the operation of the processor is finished, and recording the count value of each channel;
4. and expanding the address range of the channels 1 to n to increase the width or reducing the address range to increase the precision according to the channel count value, and repeating the steps 1-3 until the width and the precision of the address range reach the statistical requirements.
In the above flow, the statistical requirement for the breadth and precision of the address range means, for example, statistics of accesses of a 4MB flash, and it is necessary to count each address in segments until the entire 4MB address range is completely counted, and the statistical precision means that statistics of each time, for example, every 100kB statistics, is necessary to count 40 times in total, and S1-S3 must be repeated several times to complete the statistics of 40 times.
The above embodiments only represent a part of the work that can be performed by the bus monitoring module and method provided by the present invention. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (5)
1. A bus monitoring module suitable for AHB agreement, there are top management facilities and slave units on the bus, a plurality of top management facilities and slave units on the bus are all connected with bus monitoring module, characterized by that, the bus monitoring module includes a plurality of channels, a plurality of top management facilities and slave units are connected with input end of every channel separately on the bus, the output of all channels is gathered to the interrupt management unit, the interrupt management unit is connected with top management facility as the output end of the bus monitoring module, every channel includes controlling the selection unit, visits the filtering unit, counts the comparison unit, and set up an address range for every channel; the bus monitoring module realizes monitoring and comprises the following steps:
s1, a master control device monitors bus reading access of a certain master control device or slave devices by using channels 1 to n of a bus monitoring module, and the master control device sets different address ranges for each channel;
s2, the main control equipment simultaneously starts the channels 1 to n;
s3, after the master control equipment is interrupted for a fixed time or the bus monitoring module is captured, closing the channels and recording the count value of each channel;
and S4, according to the channel count value, expanding the address range from the channel 1 to the channel n to increase the range, or reducing the address range to increase the precision, and repeating S1-3 until the range and the precision of the address range meet the requirements.
2. The bus monitoring module of claim 1, wherein when configuring the channels of the bus monitoring module, each channel selects one of the master device and the slave device on the AHB bus as the monitoring device according to the configuration of the processor; when the selected monitoring equipment is the master control equipment, the channel monitors all bus access operations initiated by the master control equipment, filters out concerned operations from the bus access operations for counting, and generates a channel trigger signal when the count value is equal to the comparison value; when the selected monitoring device is a slave device, the channel monitors all bus operations accessing the slave device and filters out the concerned operations therefrom for counting, and generates a channel trigger signal when the count value equals the comparison value.
3. The bus monitoring module of claim 2, wherein when the channel selects the monitoring master device, the partial connection signals between the master device and the AHB bus, including haddr, htrans, hready, and hwrite, are sent to the access filtering unit; when the monitoring slave is selected, part of the connection signals between the slave and the AHB bus, including hsel, haddr, htrans, hready, and hwrite, are sent to the access filter unit.
4. The bus monitoring module according to claim 3, wherein the access filter unit determines whether the device is within the set address range according to a signal haddr; judging whether the reading and writing accord with a set value or not through a signal hwrite; whether the access of the device is single transmission or continuous transmission is judged through a signal htrans, and the access meeting all the conditions is taken as countable access of the device.
5. The bus monitoring module according to claim 1, wherein the count comparing unit accumulates the number of access times that can be counted by the access filtering unit, generates the channel trigger signal when the accumulated value is equal to the configured comparison value, and generates the channel trigger signal when the counter overflows if the comparison value configured by the count comparing unit is 0.
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