CN113097231A - 一种基于锡氧化物的pn结及其制备方法 - Google Patents

一种基于锡氧化物的pn结及其制备方法 Download PDF

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CN113097231A
CN113097231A CN202110339589.8A CN202110339589A CN113097231A CN 113097231 A CN113097231 A CN 113097231A CN 202110339589 A CN202110339589 A CN 202110339589A CN 113097231 A CN113097231 A CN 113097231A
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钱凌轩
杨成栋
谭欣月
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University of Electronic Science and Technology of China
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Abstract

本发明属于电子信息材料与元器件领域,具体涉及一种基于锡氧化物的pn结及其制备方法。本发明有源层一半制备在高介电常数介质层上,另一半制备在传统介质层上,利用亚稳态的有源层SnO材料极易被氧化为SnO2的特点,实现一次有源层制备及退火,同时得到p、n两种导电类型。与现有技术相比,本发明的pn结不需要多次制备两种不同导电类型的材料并分别进行退火处理,因此具有界面质量好、材料特性可控性高、工艺简单等优点。

Description

一种基于锡氧化物的pn结及其制备方法
技术领域
本发明属于电子信息材料与元器件领域,具体涉及一种基于锡氧化物的pn结及其制备方法。
背景技术
近年来,透明氧化物半导体因其制备温度低、可见光区透明度好、场效应迁移率高而引起研究人员的广泛关注,并被认为是应用于薄膜晶体管或其他复杂电子电路的最有前途的候选器件之一。目前为止,透明氧化物半导体的使用大多局限于单极器件(基于n型半导体)。而高性能p型氧化物半导体相对缺乏,就一定程度上限制了透明氧化物半导体的应用,尤其使得一些同时由n和p型半导体构建的具有更复杂结构与更强功能的器件和电路难以实现,比如互补金属氧化物半导体(CMOS)电路以及pn二极管。
为了解决该问题,科研人员研发了几种可能实现高性能p型器件的材料,如Cu2O、Ag2O和SnO,并与其他n型透明氧化物半导体一起构建上述先进器件及电路。其中,SnO是最具吸引力的一种,它具有较高的空穴迁移率。而且,与其他透明氧化物半导体相比,锡氧化物能够同时呈现n和p两种导电类型,其中SnO呈现p型导电,SnO2呈现n型导电。因此,可以单纯采用锡氧化物制作出双极型器件,如pn结。
目前已报道基于锡氧化物制备pn结的方法为:先沉积一层n型SnO2材料,待沉积完成后进行第一次退火而使得SnO2结晶;然后沉积p型SnO材料,待沉积完成后进行第二次退火而使得SnO结晶。该方法通过沉积条件的变化来调控锡氧化物的n或p型,且均需结合“沉积后退火”工艺而实现结晶以及更好的材料质量。其中,在沉积完SnO2后将样品取出生长腔室而置于退火炉的过程中,样品会接触到外部环境,在SnO2表面引入吸附物、杂质等污染,降低后续制备pn结的界面质量,影响器件性能;其次,第二次退火(即SnO退火)会对SnO2材料进行二次高温处理,会进一步影响材料的结构和电学特性,并使SnO2的材料特性不可控;最后,有源层-锡氧化物的材料特性对其制备条件高度敏感,通过制备条件的变化,即两次锡氧化物的沉积,增加了工艺的复杂性与控制难度。
发明内容
本发明的目的在于提供一种基于锡氧化物的pn结及其制备方法,以解决上述现有技术中存在的PN结界面质量低且制作工艺复杂的问题。
为实现上述目的,本发明采取了如下技术方案:
种基于锡氧化物的pn结,包括衬底层;
所述衬底层上设有介质层,介质层包括主预留区域和高介电区域两个区域,其中介质层的高介电区域设有高介电常数层,高介电常数的材料为介电常数大于5的含氧材料;
所述高介电常数层包含靠近主预留区域一侧的第一有源区域和第一预留区域;所述主预留区域包含靠近高介电常数层一侧的第二有源区域和第二预留区域;所述第一有源区域和第二有源区域用于制备SnO材料制作的有源层,通过有源层实现第一有源区域和第二有源区域的连接;
所述第一预留区域与制备第一有源区域的有源层之间设有第一电极;
所述第二预留区域与制备第二有源区域的有源层之间设有第二电极。
进一步的,所述介质层的材料为SiO2、Si3N4或BN。
进一步的,所述高介电常数介质层材料为HfO2、La2O3、Al2O3、Y2O3、ZrO2、Ta2O5、TiO2、Pr2O3、SrO、Gd2O3、Lu2O3、BaZrO3、BaTiO3、SrTiO3或a-LaAlO3
一种基于锡氧化物制备pn结的制备方法,包括步骤如下:
步骤1、在硅衬底上制备介质层;待介质层制备完成后,将介质层分为主预留区和高介电区两个区域;
步骤2、在介质层的高介电区域采用化学气相沉积(CVD)或物理气相沉积(PVD)制备高介电常数介质层。
步骤3、待高介电常数介质层制备完成后,对高介电常数介质层和主预留区进行分区;高介电常数介质层分为靠近主预留区一侧的第一有源区和第一预留区两个区域;主预留区分为靠近高介电常数介质层的第二有源区和第二预留区两个区域;
步骤4、在第一有源区和第二有源区制备有源层,有源层材料为氧化亚锡;
步骤5、在第一预留区与制备在第一有源区的有源层之间制作第一电极;第二预留区与制备在第二有源区域的有源层边缘之间制作第二电极。
步骤6、将步骤5所得产品进行退火处理,完成pn结制作。
进一步的,所述有源层的制备过程为:
先对金属Sn靶材进行预溅射,以去除靶材表面的氧化物等杂质;接着在第一有源区和第二有源区制备氧化亚锡,完成有源层制备。
除此上述技术方案外,本发明还提供了一种基于锡氧化物pn结制备方法的应用。
本发明的pn结制备方法应用在制备CMOS反相器(见图5)、CMOS与非门和CMOS或非门等CMOS集成电路。
本发明所提供的一种基于锡氧化物制备的pn结及其制备方法,是利用亚稳态的有源层SnO材料极易被氧化为SnO2的特点,借助一步退火工艺使高介电常数介质层中的氧扩散到SnO有源层,导致SnO被氧化为SnO2,使得原本的p型极性向n型转变。由于本发明的有源层一半制备高介电常数介质层上,另一半制备在传统介质层上;能够实现一次制备及退火处理有源层材料,同时得到p、n两种导电类型。与现有技术相比,由于本发明的pn结不需要多次制备两种不同导电类型的有源层材料并分别进行退火处理,因此具有界面质量好、材料特性可控性高、工艺简单等优点。
附图说明
图1为本发明实施例pn结的工业制备流程图;
图2为本发明实施例以SiO2为介质层的MOS管转移特性曲线;
图3为本发明实施例以HfLaO为介质层MOS管转移特性曲线;
图4为本发明实施例pn结的剖面示意图;
图5为实施例应用本发明pn结制备方法的CMOS反相器的剖面示意图。
图中:1、衬底;2、栅电极;3、电介质层(3-1、介质层、3-2、高介电常数层);4、SnO氧化物半导体层;5、电极。
具体实施方式
以下结合实施例及附图对本发明的原理和特征进行描述,所举实例只用于解释本发明,并非用于限定本发明的范围。实施例中未注明具体条件者,按照常规条件或制造商建议的条件进行。所用试剂或仪器未注明生产厂商者,均为可以通过市售购买获得的常规产品。
如图4所示,本发明提供的一种基于锡氧化物制备pn结,包括所述衬底层1上设有介质层3-1,介质层包括主预留区域和高介电区域两个区域,其中介质层的高介电区域设有高介电常数层3-2,高介电常数的材料为介电常数大于5的含氧材料;由于HfLaO化学键相对较弱,且存在游离氧,且能够使整个器件工作状态稳定性,因此本实施例选用HfLaO薄膜。所述高介电常数层包含靠近主预留区域一侧的第一有源区域和第一预留区域;所述主预留区域包含靠近高介电常数层一侧的第二有源区域和第二预留区域;所述第一有源区域和第二有源区域用于制备SnO材料制作的有源层4,通过有源层4实现第一有源区域和第二有源区域的连接;所述第一预留区域与制备第一有源区域的有源层之间设有第一电极;所述第二预留区域与制备第二有源区域的有源层之间设有第二电极。
具体实施时,所述衬底材料为硅,介质层3-1可选用传统的介质层材料SiO2、Si3N4或BN,本实施例优选热氧化生长的SiO2,热氧化生长的SiO化学键稳定,不易扩散。高介电常数采用化学气相沉积(CVD)或物理气相沉积(PVD)制备而成,化学键相对较弱,甚至存在未完全成键的游离氧。利用材料的特性,结合有源层一部分制作在介质层上、另一部分在高介电常数层上的结构特点,实现两种半导体极性,即实现不同导电类型区域的划分。
为制备上述基于锡氧化物制备pn结,本实施例提供了一种基于锡氧化物制备pn结的制作工艺流程,如图1所示,包括以下步骤:
步骤1、为简化器件结构及工艺,选用尺寸为10mm×10mm的硅作为衬底,并对衬底进行处理,以保证衬底表面清洁干燥。衬底处理过程为:
1.1)按照标准流程将衬底清洗干净,然后用氮气枪吹干;
1.2)采用热板在120℃温度下烘烤10min以去除衬底表面的水汽。
步骤2、在衬底高温生长SiO2介质层,介质层厚度为300nm;待介质层生长完成后,将介质层分为主预留区和高介电区两个区域。
步骤3、在所述SiO2介质层的高介电区溅射沉积厚度为100nm的HfLaO薄膜作为高介电常数介质层,HfLaO薄膜的沉积条件为:背底真空度为2×10-5Pa,射频溅射功率为150W,沉积温度为室温,沉积时的气体流量Ar为24sccm、O2为6sccm,沉积时真空度为0.57Pa。
步骤4、对高介电常数介质层和介质层的主预留区进行分区;高介电常数介质层分为靠近主预留区一侧的第一有源区和第一预留区两个区域;主预留区分为靠近高介电常数介质层的第二有源区和第二预留区两个区域;
步骤5、在第一有源区和第二有源区沉积有源层,有源层材料为氧化亚锡;第二有源区的介质层与有源层形成p型导电区域。有源层材料为氧化亚锡,采用磁控溅射的方法沉积。具体为:先将购买的有源层掩模板覆盖在第一有源区和第二有源区上,然后利用磁控溅射的方法沉积厚度约为65nm的SnO薄膜。由于杂质会影响到最终制备的pn结性能,因此,在正式沉积之前需要对金属Sn靶材预溅射,目的是去除表面的氧化物等杂质,预溅射条件为:气体流量Ar为50sccm,溅射功率为100W,真空度为1.7Pa,预溅射时间为10min。正式溅射沉积条件为:背底真空度为2×10-5Pa,射频溅射功率为50W,沉积温度为室温,沉积时的气体流量Ar为20.9sccm、O2为1.1sccm,沉积时真空度为0.43Pa,溅射时间为6min。
步骤6、在第一预留区与沉积在第一有源区的有源层边缘之间制作第一电极;第二预留区与沉积在第二有源区域的有源层边缘之间制作第二电极。
本实施例图形化电极层沉积采用如下方式进行:先将与有源层掩模板配套的金属电极掩膜板覆盖在步骤5所得产品上,然后利用电子束蒸发法蒸镀金属Ti约20s,得到厚度约为20nm的Ti层;再然后在Ti层上再蒸镀金属Au约90s,得到厚度约为150nm的Au层,从而得到一对电极。
步骤7、由于常温下沉积的SnO为非晶状态,电阻率较大,不具备调制效应;为得到pn结,并同时呈现出p型导电类型和n型导电类型,还需要对通过上述步骤制作出的器件进行进行退火;一方面,通过退火使位于介质层上方的SnO结晶,呈现p型调制效应;另一方面,促进HaLaO中的氧扩散进入SnO中去;使扩散进入SnO的氧发生反应生成SnO2,并使SnO2结晶,呈现n型调制效应。退火过程中,为更好的控制HfLaO薄膜中的氧气扩散进入SnO的氧的反应效果,本实施对退火条件进行了限制,本实施例所采用的退火处理条件为:氮气保护气体下,以10℃/min的升温速率由室温升至225℃,退火60min。
图2是实施例中以SiO2为介质层的MOS管转移特性曲线。图3是实施例中以HfLaO为介质层的MOS管转移特性曲线。由图3可以得知,层叠在SiO2介质层上的SnO呈现p型导电;从图4可以得到,层叠在HfLaO高介电常数层上的SnO呈现n型导电。本实施例在实际操作的过程,为获得最佳效果,其介质层直接采用从现有生产厂家直接购买的Si/SiO2样片,具体型号为南京牧科纳米科技有限公司的MK1305,该型号中SiO2是高温氧化形成的,化学键稳定。高介电常数介质层的HfLaO薄膜为溅射沉积,化学键相对较弱,甚至存在未完全成键的游离氧。在退火过程中,HfLaO介质层与有源层通过接触面、使HfLaO介质层中束缚较弱的氧原子扩散到有源层中,致使HfLaO介质层区域上方亚稳态的SnO被氧化为更加稳定的SnO2
综上所述,本发明一次制备及退火处理氧化物半导体,通过采用不同的介质层,实现两种半导体极性,即实现不同导电类型区域的划分。相较于传统的pn结需要分别制备两种不同极性的氧化物半导体材料并两步退火的方式,本发明只需要在不同电介质材料上,制备一次氧化物半导体材料,因此具有界面质量好、材料特性可控性高、工艺简单等优点。
以上所述仅为本发明的较佳实施例,并不用以限制本发明,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。

Claims (7)

1.一种基于锡氧化物的pn结,其特征在于:包括衬底层;
所述衬底层上设有介质层,介质层包括主预留区域和高介电区域两个区域,其中介质层的高介电区域设有高介电常数层,高介电常数的材料为介电常数大于5的含氧材料;
所述高介电常数层包含靠近主预留区域一侧的第一有源区域和第一预留区域;所述主预留区域包含靠近高介电常数层一侧的第二有源区域和第二预留区域;所述第一有源区域和第二有源区域用于制备SnO材料制作的有源层,通过有源层实现第一有源区域和第二有源区域的连接;
所述第一预留区域与制备第一有源区域的有源层之间设有第一电极;
所述第二预留区域与制备第二有源区域的有源层之间设有第二电极。
2.根据权利要求1所述的一种基于锡氧化物制备的pn结,其特征在于:所述介质层的材料为SiO2、Si3N4或BN。
3.根据权利要求1所述的一种基于锡氧化物制备的pn结,其特征在于:所述高介电常数介质层材料为HfO2、La2O3、Al2O3、Y2O3、ZrO2、Ta2O5、TiO2、Pr2O3、SrO、Gd2O3、Lu2O3、BaZrO3、BaTiO3、SrTiO3或a-LaAlO3
4.根据权利要求1所述的一种基于锡氧化物的pn结,其特征在于,所述的电极为单层或多层结构;所述的衬底材料为硅、二氧化硅、碳化硅、玻璃或者高分子聚合物。
5.一种基于锡氧化物pn结的制备方法,包括步骤如下:
步骤1、在硅衬底上制备介质层;待介质层制备完成后,将介质层分为主预留区和高介电区两个区域;
步骤2、在介质层的高介电区域采用化学气相沉积(CVD)或物理气相沉积(PVD)制备高介电常数介质层。
步骤3、待高介电常数介质层制备完成后,对高介电常数介质层和主预留区进行分区;高介电常数介质层分为靠近主预留区一侧的第一有源区和第一预留区两个区域;主预留区分为靠近高介电常数介质层的第二有源区和第二预留区两个区域;
步骤4、在第一有源区和第二有源区制备有源层,有源层材料为氧化亚锡;
步骤5、在第一预留区与制备在第一有源区的有源层之间制作第一电极;第二预留区与制备在第二有源区域的有源层边缘之间制作第二电极。
步骤6、将步骤5所得产品进行退火处理,完成pn结制作。
6.根据权利要求5所述的一种基于锡氧化物制备pn结的制备方法,其特征在于:所述有源层的制备过程为:
先对金属Sn靶材进行预溅射,以去除靶材表面的氧化物等杂质;接着在第一有源区和第二有源区制备氧化亚锡,完成有源层制备。
7.权利要求5项所述的基于锡氧化物制备pn结的方法在CMOS反相器、CMOS与非门、CMOS或非门等CMOS集成电路的应用。
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