CN1127390A - Portable mono-CPU emulator - Google Patents

Portable mono-CPU emulator Download PDF

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Publication number
CN1127390A
CN1127390A CN94118754A CN94118754A CN1127390A CN 1127390 A CN1127390 A CN 1127390A CN 94118754 A CN94118754 A CN 94118754A CN 94118754 A CN94118754 A CN 94118754A CN 1127390 A CN1127390 A CN 1127390A
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program
mov
routine
keyboard
control circuit
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CN94118754A
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Chinese (zh)
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刘若飞
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Individual
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Abstract

The present invention relates to a monolithic computer simulator. Said invention adds a hardware control circuit on its system board, so that it can make single CPU simulator separate from PC machine and can implement monitoring and simulation function. Said invention has the standard English keyboard, graphic/character type liquid crystal display and micro-printer, etc. to implement assembler, disassembler and macroassembler input and testing. Said invention also has a speech system which can give out voice prompting or read out inputted content.

Description

Portable mono-CPU emulator
The present invention relates to the imitative super true device of a kind of single chip microcomputer
Singlechip emulator is a kind of SDK (Software Development Kit), and the singlechip emulator of prior art needs could realize assembly language and higher level lanquage (PL/M, C language) debugged program by the PC microcomputer, also need use expensive PC software.After breaking away from PC, the machine code that can only import and check 16 systems, and also the compilation of program and dis-assembling need of work are finished by manually looking into instruction list; These have caused low-grade emulator complicated operation loaded down with trivial details, and high-grade emulator is big to the dependence of equipment, and the cost height especially is difficult to popularize to vast teen-age hacker.
The object of the present invention is to provide a kind of dependence of being completely free of PC, dispose some simple peripheral hardwares, realize the technology of grand compilation and high level language debugging's Single Chip Microcomputer (SCM) program, filled up the blank of middle-grade emulator with the single-chip microcomputer assembly language.
The present invention is made up of hardware and software two parts
Hardware is made up of ultimate system and expanding system, ultimate system is made up of system board, display and keyboard, system board is made up of single chip microcontroller (CPU), memory under program, data memory, simulation memory and serial/parallel capable expansion interface, expanding system has EPROM programmer, it is characterized in that:
In the ultimate system:
1, also has on the system board: simulate signal control circuit, hardware control circuit and power down protection circuit;
2, keyboard is the ASCII keyboard of standard;
3, display is LED figure or character mode lcd display.
In the expanding system:
1, is connected to mini-printer by the I/O mouth;
2, also be connected to voice system by the I/O mouth;
3, can be connected to high level language debugging's terminal or shape library terminal by RS-232 interface.
Software calls each relevant subroutine by watchdog routine control, as machine code input/output routine, machine code display routine, full speed running program, breakpoint working procedure, single step run program, EPROM program curing and serial communication programmer, it is characterized in that: also have assembly routine, disassembler, macroassembler, graphical symbol loading routine and voice program.
The data/address bus of microcontroller is joined with memory, control circuit, parallel expansion interface and display respectively, and its control signal and hardware control circuit join, and control other circuit, its P respectively again 0, P 1, P 2And P 3All join, as simulate signal with emulation interface.Input and output and debugging work that microcontroller of the present invention had both been finished program realize the one-chip machine simulation function again, have realized the emulator of single CPU type.
Memory under program is an EPROM, is solidified with the watchdog routine of total system, and its data/address wire and microcontroller join, and sheet choosing, read signal are sent by hardware control circuit.
Simulation memory is a static storage, and its data/address wire and microcontroller join, and sheet choosing, read-write are sent by hardware control circuit, in the simulated program of user's input is housed.
Data memory is a static storage, and its data/address wire and microcontroller join, and sheet choosing, read-write are sent by hardware control circuit, in the source program of user's input, the status information of graphical symbol code and microcontroller are housed.
Hardware control circuit and simulate signal control circuit are delivered to hardware control circuit with the control signal that microcontroller sends after buffer buffers, control simulate signal control circuit and other circuit more respectively.Can finish program development for making single microcontroller, can simulate again and allow, need to realize the conversion of two states, the present invention is employing " data address signal transfer method ", and hardware control circuit is one group or door and trigger composition, when being " 1 " on data line and the address wire, trigger is triggered, and send switching signal with control signal conversion (or lead to the native system plate or lead to emulation interface), when emulator resetted, trigger was original state (a supervisory system state).
The power down protection circuit is as the usefulness of the power down protection of simulation memory and data memory.
The assembly language input and output of program: the user can import assembly language by the standard A CSII keyboard that the present invention connects, instruction, emulator collects (need not to carry out in advance the manual assembly) to current language and deposits in the address of appointment, the DEBUG system of whole user interface simulation PC, can not take a large amount of internal memory storage assembly language and (not have " redirect of signed address ", " pseudoinstruction " reaches grand compilation functions such as " module keyed jointings ") emulator is when disassembler, by LCD output assembly statement, also can get by mini-printer.
The macro assembly language of program and graphical symbol input: the user is on the basis of assembly language input, use " redirect of signed address ", " pseudoinstruction " to reach grand compilation functions such as " module keyed jointings ", emulator of the present invention compresses the assembly statement of input (omitting too much space character) and deposits data memory in, treats to carry out grand compilation (need not offset address is calculated) so that make amendment at any time in the input process of program after input finishes.The graphical symbol loading routine is on the basis of grand compilation, add " graphical symbol assembly language " program, the pairing statement of graphical symbol, subroutine, all be solidificated among the EPROM in advance and make the graphical symbol epiphase and contrast, the user reads and is stored in the data memory by specified address in the graphical symbol input table, when system compiles it, be that the call macro compilation carries out grand compilation generation machine code to relevant statement, subroutine, wherein all graphical symbols are all deposited in the shape library terminal.
The voice of program are read and voice suggestion: after program is carried out dis-assembling, can it be read one by one by additional voice system, the user can see that display just knows the program in the memory, is suitable for using under the particular surroundings.The mistake that occurs when emulator of the present invention is operated also can be read and corrects it by voice system.
The high level language debugging of program: because the restriction of the function of single CPU (monitoring, the shared CPU of emulation) own, for finishing friendship justice compilation debugging, can get final product in the additional high level language debugging's terminal (carrying CPU) of the serial communication interface of emulator of the present invention as senior language such as " C, PL/M ".
Hardware expanding of the present invention peripheral hardware, inside has increased hardware control circuit, simulate signal control circuit and power down protection circuit.Software has increased macroassembler, graphical symbol loading routine and voice read routine, makes it finish the many functions that need PC to support under the situation of no PC.
The present invention compared with the prior art, its advantage is:
1. can break away from PC works alone;
2. can when being furnished with higher level lanquage or shape library terminal, can carry out the programming and the debugging of graphical symbol and higher level lanquage directly with grand compilation programming, debugged program;
3. having voice suggestion and voice program helps and reads and the garbled voice alarm function;
4. multiple functional, cost is low, is beneficial to popularization, is specially adapted to teaching;
5. volume is little, and is easy to carry.
Description of drawings:
Fig. 1 is a system chart of the present invention
Fig. 2 is a hardware electrical schematic diagram of the present invention
Fig. 3 is a watchdog routine main flow chart of the present invention
Fig. 4 is one of macroassembler process flow diagram of the present invention
Fig. 5 is two of macroassembler process flow diagram of the present invention
Fig. 6 is an assembly routine process flow diagram of the present invention
Fig. 7 is the present invention and assembly routine process flow diagram
Fig. 8 is a voice read routine process flow diagram of the present invention
Fig. 9 is one of graphical symbol loading routine process flow diagram of the present invention
Figure 10 is two of graphic language loading routine process flow diagram of the present invention
Embodiment
System chart of the present invention such as Fig. 1, by system board (dotted line in) 1, LCD 2, keyboard 3, forms ultimate system, and be equipped with expanding system (reach and be connected to shape library/high level language debugging's terminal) by serial communication interface 7 by EPROM programmer 4, mini-printer 5, voice system 8.Hardware electrical schematic diagram of the present invention such as Fig. 2.The data/address bus of microcontroller is joined with memory, control circuit, parallel expansion interface and display respectively, and its control signal and hardware control circuit join, and control other circuit, its p respectively again 0, p 1, P 2And p 3All join, as simulate signal with emulation interface.
Memory under program is an EPROM, is solidified with the watchdog routine of total system, and its data/address wire and microcontroller join, and sheet choosing, read signal are sent by hardware control circuit.
Simulation memory is a static storage, and its data/address wire and microcontroller join, and sheet choosing, read-write are sent by hardware control circuit, in the simulated program of user's input is housed.
Data memory is a static storage, and its data/address wire and microcontroller join, and sheet choosing, read-write are sent by hardware control circuit, in the status information of source program, graphical symbol code and the microcontroller of user's input is housed.
Hardware control circuit is one group or door and trigger composition, when being " 1 " on data line and the address wire, trigger is triggered, and send switching signal with control signal conversion (or lead to the native system plate or lead to emulation interface), when emulator resetted, trigger was original state (a supervisory system state).
Software of the present invention is managed as main system by watchdog routine, and the operation of other all software is by monitor call.The present invention except that having the whole working procedures of emulator commonly used, also increase macroassembler is arranged, assembly routine, disassembler, graphical symbol loading routine and voice read routine.
The process flow diagram of assembly routine of the present invention such as Fig. 6, its part source program is as follows:
<! [CDATA[INITIALIZE:; Initialization MOV DPTR, #CODE_TABLE; The first address of machine code instruction table is placed DPTR MOV R0, #BUFFER; Keyboard/display buffer first address is placed R0, MOV R1, #00H; Clear each register, Rn intermediate value vanishing MOV R2, #00H; MOV R3, #00H; MOV R4, #00H;<!--SIPO<dP n="5">--<dp n="d5"/>MOV R7, #00H; In machine code (being the pointer of instruction list simultaneously) the MOV 0CH of compilation, #00H are housed; Clear internal memory deposits respectively among 00~0F that to put statement assembled. and machine code is gone into the length of this statement. NOV 0FH, #00H; CLR A; Clear totalizer START:; Beginning CJNE @R0, #CDH, REL1; Whether be carriage return, promptly " do not import " MOV A, #01H if having a look n character; To " do not have input " sign 01 in A and return RETREL1:MOV B , @R0; N character is put in preservation CLR A among the B earlier; Value in the machine code is read into MOVC A , @A+DPTR CJNE A among the A, B, NEXT_CODE; More identical, if difference then forwards NEXT_CODE CJNE A, #0DH, REL2 to; Whether be carriage return, i.e. the assembly instruction MOV 0FH of no-operand, R7; R7 value before making up is exactly a machine code, and the R7 value is the CLR A of instruction list simultaneously; (successfully compilation sign) pointer.The A zero setting successful RETREL2 CJNE A that represents to collect, #20H, REL3 will be returned among its 0F that packs into; Whether be space character, no-operand promptly arranged because operand and main INC R0 have space character to separate SJMP OPERATION_CODE between machine code; Forward operand evaluation program REL3:INC R0 to; INC DPTR; Each pointer adds one, continues a character SJMP REL1NEXT_CODE that relatively differs:; The instruction difference of current comparison is changed next instruction and is continued CJNE R7,4#0FFH, REL4; Has the value of R7 arrived FF not? promptly all instruction departments have compared MOV A, #03H; Not? if putting the A value is 03, returns RETREL4:INC R7; The R7 value adds one, i.e. next instruction in the directional order table.MOV A, R7; Calculate the address of next instruction in the instruction list and put into ANL A by the R7 value, SWAP A among the #11110000B DPTR, ADD A, #TABLE_H MOV DPH, A; The high eight value addresses MOV A on the high eight-bit of DPTR that packs into, R7 ANL A, #00001111B; Pack into low eight of DPTR of low eight bit address go up SWAP A, MOV DPL, A, MOV R0, #BUFFER; Again put keyboard/display buffer first address LJMP REL1; Compare again. .OPERATION_CODE: compare operation number, and evaluation INITIALIZE: initialization. (summary) .]];
The process flow diagram of disassembler such as Fig. 7, its part source program is as follows:
<! [CDATA[.. .VN_ASM:; Dis-assembling MOV A, R7; Be machine code among the R7, its value is put in ANL A among the A, #11110000B; Calculate the address of instruction list and be put in SWAP A among the DPTR, ADD A, #TABLE_H MOV DPH, A MOV A, R7 ANL A, #00001111B SWAP A MOV DPL, ALOOP:CLR A; Read instruction and show dis-assembling MOVO A , @A+DPTR CJNE A, #00H, V_1; No-operand is arranged, PUSH DPH; Have, the address of original user program is taken out, follow the operand after machine code to read dis-assembling MOV DPH PUSH DPL, 7DH MOV DPL, 7EH MOVX A, @DPTR INC DPTR MOV 7DH, DPH MOV 7EH, DPL INC R0 LCALL HEX_ASC; Transfer operand to the ASCII form, and put into POP DPL demonstration/keyboard buffer and prepare to show POP DPH INC R0 INC DPTR SJMP LOVP; Continue dis-assembling V_1:CJNE A, #0DH, V_2; Finish not? CLR A; Be through with, putting the A value is zero, successfully indicates RETV_2:MOV@R0, A; Demonstration/keyboard INC R0 buffer zone preparation demonstration INC DPTR SJMP LOOP put in the statement that dis-assembling goes out; Continue dis-assembling. (summary) .]];
The process flow diagram of macroassembler such as Fig. 4 and 5, its part source program is as follows:
<! [CDATA[.. CJNE@R0, #3AH, GO-ON; Whether be ": " symbol, ASCII character is 3A0 POP R0 because must accord with to show the difference with LJMP SIGN programmed instruction, if then forward SIGNGO-ON to ": " behind the label. .SIGN:; Handle the program MOV DPTR of label, #TABLE-SIGN; The first address of label list is put in MOV R7 among the DPTR, #00H; Clear R7 is sequence valve .REL1 MOV B , @R0 in the table of label among the R7; B MOV A , @DPTR put in n character; Read n character CJNE A in the label list, B, NEXT-SIGN; Whether identical, if difference then forwards NEXT-SIGN CJNE A to, #3AH, the REL2 LCALL ERROR that relatively is over; Identical label is arranged, the MOV A that makes mistakes, #01H; Put error flag 01 in A, return RETREL2:INC R0 INC DPTR SJMP REL1; Continue relatively NEXT-SIGN CJNE R7, #0FFH, REL3; Relatively be over to the label that has? LSJMP GO-ONREL3 INC R7 MOV A, R7 ANL A, #11110000B SWAP A ADD A, #TABLE-H MOV DPH, A MOV A, R7 ANL A, #00001111B SWAP A, MOV DPL, A MOV R0, #BUFFER; Again put keyboard/display buffer first address LJMP REL1; Compare GO-ON:POP DPH again; Get the sequence valve PUP DPL of last last label of label list and put into DPTR LCALL DPTR+; Accent adds the subroutine MOV R0 of 1b (decimal system), #BUFFER to DPTR; With new label pack into the table in, promptly set up new label REL4 MOV A , @R0 MOV@DPTR, A CJNE@R0, #3AH, REL5; Packed into? INC DPTR<!--SIPO<dP n="8">--<dp n="d8"/>MOV 0A, 7DH; The address counter value is packed in the label list.MOV @DPTR, A MOV A, 7EH MOV @DPTR, A RET; Return REL4 with INC R0REL5:INC R0 INC DPTR SJMP; Continue to pack into. (summary) .]];
The process flow diagram of voice program such as Fig. 8, its part source program is as follows:
<! [CDATA[LCALL VN_ASM; Call disassembler ANL D1, #11110000B; Open voice INC R0 MOV@R0, #0DH; At the rearmounted end mark MOV of continued character of keyboard/display buffer R0, #BUFFER; Put first address LOOP:CJNE @R0 in R0 of keyboard/display buffer, #0DH, REL1; All run through? SJMP NEXT_V; Yes, remove to read next bar statement REL1:MOV DPTR, #TABLE2; The first address that ASCII character is become the table of control code is inserted LOOP1:CLR A MOV C A , @A+DPTR among the DPTR; Read in the ASCII character MOV B , @R0 of a control code; Read in the ASCII character CJNE A of a continued machine code, B, REL2; Identical? MOV A, DPL; The value of DPL is actual to be exactly the value of control code, it is placed A LCALL VOICE and transfer voice to read VOICE. SJMP NEXT-V; Continue the pronunciation REL2:INC DPTR of character late; DPTR adds one, the ASCII value SJMP LOOP1 of read next control code; Continue relatively NEXT-V INC R0; R0 points to the character late SJMP LOOP in keyboard/display buffer; Continue. (summary) .]];
The process flow diagram of graphical symbol loading routine such as Fig. 9 and 10.

Claims (5)

1. portable mono-CPU emulator, its hardware is made up of microcontroller, memory under program, data memory, simulation memory, emulation interface, serial/parallel line interface, EPROM programmer, keyboard and display, it is characterized in that:
(1). the shape library that also includes hardware control circuit, voice system, printer and be connected/high level language debugging's terminal by serial communication interface;
(2). keyboard is a standard A SCII keyboard;
(3). display is a LCD.
2. portable mono-CPU emulator according to claim 1 is characterized in that LCD can be a character type, also can be the figure type.
3. portable mono-CPU emulator according to claim 1 is characterized in that printer is a kind of mini-printer.
4. portable mono-CPU emulator according to claim 1 is characterized in that hardware control circuit is made up of one group or door and trigger, by RST signal and address/data lines signal triggering and send switching signal and control other hardware circuit.
5. portable mono-CPU emulator, its software comprises organic device sign indicating number loading routine, machine code display routine, full speed running program, single step run program, breakpoint working procedure, EPROM program curing, print routine and communication program, it is characterized in that also comprising macroassembler, assembly routine, disassembler, graphical symbol loading routine and voice program.
CN94118754A 1994-12-03 1994-12-03 Portable mono-CPU emulator Pending CN1127390A (en)

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CN94118754A CN1127390A (en) 1994-12-03 1994-12-03 Portable mono-CPU emulator

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CN94118754A CN1127390A (en) 1994-12-03 1994-12-03 Portable mono-CPU emulator

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CN1127390A true CN1127390A (en) 1996-07-24

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102043715A (en) * 2010-12-24 2011-05-04 上海电机学院 Method and device for realizing single chip microprocessor simulation by site users
US8666263B2 (en) 2008-07-23 2014-03-04 Apex Microelectronics Co., Ltd Information input method, apparatus and system for associated apparatus of imaging device
US9357091B2 (en) 2008-07-23 2016-05-31 Apex Microelectronics Co., Ltd. Information input method, apparatus and system for associated apparatus of imaging device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8666263B2 (en) 2008-07-23 2014-03-04 Apex Microelectronics Co., Ltd Information input method, apparatus and system for associated apparatus of imaging device
US9357091B2 (en) 2008-07-23 2016-05-31 Apex Microelectronics Co., Ltd. Information input method, apparatus and system for associated apparatus of imaging device
CN102043715A (en) * 2010-12-24 2011-05-04 上海电机学院 Method and device for realizing single chip microprocessor simulation by site users

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