CN112636622B - Soft switch control circuit of neutral point clamping type three-level inverter - Google Patents

Soft switch control circuit of neutral point clamping type three-level inverter Download PDF

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CN112636622B
CN112636622B CN202011489997.3A CN202011489997A CN112636622B CN 112636622 B CN112636622 B CN 112636622B CN 202011489997 A CN202011489997 A CN 202011489997A CN 112636622 B CN112636622 B CN 112636622B
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input end
output
diode
voltage
comparator
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CN112636622A (en
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张犁
郑仲舒
邹宇航
娄修弢
吴超
王一鸣
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Hohai University HHU
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Hohai University HHU
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/487Neutral point clamped inverters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/083Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the ignition at the zero crossing of the voltage or the current
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses a soft switching control strategy of a three-level Neutral Point Clamped (NPC) inverter, belonging to the technical field of control of a multi-level power electronic converter. The control strategy enables the inverter to work in a critical conduction mode, and zero-voltage conduction of the switching tube can be realized in the whole power grid period. The modulation calculates the conduction time of the switching tube through a simple PI controller and an auxiliary control circuit, calculates the turn-off time of the switching tube by utilizing an inductive voltage volt-second balance principle, and performs self-adaptive adjustment on the switching period by utilizing a CR differential circuit, thereby realizing zero voltage conduction of the switching tube in a full range. The modulation scheme avoids a high-cost zero-crossing detection circuit, has the advantages of simple control and easy realization, is favorable for high power density of the inverter, and has wide application prospect in the field of power electronic converters.

Description

Soft switch control circuit of neutral point clamping type three-level inverter
Technical Field
The invention belongs to the technical field of power electronics, particularly belongs to the technical field of control of a multi-level power electronic converter, and particularly relates to a soft switch control circuit of a neutral point clamped three-level inverter.
Background
Along with the increasing environmental problems, the traditional power generation mode can not meet the requirements of people on environmental protection. The new energy power generation occupies a certain seat in the current power generation mode, and the inverter is used as a connecting junction between the new energy power generation and a power grid and plays an important role in the new energy power generation. The three-level inverter has the advantages of more output levels, small harmonic wave of output current, few switching devices and the like, and thus, the three-level inverter becomes a research hotspot of people.
A neutral point clamped three-level inverter has a topology shown in FIG. 1. When the traditional SPWM is adopted, large switching loss exists on a switching tube, and the power conversion efficiency of the converter is seriously influenced when the switching frequency is increased. In order to solve the above problems, documents "d.zhang, j.he, and d.pan.a megawatt-scale medium-voltage high-efficiency power density 'SiC + Si' hybrid-level ANPC inverter for air circuit high-electric pulse systems.ieee Transactions on Industrial application.2019, 55 (6)" propose a midpoint clamping type three-level inverter modulation strategy based on a mixture of a silicon carbide (SiC) device and a silicon (Si) device. The modulation strategy reduces the on-state losses of the converter and improves efficiency. However, this control strategy does not optimize the switching loss, and when the switching frequency is increased to increase the power density, the switching loss will increase sharply, and the power conversion efficiency of the converter will still be low.
When the inductive current of the converter is in a critical conduction mode (CRM), the switching tube which enables the inductive current to rise can realize ZVS or valley voltage switching-on (VS) when the switching tube is switched on in the next period, and the switching loss is obviously reduced. Based on the idea, chinese invention patents with an authorized publication number of "CN 106100412" and an application publication number of "CN 106877724" respectively provide soft switching control strategies for full-bridge converters based on a critical conduction mode (CRM). However, the above control strategy requires high-precision detection of the inductor current to achieve precise comparison with the upper envelope and the lower envelope, as shown in fig. 2; meanwhile, because the reverse current of the inductor is a fixed value, the extra loss introduced by the converter when the current of the inductor is reversed cannot be well processed, and therefore the power conversion efficiency of the converter is not obviously improved by the control strategy. In order to solve the above problems, the document "z.liu, b.li, f.c.lee and q.li.high-Efficiency High-sensitivity Critical Mode Rectifier/Inverter for WBG-Device-Based On-Board charger. ieee Transactions On Industrial electronics.2017, 64 (11)" proposes a control strategy for extending the switching-off time of the switching tube, as shown in fig. 3, which can achieve a full range of switching tube ZVS and minimize the loss due to the reverse of the inductor current. However, the control strategy needs to accurately calculate the delay time of each switching period, and still needs a high-precision inductor current zero-crossing detection (ZCD) circuit, which results in high hardware cost.
Disclosure of Invention
In order to solve the technical problems, the invention provides a novel soft switching control strategy of a midpoint clamping type three-level inverter, the converter can be controlled to work in a critical conduction mode by the novel control strategy without accurately sampling an inductive current, the self-adaptive adjustment of the delay time of each switching period can be realized by detecting and outputting the voltage of a small coupling inductor secondary side connected with a filter inductor in series, the ZVS of a switching tube in each switching period is further realized, a high-precision current detector and complex calculation are avoided, and the technical advantages of low cost and high benefit are achieved.
In order to achieve the purpose, the technical scheme of the invention is as follows:
as shown in the attached drawing, the soft switch control circuit of the midpoint clamping type three-level inverter comprises a direct current power supply, a first direct current voltage division capacitor, a second direct current voltage division capacitor, a first switch tube, a second switch tube, a fourth switch tube, a first diode, a second diode, an output filter inductor, a coupling inductor, an output filter capacitor and a load resistor, wherein one end of the first direct current voltage division capacitor is connected with the positive electrode of the direct current power supply, the other end of the first direct current voltage division capacitor is connected with one end of the second direct current voltage division capacitor, the other end of the second direct current voltage division capacitor is connected with the negative electrode of the direct current power supply, the source electrode of the first switch tube is connected with the drain electrode of the second switch tube, the source electrode of the second switch tube is connected with the drain electrode of the third switch tube, the source electrode of the third switch tube is connected with the drain electrode of the fourth switch tube, the common end of the first switch tube and the second switch tube is connected with the cathode of the first diode, the common end of the third switching tube and the fourth switching tube is connected with the anode of a second diode, the anode of the first diode is connected with the cathode of the second diode, the common end of the first diode and the second diode is connected with the common end of a first direct current voltage-dividing capacitor and a second direct current voltage-dividing capacitor, the common end of the second switching tube and the third switching tube is connected to one end of an output filter capacitor through an output filter inductor, the other end of the output filter capacitor is connected with the common end of the first direct current voltage-dividing capacitor and the second direct current voltage-dividing capacitor, and a load resistor is connected with the output filter capacitor in parallel;
the control circuit part of the NPC inverter comprises a zero voltage switching-on detection circuit and a soft switching control circuit;
the zero voltage switching-on detection circuit comprises a coupling inductor, third to sixth diodes, a third capacitor, a second resistor, a third resistor and a first comparator;
the anode of the third diode is connected with the cathode of the fourth diode, the cathode of the third diode is connected with the cathode of the fifth diode, the anode of the fifth diode is connected with the cathode of the sixth diode, the anode of the sixth diode is connected with the cathode of the fourth diode, the dotted terminal of the secondary side of the coupling inductor is connected with the common terminal of the third diode and the fourth diode after being connected with the third capacitor in series, and the other end of the secondary side of the coupling inductor is connected with the common terminal of the fifth diode and the sixth diode; after the second resistor and the third resistor are connected in series, one end of the second resistor is connected with the common end of the third diode and the fifth diode, and the other end of the second resistor is connected with the common end of the fourth diode and the sixth diode; the positive input end of the first comparator is connected with the common end of the second resistor and the third resistor, and the negative input end of the first comparator is grounded; the output end of the first comparator is connected with the input ends of the second proportioner and the first inverter;
the soft switch control circuit comprises a first voltage sensor, a second comparator, a first adder, a second adder, a third adder, a fourth adder, a first multiplier, a fourth multiplier, a first divider, a second divider, a current regulator, a voltage regulator, a first proportioner, a third proportioner, a first inverter, a second inverter, a gate and a first driving circuit, wherein the first voltage sensor, the second comparator, the first adder, the third adder, the first divider, the fourth adder, the first divider, the second divider, the current regulator, the voltage regulator, the first proportioner, the second divider, the gate and the fourth driving circuit are connected in series;
the second voltage sensor samples the alternating voltage at the output end of the inverter circuit and is respectively connected with the input end of the phase locker, the negative input end of the fourth subtracter, the positive input end of the second comparator, the negative input end of the second subtracter and the divisor input end of the first divider; the positive input end of the fourth subtracter is connected with the effective value of the alternating current reference voltage, and the output end of the fourth subtracter is connected with the input end of the voltage regulatorConnecting; the voltage regulator is used for obtaining a voltage adjustment value after operation and is connected with one input end of a fourth multiplier, and the other input end of the fourth multiplier is the minimum value (T) of a switching periodmin) The output end of the fourth multiplier is connected with the output end of the first comparator, and the output end of the first comparator is connected with one input end of the first adder; one input end of the first multiplier is connected with the output end of the phase locker, and the other input end of the first multiplier is connected with the output end of the voltage regulator; the current sensor samples inductive current and is connected with the negative input end of the first subtracter, the positive input end of the first subtracter is connected with the output end of the first multiplier, and the output end of the first subtracter is connected with the input end of the current regulator; the current regulator is used for obtaining a current adjustment value after operation and is connected with one input end of a second multiplier, and the other input end of the second multiplier is the maximum value (T) of the switching periodmax) The output end of the second multiplier is connected with the other input end of the first adder; the first voltage sensor samples the direct-current voltage at the input end of the inverter circuit and is connected with the positive input end of the second subtracter, the output end of the second subtracter is connected with one input end of the third multiplier, and the other input end of the third multiplier is connected with the output end of the first adder; the output end of the third multiplier is connected with the dividend input end of the first divider, the output end of the first divider is connected with one input end of the second adder, the output end of the first comparator is connected with the other input end of the second adder after passing through the second proportioner, the output end of the second adder is connected with the positive input end of the third subtractor, meanwhile, the output end of the first comparator is connected with the negative input end of a third subtracter after passing through a first phase inverter and a third proportioner, the output end of the third subtracter is connected with one input end of a third adder, the other input end of the third adder is connected with the output end of the first adder, the output end of the third adder is connected with the divisor input end of a second divider, the dividend input end of the second divider is connected with the output end of the first adder, and the output end of the second divider is connected with the input end of a gate. One output end of the gate is connected with the first drive circuit to obtain a first switch tube drive signal (u)gs1) The other output end of the gate is connected with a fourth driving circuit to obtain a fourth switching tube driving signal (u)gs4);
The positive input end of the second comparator is connected with the output end of the voltage sensor, the negative input end of the second comparator is grounded, and the output end of the second comparator is connected with the second drive circuit to obtain a second switch tube drive signal (u)gs2) The output end of the second comparator is connected with a third driving circuit after passing through a second phase inverter to obtain a third switching tube driving signal (u)gs3)。
Further, for the gate, according to the current output logic value of the second comparator, the corresponding input signal is sent to the first driving circuit or the fourth driving circuit, and the specific process is as follows:
when the output of the second comparator is 1, the output of the second divider is sent to the first driving circuit and 0 is sent to the fourth driving circuit at the same time; when the output of the second comparator is 0, the output of the second divider is sent to the fourth driving circuit and 0 is sent to the first driving circuit at the same time.
Further, for the first scale, the scaling factor thereof is set to different values according to the output value of the second voltage sensor, and the specific process is as follows:
when the value of the second voltage sensor is between 0 and 160, the proportionality coefficient of the first proportioner is 0.125; when the value of the second voltage sensor is between 160 and 320, the scaling factor of the first scaler is 0.25.
Further, the proportionality coefficients of the second and third proportionality ratios are both minimum values (T) of the switching periodmin) One thousandth of (a).
Further, when the output voltage (V) of the three-level inverter is increasedac) At positive half cycle, the first switch tube drives the signal (u)gs1) The high-frequency action is carried out according to the output of the gate at the current moment, the switching period of the first switching tube is the current output value of the third adder, the high-level duty ratio of the first switching tube in the switching period is the current output value of the second divider, and the second switching tube drives a signal (u)gs2) For high-level, third switching tube drivingSignal (u)gs3) Is a low-level fourth switch tube driving signal (u)gs3) Is low level;
when the output voltage (V) of the three-level inverterac) At negative half cycle, the first switch tube drives the signal (u)gs1) Is a low level, second switch tube driving signal (u)gs2) Is a low-level, third switch tube driving signal (u)gs3) Is a high-level fourth switch tube driving signal (u)gs3) And the high-frequency action is carried out according to the output high frequency of the gate at the current moment, the switching period of the first switching tube is the current output value of the third adder, and the high-level duty ratio of the first switching tube in the switching period is the current output value of the second divider.
Adopt the beneficial effect that above-mentioned technical scheme brought:
(1) the NPC inverter works in a critical conduction mode, the turn-off time delay in each switching period is adaptively adjusted, the zero-voltage turn-on in the full range is realized, compared with the traditional SPWM modulation, the switching loss is reduced, and the conversion efficiency of the three-level inverter is improved;
(2) the critical conduction mode is realized without a high-precision current detector, so that the hardware cost is reduced, the control logic is simple, and the programming is easy to realize;
(3) the invention can make the inverter have higher efficiency under high switching frequency, and is beneficial to the high power density of the inverter equipment.
Drawings
FIG. 1 is a topology of a three level inverter of the present invention;
fig. 2 shows a critical conduction mode modulation strategy proposed by patent "CN 106100412";
FIG. 3 is a soft switching control strategy proposed in the paper "Z.Liu, B.Li, F.C.Lee and Q.Li.high-Efficiency High-sensitivity Critical Mode Rectifier/Inverter for WBG-Device-Based On-Board Charge director. IEEE Transactions On Industrial electronics.2017, 64 (11)";
FIG. 4 illustrates an implementation of a soft switching control strategy for a point-clamped three-level inverter according to the present invention;
FIG. 5 is a flowchart illustrating a soft switching control strategy implemented in the point-clamped three-level inverter according to the present invention;
FIG. 6 illustrates the operation mode of the three-level inverter according to the present invention;
fig. 7 is a simulation waveform of soft switching control of the three-level inverter according to the present invention.
Detailed Description
The technical solution of the present invention will be described in detail below with reference to the accompanying drawings.
Fig. 4 shows a soft switching control circuit of a midpoint clamp type three-level inverter according to the present invention. The neutral point clamping type three-level inverter comprises a direct-current power supply VdcAn input voltage-dividing capacitor 1, a three-level inverter circuit 2 and an output filter inductor LfA coupling inductor L1An output filter capacitor CfAnd a load resistor R. The control circuit comprises a zero voltage turn-on detection circuit 3 and a soft switch control circuit 4. The zero-voltage-switching detection circuit 3 comprises a capacitor, four diodes, two resistors, a coupling inductor and a comparator; the soft switch control circuit 4 comprises two voltage sensors, a current sensor, a comparator, three adders, four subtractors, four multipliers, two dividers, a current regulator, a voltage regulator, three proportioners, two inverters, a gate, a phase locker and four driving circuits, and specifically comprises the following steps:
for the zero-voltage switching-on detection circuit, the anode of a third diode is connected with the cathode of a fourth diode, the cathode of the third diode is connected with the cathode of a fifth diode, the anode of the fifth diode is connected with the cathode of a sixth diode, the anode of the sixth diode is connected with the cathode of the fourth diode, the dotted terminal of the secondary side of a coupling inductor is connected with the common terminal of the third diode and the fourth diode after being connected with a third capacitor in series, and the other end of the secondary side of the coupling inductor is connected with the common terminal of the fifth diode and the sixth diode; after the second resistor and the third resistor are connected in series, one end of the second resistor is connected with the common end of the third diode and the fifth diode, and the other end of the second resistor is connected with the common end of the fourth diode and the sixth diode; the positive input end of the first comparator is connected with the common end of the second resistor and the third resistor, and the negative input end of the first comparator is grounded; the output end of the first comparator is connected with the input ends of the second comparator and the first inverter.
For the soft switch control circuit, the second voltage sensor samples the alternating voltage at the output end of the inverter circuit and is respectively connected with the input end of the phase locker, the negative input end of the fourth subtracter, the positive input end of the second comparator, the negative input end of the second subtracter and the divisor input end of the first divider; the positive input end of the fourth subtracter is connected with the effective value of the alternating current reference voltage, and the output end of the fourth subtracter is connected with the input end of the voltage regulator; the voltage regulator is used for obtaining a voltage adjustment value after operation and is connected with one input end of a fourth multiplier, and the other input end of the fourth multiplier is the minimum value (T) of a switching periodmin) The output end of the fourth multiplier is connected with the output end of the first comparator, and the output end of the first comparator is connected with one input end of the first adder; one input end of the first multiplier is connected with the output end of the phase locker, and the other input end of the first multiplier is connected with the output end of the voltage regulator; the current sensor samples inductive current and is connected with the negative input end of the first subtracter, the positive input end of the first subtracter is connected with the output end of the first multiplier, and the output end of the first subtracter is connected with the input end of the current regulator; the current regulator is used for obtaining a current adjustment value after operation and is connected with one input end of a second multiplier, and the other input end of the second multiplier is the maximum value (T) of the switching periodmax) The output end of the second multiplier is connected with the other input end of the first adder; the first voltage sensor samples the direct-current voltage at the input end of the inverter circuit and is connected with the positive input end of the second subtracter, the output end of the second subtracter is connected with one input end of the third multiplier, and the other input end of the third multiplier is connected with the output end of the first adder; the output end of the third multiplier is connected with the dividend input end of the first divider, the output end of the first divider is connected with one input end of the second adder, the output end of the first comparator is connected with the other input end of the second adder after passing through the second proportioner, and the output end of the second adder is connected with the second adderThe positive input end of the third subtracter is connected, meanwhile, the output end of the first comparator is connected with the negative input end of the third subtracter after passing through the first phase inverter and the third proportioner, the output end of the third subtracter is connected with one input end of the third adder, the other input end of the third adder is connected with the output end of the first adder, the output end of the third adder is connected with the divisor input end of the second divider, the dividend input end of the second divider is connected with the output end of the first adder, and the output end of the second divider is connected with the input end of the gate. One output end of the gate is connected with the first drive circuit to obtain a first switch tube drive signal (u)gs1) The other output end of the gate is connected with a fourth driving circuit to obtain a fourth switching tube driving signal (u)gs4)。
The positive input end of the second comparator is connected with the output end of the voltage sensor, the negative input end of the second comparator is grounded, and the output end of the second comparator is connected with the second drive circuit to obtain a second switch tube drive signal (u)gs2) The output end of the second comparator is connected with a third driving circuit after passing through a second phase inverter to obtain a third switching tube driving signal (u)gs3)。
In this embodiment, the following preferred technical solutions are adopted:
when the output of the second comparator is 1, the output of the second divider is sent to the first driving circuit and 0 is sent to the fourth driving circuit at the same time; when the output of the second comparator is 0, the output of the second divider is sent to the fourth driving circuit and 0 is sent to the first driving circuit at the same time.
When the value of the second voltage sensor is between 0 and 160, the proportionality coefficient of the first proportioner is 0.125; when the value of the second voltage sensor is between 160 and 320, the scaling factor of the first scaler is 0.25.
The proportionality coefficients of the second and third proportionality units are both the minimum value (T) of the switching periodmin) One thousandth of (a).
When the output voltage (V) of the three-level inverterac) At positive half cycle, the first switch tube drives the signal (u)gs1) Output of the strobe at the present timeHigh-frequency operation, the switching period of the first switch tube is the current output value of the third adder, the duty ratio of the high level of the first switch tube in the switching period is the current output value of the second divider, and the second switch tube drives a signal (u)gs2) Is a high-level, third switch tube driving signal (u)gs3) Is a low-level fourth switch tube driving signal (u)gs3) Is low.
When the output voltage (V) of the three-level inverterac) At negative half cycle, the first switch tube drives the signal (u)gs1) Is a low level, second switch tube driving signal (u)gs2) Is a low-level, third switch tube driving signal (u)gs3) Is a high-level fourth switch tube driving signal (u)gs3) And the high-frequency action is carried out according to the output high frequency of the gate at the current moment, the switching period of the first switching tube is the current output value of the third adder, and the high-level duty ratio of the first switching tube in the switching period is the current output value of the second divider.
Fig. 5 is a control flow chart of the present invention. The second voltage sensor samples the alternating voltage at the output end of the inverter circuit, and the current sensor samples the output current or inductive current of the inverter and calculates the voltage adjustment amount and the current adjustment amount in the voltage regulator and the current regulator respectively. And multiplying the current adjustment quantity by the maximum value of the preset switching period, multiplying the voltage adjustment quantity by the minimum value of the preset switching period, and finally adding the current adjustment quantity and the voltage adjustment quantity to obtain the conduction time of the switching tube in the next switching period. And calculating the turn-off time of the switching tube in the next switching period according to the calculated conduction time and the DC side voltage sampled by the first voltage sensor and an inductance volt-second balance principle. The positive input end of the first comparator is a switching tube ZVS detection signal, which is as follows:
when the ZVS switching-on is realized in the previous period, the secondary side voltage of the coupling inductor has no instantaneous sudden change, the voltage drop slope is small, and the positive input end of the first comparator is a low-level signal, so that the output end of the first comparator is logic 0; on the contrary, if the switching tube of the last cycle does not realize ZVS (zero voltage switching) on, the voltage of the secondary side of the coupling inductor has instantaneous sudden change, the voltage drop slope has a large value of the sudden change, and the positive input end of the first comparator is a high-level signal at the moment, so that the output end of the first comparator is logic 1. Calculating the turn-off time, detecting the output end of the first comparator, if the turn-off time is 1, indicating that the switching tube does not realize ZVS (zero voltage switching) on in the previous switching period, and prolonging the turn-off time of the switching tube according to a fixed step length in the next switching period, wherein the step length is the proportionality coefficient of the third proportioner; on the contrary, if the output end of the first comparator is 0, it indicates that the switching tube has already realized ZVS switching on in the previous switching period, and the turn-off time of the switching tube needs to be reduced by a fixed step length in the next switching period to avoid introducing excessive loss, where the step length is the proportionality coefficient of the second proportioner.
And finally, adding the adjusted switching tube turn-off time and the calculated switching tube turn-on time to obtain the switching cycle time and the corresponding duty ratio of the switching tube in the next cycle, and sending the corresponding input signal to a correct driving circuit by a gate.
When the soft switching control strategy of the three-level inverter provided by the invention is adopted, the switching mode of the inverter in one alternating current period is shown in fig. 6. When the inverter outputs AC voltage in positive half cycle, the first switch tube S1When conducting, the inductive current passes through the first switch tube S1And a second switching tube S2Linearly rising (see (a) of fig. 6), the first switching tube S1The on-time of the soft switch control loop is the on-time calculated by the soft switch control loop when the last switching period is finished; first switch tube S1After being turned off, the inductive current passes through the first diode D1And a second switching tube S2The linear decrease (see (b) in fig. 6), when the inductor current decreases to 0, the inductor and the first switch tube S1And a second switching tube S2The junction capacitance of the first switch tube S is resonated, resulting in reverse current in the inductor and forcing the first switch tube S1The first switch tube S1Starts to fall (see (c) in fig. 6); because of the first switch tube S1The turn-off time is controlled by the volt-second balance principle and the ZVS detection circuit together, so that the first switching tube S is used as the first switching tube1When the first switch tube S is switched on again1Has been reduced to 0, whenFirst switch tube S1Turn on for zero voltage (see (d) in fig. 6).
When the inverter outputs AC voltage in negative half cycle, the fourth switch tube S4When conducting, the inductive current passes through the fourth switch tube S4And a third switching tube S3Linearly rising (see (e) of fig. 6), and a fourth switching tube S4The on-time of the soft switch control loop is the on-time calculated by the soft switch control loop when the last switching period is finished; fourth switch tube S4After the switch-off, the inductive current passes through the second diode D2And a third switching tube S3Linearly decreases (see (f) in fig. 6), and when the inductor current decreases to 0, the inductor and the fourth switching tube S4And a third switching tube S3The junction capacitance of the second switch tube is resonated, so that reverse current is generated in the inductor and the fourth switch tube S is forced4The fourth switch tube S4Starts to fall (see (g) in fig. 6); because of the fourth switch tube S4The turn-off time is controlled by the volt-second balance principle and the ZVS detection circuit together, so that the fourth switching tube S is used4When it is turned on again, the fourth switch tube S4The drain-source voltage of (2) has been reduced to 0, and the fourth switch tube S is now4Turn on for zero voltage (see (h) in fig. 6).
According to the technical scheme of the invention, a simulation model is built, and a simulation waveform under the control strategy provided by the invention is obtained, as shown in FIG. 7. First switch tube S1Drive signal u ofgs1And its drain-source voltage uds1The waveform of the three-level inverter soft switching control scheme provided by the invention is verified to be correct.
The embodiments are only for illustrating the technical idea of the present invention, and the technical idea of the present invention is not limited thereto, and any modifications made on the basis of the technical scheme according to the technical idea of the present invention fall within the scope of the present invention.

Claims (5)

1. A soft switch control circuit of a single-phase midpoint clamping type three-level inverter comprises a direct current power supply, a first direct current voltage division capacitor, a second direct current voltage division capacitor, a first switch tube, a second switch tube, a fourth switch tube, a first diode, a second diode, a primary side of a coupling inductor, an output filter capacitor and a load resistor, wherein one end of the first direct current voltage division capacitor is connected with the positive electrode of the direct current power supply, the other end of the first direct current voltage division capacitor is connected with one end of the second direct current voltage division capacitor, the other end of the second direct current voltage division capacitor is connected with the negative electrode of the direct current power supply, the source electrode of the first switch tube is connected with the drain electrode of the second switch tube, the source electrode of the second switch tube is connected with the drain electrode of the third switch tube, the source electrode of the third switch tube is connected with the drain electrode of the fourth switch tube, and the common end of the first switch tube and the second switch tube is connected with the cathode of the first diode, the common end of the third switching tube and the common end of the fourth switching tube are connected with the anode of a second diode, the anode of the first diode is connected with the cathode of the second diode, the common end of the first diode and the second diode is connected with the common end of a first direct current voltage-dividing capacitor and a second direct current voltage-dividing capacitor, the common end of the second switching tube and the third switching tube is connected to the primary side homonymous end of a coupling inductor through an output filter inductor, the primary side synonym end of the coupling inductor is connected with one end of the output filter capacitor, the other end of the output filter capacitor is connected with the common end of the first direct current voltage-dividing capacitor and the second direct current voltage-dividing capacitor, and a load resistor is connected with the output filter capacitor in parallel; the method is characterized in that:
the soft switch control circuit part of the single-phase midpoint clamping type three-level inverter comprises a zero voltage switching-on detection circuit and a soft switch control circuit;
the zero voltage switching-on detection circuit comprises a coupling inductance secondary side, third to sixth diodes, a third capacitor, a second resistor, a third resistor and a first comparator;
the anode of the third diode is connected with the cathode of the fourth diode, the cathode of the third diode is connected with the cathode of the fifth diode, the anode of the fifth diode is connected with the cathode of the sixth diode, the anode of the sixth diode is connected with the anode of the fourth diode, the dotted terminal of the secondary side of the coupling inductor is connected with the common terminal of the third diode and the fourth diode after being connected with the third capacitor in series, and the dotted terminal of the secondary side of the coupling inductor is connected with the common terminal of the fifth diode and the sixth diode; after the second resistor and the third resistor are connected in series, one end of the second resistor is connected with the common end of the third diode and the fifth diode, and the other end of the second resistor is connected with the common end of the fourth diode and the sixth diode; the positive input end of the first comparator is connected with the common end of the second resistor and the third resistor, and the negative input end of the first comparator is grounded; the output end of the first comparator is connected with the input ends of the second proportioner and the first inverter;
the soft switch control circuit comprises a first voltage sensor, a second comparator, a first adder, a second adder, a third adder, a fourth adder, a first multiplier, a fourth multiplier, a first divider, a second divider, a current regulator, a voltage regulator, a first proportioner, a third proportioner, a first phase inverter, a second phase inverter, a gate, a phase locker and a first driving circuit, wherein the first voltage sensor, the second comparator, the first adder, the third adder, the first subtracter, the fourth subtracter, the first multiplier, the fourth multiplier, the first divider, the second divider, the current regulator, the voltage regulator, the first proportioner, the third proportioner, the first phase inverter, the second phase inverter, the gate, the phase locker and the fourth driving circuit are connected in series;
the second voltage sensor samples the alternating voltage at the output end of the inverter circuit and is respectively connected with the input end of the phase locker, the negative input end of the fourth subtracter, the positive input end of the second comparator, the negative input end of the second subtracter and the divisor input end of the first divider; the positive input end of the fourth subtracter is connected with the effective value of the alternating current reference voltage, and the output end of the fourth subtracter is connected with the input end of the voltage regulator; the voltage regulator is used for obtaining a voltage adjustment value after operation and is connected with one input end of a fourth multiplier, the other input end of the fourth multiplier is the minimum value of a switching period, the output end of the fourth multiplier is connected with the input end of a first comparator, and the output end of the first comparator is connected with one input end of a first adder; one input end of the first multiplier is connected with the output end of the phase locker, and the other input end of the first multiplier is connected with the output end of the voltage regulator; the current sensor samples inductive current and is connected with the negative input end of the first subtracter, the positive input end of the first subtracter is connected with the output end of the first multiplier, and the output end of the first subtracter is connected with the input end of the current regulator; the current adjustment quantity is obtained after the operation of the current regulator and is connected with one input end of a second multiplier, the other input end of the second multiplier is the maximum value of the switching period, and the output end of the second multiplier is connected with the other input end of the first adder; the first voltage sensor samples the direct-current voltage at the input end of the inverter circuit and is connected with the positive input end of the second subtracter, the output end of the second subtracter is connected with one input end of the third multiplier, and the other input end of the third multiplier is connected with the output end of the first adder; the output end of the third multiplier is connected with the dividend input end of the first divider, the output end of the first divider is connected with one input end of the second adder, the output end of the first comparator is connected with the other input end of the second adder after passing through the second proportioner, the output end of the second adder is connected with the positive input end of the third subtractor, meanwhile, the output end of the first comparator is connected with the negative input end of a third subtracter after passing through a first phase inverter and a third proportioner, the output end of the third subtracter is connected with one input end of a third adder, the other input end of the third adder is connected with the output end of the first adder, the output end of the third adder is connected with the divisor input end of a second divider, the dividend input end of the second divider is connected with the output end of the first adder, and the output end of the second divider is connected with the input end of a gate; one output end of the gate is connected with the first driving circuit to obtain a first switching tube driving signal, and the other output end of the gate is connected with the fourth driving circuit to obtain a fourth switching tube driving signal;
the positive input end of the second comparator is connected with the output end of the second voltage sensor, the negative input end of the second comparator is grounded, the output end of the second comparator is connected with the second driving circuit to obtain a second switching tube driving signal, and the output end of the second comparator is connected with the third driving circuit after passing through the second phase inverter to obtain a third switching tube driving signal.
2. The soft switching control circuit of the single-phase midpoint clamping type three-level inverter according to claim 1, characterized in that: for the gate, corresponding input signals are sent to the first driving circuit and the fourth driving circuit according to the current logic value of the output end of the second comparator, and the specific process is as follows:
when the output of the second comparator is 1, the output of the second divider is sent to the first driving circuit and 0 is sent to the fourth driving circuit at the same time; when the output of the second comparator is 0, the output of the second divider is sent to the fourth driving circuit and 0 is sent to the first driving circuit at the same time.
3. The soft switching control circuit of the single-phase midpoint clamping type three-level inverter according to claim 1, characterized in that: for the first comparator, the scaling factor of the first comparator is set to different values according to the current output value of the first voltage sensor, and the specific process is as follows:
when the value of the second voltage sensor is between 0 and 160, the proportionality coefficient of the first proportioner is 0.125; when the value of the second voltage sensor is between 160 and 320, the scaling factor of the first scaler is 0.25.
4. The soft switching control circuit of the single-phase midpoint clamping type three-level inverter according to claim 1, characterized in that: the proportionality coefficients of the second and third proportionality devices are thousandth times of the minimum value of the switching period.
5. The soft switching control circuit of the single-phase midpoint clamping type three-level inverter according to claim 1, characterized in that: when the output voltage of the single-phase midpoint clamping type three-level inverter is in a positive half cycle, the driving signal of the first switching tube acts according to the output high frequency of the gate at the current moment, the switching period of the first switching tube is the output value of the current third adder, the duty ratio of the high level of the first switching tube in the switching period is the output value of the current second divider, the driving signal of the second switching tube is high level, the driving signal of the third switching tube is low level, and the driving signal of the fourth switching tube is low level;
when the output voltage of the single-phase midpoint clamping type three-level inverter is in a negative half cycle, the first switching tube driving signal is in a low level, the second switching tube driving signal is in a low level, the third switching tube driving signal is in a high level, the fourth switching tube driving signal acts according to the output high frequency of the current gate, the switching period of the first switching tube is the current output value of the third adder, and the duty ratio of the high level of the first switching tube in the switching period is the current output value of the second divider.
CN202011489997.3A 2020-12-16 2020-12-16 Soft switch control circuit of neutral point clamping type three-level inverter Active CN112636622B (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105048490A (en) * 2015-06-24 2015-11-11 盐城工学院 Low current stress photovoltaic micro inverter and digital control device associated with the same
CN106130352A (en) * 2016-06-30 2016-11-16 盐城工学院 The micro-inverter of intermediate current type double tube positive exciting and numerical control device thereof
CN109756138A (en) * 2019-01-29 2019-05-14 河海大学 A kind of control circuit of five Level Full Bridges inverter
CN111555605A (en) * 2020-05-22 2020-08-18 西安理工大学 Control method for reducing critical mode three-level converter switching frequency range

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103872920B (en) * 2014-03-13 2016-10-05 北京理工大学 The leakage inductance electric current direct slop control method of isolated two-way three-level converter
US10291109B2 (en) * 2017-01-18 2019-05-14 Virginia Tech Intellectual Properties, Inc. Critical-mode-based soft-switching techniques for three-phase bi-directional AC/DC converters
US10742127B2 (en) * 2018-07-03 2020-08-11 Utah State University Battery integrated modular multifunction converter for grid energy storage systems
US10886860B2 (en) * 2019-05-20 2021-01-05 Virginia Tech Intellectual Properties, Inc. Three-phase, three-level inverters and methods for performing soft switching with phase synchronization

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105048490A (en) * 2015-06-24 2015-11-11 盐城工学院 Low current stress photovoltaic micro inverter and digital control device associated with the same
CN106130352A (en) * 2016-06-30 2016-11-16 盐城工学院 The micro-inverter of intermediate current type double tube positive exciting and numerical control device thereof
CN109756138A (en) * 2019-01-29 2019-05-14 河海大学 A kind of control circuit of five Level Full Bridges inverter
CN111555605A (en) * 2020-05-22 2020-08-18 西安理工大学 Control method for reducing critical mode three-level converter switching frequency range

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"Three-Level NPC Dual-Buck Inverter Designed to Safety-Critical Applications";Armando Cordeiro,等;《2020 IEEE 14th International Conference on Compatibility,Power Electronics and Power Engineering(CPE-POWERENG)》;20200807;全文 *

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