CN112366652A - Protection circuit and circuit protection system - Google Patents
Protection circuit and circuit protection system Download PDFInfo
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- CN112366652A CN112366652A CN202011282505.3A CN202011282505A CN112366652A CN 112366652 A CN112366652 A CN 112366652A CN 202011282505 A CN202011282505 A CN 202011282505A CN 112366652 A CN112366652 A CN 112366652A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/20—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage
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Abstract
The invention discloses a protection circuit which comprises an input power supply, a load power supply, a first P-channel field effect transistor, a second P-channel field effect transistor, a comparator, a reference voltage source, a voltage division circuit and a one-way conduction circuit, wherein the input power supply is connected with the drain electrode of the first P-channel field effect transistor, the load power supply is connected with the drain electrode of the second P-channel field effect transistor, the source electrode of the first P-channel field effect transistor is connected with the source electrode of the second P-channel field effect transistor and then connected with the positive phase input end of the comparator through the voltage division circuit, the grid electrode of the first P-channel field effect transistor is connected with the grid electrode of the second P-channel field effect transistor and then connected with the output end of the comparator, and the load power supply is connected with the reference voltage source and then connected with the reverse phase input end of the comparator. The invention provides a protection circuit which can realize the functions of quick response and effective isolation and can be repeatedly used.
Description
Technical Field
The invention relates to a protection circuit and a circuit protection system, in particular to a protection circuit and a circuit protection system based on a P-channel field effect transistor and a comparator.
Background
In the weak current field, a protection circuit is often added on an output path of a power supply, so that when the load has an overcurrent or overvoltage condition, corresponding measures are taken in time to protect components and the power supply in the load; for overvoltage protection, it is a common practice in the prior art that when the output voltage exceeds a certain range, the protection device short-circuits the system, thereby discharging the generated instantaneous overvoltage, but this measure greatly affects the system power supply, so it is necessary to design a protection circuit that has a simple circuit structure, can effectively isolate the load from the power supply in a timely response.
Disclosure of Invention
One of the objectives of the present invention is to provide a protection circuit, so as to solve the technical problem that the protection circuit cannot effectively isolate the load from the power supply due to the untimely response.
One object of the present invention is to provide a circuit protection system.
In order to achieve one of the above objects, an embodiment of the present invention provides a protection circuit, which includes an input power source, a load power source, a first P-channel fet, a second P-channel fet, a comparator, a reference voltage source, a voltage divider circuit, and a unidirectional conduction circuit, wherein the input power source is connected to a drain of the first P-channel fet, the load power source is connected to a drain of the second P-channel fet, a source of the first P-channel fet is connected to a source of the second P-channel fet and then connected to a positive input terminal of the comparator through the voltage divider circuit, a gate of the first P-channel fet is connected to a gate of the second P-channel fet and then connected to an output terminal of the comparator, and the load power source is connected to the reference voltage source and then connected to an inverted input terminal of the comparator, the load power supply is connected with the branch circuit connected with the inverting input end of the comparator, the unidirectional conduction circuit is arranged on the branch circuit, and the current direction of the unidirectional conduction circuit is directed to the load power supply from the inverting input end of the comparator.
As a further improvement of the embodiment of the present invention, the protection circuit further includes a first resistor, one end of the first resistor is connected to the input power supply, and the other end of the first resistor is connected to the output end of the comparator.
As a further improvement of the embodiment of the present invention, the first resistor is a pull-up resistor, and when the output terminal of the comparator is at a high level, the pull-up resistor is used to increase the high level value, so as to improve the capability of driving the first P-channel fet and the second P-channel fet.
As a further improvement of the embodiment of the present invention, the voltage dividing circuit includes a second resistor and a third resistor, the second resistor is connected in series between the source of the first P-channel fet, the source of the second P-channel fet, and the positive input terminal of the comparator, one end of the third resistor is grounded, and the other end of the third resistor is connected to the positive input terminal of the comparator.
As a further improvement of the embodiment of the present invention, the unidirectional circuit includes a first diode, an anode of the first diode is connected to the inverting input terminal of the comparator, and a cathode of the first diode is connected to the load power supply.
As a further improvement of the embodiment of the present invention, the protection circuit further includes a second diode, and the second diode is connected in series to the branch where the voltage dividing circuit is located, so as to enable a current to flow to the non-inverting input terminal of the comparator.
As a further improvement of the embodiment of the present invention, the protection circuit further includes a first capacitor and a second capacitor, one end of the first capacitor is connected to the inverting input terminal of the comparator, the other end of the first capacitor is grounded, one end of the second capacitor is connected to the non-inverting input terminal of the comparator, and the other end of the second capacitor is grounded.
As a further improvement of the embodiment of the present invention, the protection circuit further includes a third capacitor and a fourth capacitor, one end of the third capacitor is connected to the input power supply, the other end of the third capacitor is grounded, one end of the fourth capacitor is connected to the load power supply, and the other end of the fourth capacitor is grounded.
As a further improvement of the embodiment of the present invention, the protection circuit further includes a fourth resistor and a fifth resistor, one end of the fourth resistor is connected to the reference voltage source, the other end of the fourth resistor is connected to the inverting input terminal of the comparator, one end of the fifth resistor is connected to the input power source, and the other end of the fifth resistor is grounded.
In order to achieve one of the above objectives, an embodiment of the present invention provides a circuit protection system, including the protection circuit according to any one of the above technical solutions, and a management module, where the management module is electrically connected to the first P-channel fet and is configured to control the first P-channel fet to turn on and off.
Compared with the prior art, the protection circuit provided by the invention has the advantages that the output from a power supply to a load is controlled by arranging the two P-channel field effect transistors and the comparator, the functions of quick response and effective isolation are realized by utilizing the characteristics of high level cut-off and negative voltage conduction of the grid electrodes of the P-channel field effect transistors, and the protection circuit can be repeatedly used.
Drawings
Fig. 1 is a schematic circuit diagram of a protection circuit according to an embodiment of the present invention.
Detailed Description
The present invention will be described in detail below with reference to specific embodiments shown in the drawings. These embodiments are not intended to limit the present invention, and structural, methodological, or functional changes made by those skilled in the art according to these embodiments are included in the scope of the present invention.
It is to be noted that the term "comprises," "comprising," or any other variation thereof is intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In an embodiment of the invention, the protection circuit is disposed in a circuit protection system.
Specifically, in a General technical means in the field, the management module is generally connected to the protection circuit and internal components thereof through a General-purpose input/output (GPIO) to provide an operation mode of manual turn-on and turn-off for the protection circuit, and when the protection circuit has a fault, the protection circuit is forcibly turned off to prevent the protection circuit from affecting a front-end input or a rear-end load.
Further, as shown in fig. 1, in the present embodiment, the protection circuit includes an input power source 1, a load power source 2, a first P-channel fet MP1, a second P-channel fet MP2, a comparator 3, a reference voltage source 4, a voltage divider circuit 5 and a unidirectional conduction circuit 6, wherein the input power source 1 is connected to a drain of the first P-channel fet MP1, the load power source 2 is connected to a drain of the second P-channel fet MP2, a source of the first P-channel fet MP1 is connected to a source of the second P-channel fet MP2, and then is connected to a non-inverting input terminal of the comparator 3 through the voltage divider circuit 5, and the voltage divider circuit 5 is mainly used to reduce a voltage connected to the inverting input terminal of the comparator 3; the grid of the first P-channel field effect transistor MP1 is connected to the grid of the second P-channel field effect transistor MP2 and then to the output of the comparator 3, the load power supply 2 is connected to the reference voltage source 4 and then to the inverting input of the comparator 3, the unidirectional conducting circuit 6 is provided in the branch circuit where the load power supply 2 is connected to the inverting input of the comparator 3, and the current direction of the unidirectional conducting circuit 6 is directed to the load power supply 2 from the inverting input of the comparator 3.
It can be understood that the P-channel fet is configured as an N-type silicon substrate, so that the majority carriers inside are holes and the minority carriers are electrons, and further, two P regions are disposed on the N-type silicon substrate and respectively form a source and a drain, so that a negative voltage is applied to the gate relative to the source, that is, a negative charge electron is applied to the gate of the P-channel fet, and thus positive charge holes and a depletion layer with fixed positive charge can be correspondingly induced on the silicon substrate, and thus the P-channel fet is turned on. In the present embodiment, by utilizing this characteristic, the P-channel fet can be controlled to be turned off and on by applying a high or low level to the gate.
In addition, because the P-channel fets have the parasitic fast recovery diode inside, and the drain of the parasitic fast recovery diode points to the source, in this embodiment, since the sources of the two P-channel fets are connected, the intermediate voltage between the two P-channel fets, i.e., Umid shown in fig. 1, is always the same as the voltage received by the higher one of the two P-channel fets when both P-channel fets are turned on, so in the embodiment where the source of the first P-channel fet MP1 is connected to the input power source 1 and the second P-channel fet MP2 is connected to the load power source 2, Umid is always equal to the larger one of the input power source 1 and the load power source 2. By using the characteristics of the P-channel field effect transistor, the voltage of the input power supply 1 and the load power supply 2 can be judged, and the condition of the load circuit can be obtained.
Specifically, the voltage of the input power supply 1 is defined as Uin, the voltage of the load power supply 2 is defined as Uout, the voltage of the reference voltage source 4 is defined as Uref, the voltage of the non-inverting input terminal of the comparator 3 is defined as U +, the voltage of the inverting input terminal of the comparator 3 is defined as U-, and the voltage of the output terminal of the comparator 3 is defined as Uo, and the description of the specific operating principle of the protection circuit is as follows:
when the circuit works normally, the voltage Uref of the reference voltage source 4 is set to be smaller than the voltage Uin of the input power source 1 and the voltage Uout of the load power source 2, and Uref is larger than the voltage obtained by dividing the intermediate voltage Umid between the two P-channel fets by the voltage divider circuit, that is, larger than the voltage U + of the positive input terminal of the comparator 3, so that the voltage Uo of the output terminal of the comparator 3 is a negative value, Uo is applied to the gates of the two P-channel fets, the first P-channel fet MP1 and the second P-channel fet MP2 are both turned on, and the protection circuit is normally turned on.
When the load power supply 2 or the circuit connected with the load power supply 2 has an overcurrent short circuit, the voltage Uout of the load power supply 2 is lower than the voltage Uref of the reference voltage source 4, the unidirectional conducting circuit 6 is conducted, at this time, under the condition that the conduction voltage drop of the unidirectional conducting circuit 6 is not considered, the voltage U-of the inverting input end of the comparator 3 is equal to the voltage Uout of the load power supply 2, meanwhile, because a parasitic fast recovery diode exists inside the P-channel field effect transistor, when the voltage Uout of the load power supply 2 is lower than the voltage Uin of the input power supply 1, the intermediate voltage Umid is equal to the voltage Uin of the input power supply 1, the intermediate voltage Umid passes through the voltage dividing circuit 5 and is input to the non-inverting input end of the comparator 3, at this time, because the circuit is in an abnormal working condition, the voltage Uo of the output end of the comparator 3 needs to be regulated to be at a high level, and the first P-channel, i.e. so that U + is greater than U-, a first inequality is obtained with respect to the voltage Uout of the load power supply 2 and the voltage Uin of the input power supply 1.
When the load power supply 2 or the circuit connected with the load power supply 2 generates an overvoltage pulse, the voltage Uout of the load power supply 2 is higher than the voltage Uref of the reference voltage source 4, the unidirectional conduction circuit 6 is turned off, at this time, the voltage U-of the inverting input terminal of the comparator 3 is equal to the voltage Uref of the reference voltage source 4, meanwhile, because a parasitic fast recovery diode exists inside the P-channel fet, when the voltage Uout of the load power supply 2 is higher than the voltage Uin of the input power supply 1, the intermediate voltage Umid is equal to the voltage Uout of the load power supply 2, the intermediate voltage Umid passes through the voltage division circuit 5 and then is input to the non-inverting input terminal of the comparator 3, at this time, because the circuit is in an abnormal working condition, the voltage Uo of the output terminal of the comparator 3 also needs to be regulated and controlled to be high level, and then the first P-channel fet MP1 and the second P-channel fet MP2 are turned off, so that the voltage U + of the non, in this way, a second inequality with respect to the voltage Uout of the load power supply 2 and the voltage Uref of the reference voltage source 4 is obtained.
Further, the power protection window can be obtained by combining the first inequality and the second inequality, so that the protection requirements of various electronic products can be met by adjusting, expanding or limiting the voltage Uout of the load power supply 2. Meanwhile, the circuit provided by the above embodiment of the present invention has the function of timely response and effectively isolating the load power supply 2 from the input power supply 1, and more specifically, when the load power supply 2 is in an overcurrent short circuit, the first P-channel fet MP1 can block the input power supply 1 from damaging the protection circuit, the load power supply 2 and the circuits connected to the load power supply 2, and when the load power supply 2 generates an overvoltage pulse, the second P-channel fet MP2 can block the overvoltage pulse from flowing backwards, thereby damaging the protection circuit and the input power supply 1.
It can be understood that, in the present embodiment, the protection circuit is disposed in the circuit protection system, and the management module is electrically connected to the first P-channel fet MP1 of the protection circuit through GPIO to control the on/off of the first P-channel fet MP1, specifically, the management module is electrically connected to the gate of the first P-channel fet MP1, and when the management module outputs a high level to the gate, the management module can forcibly turn off the first P-channel fet MP1, and further, in the present embodiment, since the gates of the first P-channel fet MP1 and the second P-channel fet MP2 are connected to each other, the management module can also forcibly turn off the second P-channel fet when the management module outputs a high level to the first P-channel fet MP1 through GPIO. Thus, the protection circuit and the circuit protection system provided by the invention not only can automatically respond and disconnect the connection between the load power supply 2 and the input power supply 1, but also can output high level through the management module to carry out forced turn-off, thereby realizing the manual control of the circuit.
In an embodiment of the present invention, a plurality of protection circuits are arranged between the power supply and the load, and when different loads respectively have abnormal operating conditions, the connection between a single load and the power supply can be controlled and disconnected, so that the present invention is more convenient for a worker to perform fixed-point debugging and troubleshooting compared with the prior art in which only one protection circuit is arranged between the power supply and the load.
On the other hand, in the present embodiment, as shown in fig. 1, the protection circuit further includes a first resistor R1, one end of the first resistor R1 is connected to the input power supply 1, and the other end is connected to the output terminal of the comparator 3. The first resistor R1 is actually a pull-up resistor, and is used to increase the high level value when the voltage Uo at the output terminal of the comparator 3 is at a high level, so as to improve the capability of driving the first P-channel fet MP1 and the second P-channel fet, thereby making the protection circuit more responsive. Of course, in other embodiments of the invention, other circuit configurations are also possible which are sufficient to pull up the voltage Uo at the output of the comparator 3.
More specifically, the voltage divider circuit 5 includes a second resistor R2 and a third resistor R3, the second resistor R2 is connected in series between the source of the first P-channel fet MP1, the source of the second P-channel fet MP2 and the non-inverting input terminal of the comparator 3, one end of the third resistor R3 is grounded, and the other end is connected to the non-inverting input terminal of the comparator 3. A constant value resistor is arranged to form a voltage division circuit, so that subsequent calculation and actual production and assembly are facilitated.
In the branch where the voltage dividing circuit 5 is located, the voltage of the voltage dividing circuit 5 close to the positive phase input terminal of the comparator 3 is actually ensured to be lower than the voltage close to the first P-channel fet MP1 or the second P-channel fet MP2 through the voltage division of the voltage dividing circuit 5, so as to limit the current flowing direction and further prevent the current from flowing backward to the input power source, but this method still has a certain risk, in order to further improve the stability of the protection circuit, the voltage dividing circuit 5 also includes a second diode D2 on the branch to make the current flow to the positive phase input terminal of the comparator 3, and when the load power source is prevented from being short-circuited, the positive phase input terminal voltage of the comparator 3 is pulled down during the reverse cut-off recovery time of the parasitic diode inside the second P-channel fet MP2, and at this time, because the comparator 3 outputs a low level, both the first P-channel fet MP1 and the second P-channel fet MP2 are normally turned on, the diode D2 is added to avoid the above problem, and further, in this embodiment, the anode of the second diode D2 is connected to the first P-channel fet MP1 and the second P-channel fet MP2, and the cathode is connected to the voltage divider circuit 5, although the present invention is not limited to this embodiment.
For the unidirectional circuit 6, it includes the first diode D1, the positive pole of the first diode D1 is connected to the inverting input terminal of the comparator 3, and the negative pole of the first diode D1 is connected to the load power source 2. This is sufficient to achieve the function of the unidirectional current conducting circuit 6, but other embodiments of the present invention are possible to achieve the same function.
Based on this, the value range of the voltage Uout of the load power supply 2 in this embodiment can be derived as follows:
first, it is defined that the first diode D1 has a conduction voltage drop Ud1, and the second diode D2 has a conduction voltage drop Ud2, and since the voltage dividing circuit 5 is composed of the second resistor R2 and the third resistor R3 in this embodiment, a relationship between an intermediate voltage Umid between the first P-channel fet MP1 and the second P-channel fet MP2 and a voltage U + at the non-inverting input terminal of the comparator 3 is:
when the load power supply 2 or the circuit connected with the load power supply 2 has an overcurrent short circuit, the voltage Uout of the load power supply 2 is lower than the voltage Uref of the reference voltage source 4, and the values of the voltage U-at the inverting input of the comparator 3 and the intermediate voltage Umid are as follows:
U-＝Uout-Ud1；
Umid＝Uin；
at this time, in order to turn off the two P-channel fets, i.e., make the voltage Uo at the output terminal of the comparator 3 high, the voltage U + at the non-inverting input terminal of the comparator 3 is greater than the voltage U-at the inverting input terminal, so that the first inequality regarding Uout is obtained:
based on this, we define
That is, when Uout<UOLWhen the protection circuit acts and cuts off the power supply of the input power supply 1 to the load power supply 2, when Uout>UOLWhen the protection circuit is normally conducted, the input power supply 1 supplies power to the load power supply 2.
Similarly, when the load power supply 2 or the circuit connected thereto generates an over-voltage pulse, the voltage Uout of the load power supply 2 is higher than the voltage Uref of the reference voltage source 4, and the values of the voltage U-at the inverting input of the comparator 3 and the intermediate voltage Umid are as follows:
Umid＝Uout；
U-＝Uref；
in order to prevent the load power supply 2 or the circuit terminal connected with the load power supply from flowing backward, the input power supply 1 and the protection circuit part are protected from being affected, so that the two P-channel fets still need to be turned off, and thus a second inequality about Uout is obtained:
based on this, we define
That is, when Uout>UOHWhen the protection circuit acts and cuts off the connection between the load power supply 2 and the input power supply 1, the reverse flow is prevented, and when Uout<UOHWhen the protection circuit is normally conducted, the input power supply 1 supplies power to the load power supply 2.
Thus, a protection window of the protection circuit is formed, i.e. when UOL<Uout<UOHWhen the first P-channel fet MP1 and the second P-channel fet MP2 are normally turned on, the voltage Uout of the load power supply is ideally approximately equal to the input power supply Uin, and when U is detectedout>UOHOr Uout<UOLWhen the protection circuit is in use, the first P-channel field effect transistor MP1 and the second P-channel field effect transistor MP2 in the protection circuit are turned off.
In addition, in order to ensure the stable operation of the protection circuit, the protection circuit further includes a first capacitor C1 and a second capacitor C2, wherein one end of the first capacitor C1 is connected to the inverting input terminal of the comparator 3, the other end is grounded, one end of the second capacitor C2 is connected to the non-inverting input terminal of the comparator 3, and the other end is grounded. Therefore, the comparator 3 can work under a stable working condition through the filtering and voltage stabilizing effects of the capacitor.
Correspondingly, the protection circuit further comprises a third capacitor C3 and a fourth capacitor C4, wherein one end of the third capacitor C3 is connected with the input power supply 1, the other end is grounded, one end of the fourth capacitor C4 is connected with the load power supply 2, and the other end is grounded. In this way, the voltage input by the input power supply 1 and the voltage output by the load power supply 2 can be ensured to be stable.
Because the protection circuit mainly acts on abnormal working conditions such as overcurrent or overvoltage, the internal components of the protection circuit are prevented from being damaged, and the protection circuit is also one of the key points for realizing the cyclic utilization of the protection circuit, the protection circuit further comprises a fourth resistor R4 and a fifth resistor R5, wherein one end of the fourth resistor R4 is connected to the reference voltage source 4, the other end of the fourth resistor R4 is connected to the inverted input end of the comparator 3, one end of the fifth resistor R5 is connected to the input power supply 1, and the other end of the fifth resistor R5 is. Thus, when the protection circuit is electrified with large current or applies large voltage, the current can be limited, and the current can be discharged through the fourth resistor R4 and the fifth resistor R5, so that the internal components of the protection circuit are prevented from being damaged.
It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art.
The above-listed detailed description is only a specific description of a possible embodiment of the present invention, and they are not intended to limit the scope of the present invention, and equivalent embodiments or modifications made without departing from the technical spirit of the present invention should be included in the scope of the present invention.
Claims (10)
1. A protection circuit is characterized by comprising an input power supply (1), a load power supply (2), a first P-channel field effect transistor (MP1), a second P-channel field effect transistor (MP2), a comparator (3), a reference voltage source (4), a voltage division circuit (5) and a one-way conduction circuit (6),
the input power supply (1) is connected with the drain electrode of the first P-channel field effect transistor (MP1), the load power supply (2) is connected with the drain electrode of the second P-channel field effect transistor (MP2),
the source electrode of the first P-channel field effect transistor (MP1) is connected with the source electrode of the second P-channel field effect transistor (MP2) and then is connected with the non-inverting input end of the comparator (3) through the voltage division circuit (5),
the grid of the first P-channel field effect transistor (MP1) is connected with the grid of the second P-channel field effect transistor (MP2) and then is connected with the output end of the comparator (3),
load power supply (2) with back is connected to reference voltage source (4), connect in the inverting input of comparator (3), on load power supply (2) with the branch that the inverting input of comparator (3) links to each other, be provided with one-way conduction circuit (6), the current direction of one-way conduction circuit (6) is by the inverting input of comparator (3), points to load power supply (2).
2. The protection circuit according to claim 1, further comprising a first resistor (R1), wherein the first resistor (R1) is connected to the input power supply (1) at one end and to the output terminal of the comparator (3) at the other end.
3. The protection circuit of claim 2, wherein the first resistor (R1) is a pull-up resistor for increasing a high level value when the output of the comparator (3) is high, thereby increasing the ability to drive the first P-channel fet (MP1) and the second P-channel fet (MP 2).
4. The protection circuit according to claim 1, wherein the voltage divider circuit (5) comprises a second resistor (R2) and a third resistor (R3), the second resistor (R2) is connected in series between the source of the first P-channel fet (MP1), the source of the second P-channel fet (MP2) and the non-inverting input terminal of the comparator (3), and one end of the third resistor (R3) is grounded while the other end is connected to the non-inverting input terminal of the comparator (3).
5. The protection circuit according to claim 1, wherein the unidirectional circuit (6) comprises a first diode (D1), an anode of the first diode (D1) is connected to the inverting input terminal of the comparator (3), and a cathode of the first diode (D1) is connected to the load power supply (2).
6. The protection circuit according to claim 1, further comprising a second diode (D2), wherein the second diode (D2) is connected in series with the branch of the voltage divider circuit (5) for flowing current to the non-inverting input of the comparator (3).
7. The protection circuit according to claim 1, further comprising a first capacitor (C1) and a second capacitor (C2), wherein one end of the first capacitor (C1) is connected to the inverting input terminal of the comparator (3) and the other end is connected to ground, and wherein one end of the second capacitor (C2) is connected to the non-inverting input terminal of the comparator (3) and the other end is connected to ground.
8. The protection circuit according to claim 1, further comprising a third capacitor (C3) and a fourth capacitor (C4), wherein one end of the third capacitor (C3) is connected to the input power source (1) and the other end is connected to ground, and one end of the fourth capacitor (C4) is connected to the load power source (2) and the other end is connected to ground.
9. The protection circuit according to claim 1, further comprising a fourth resistor (R4) and a fifth resistor (R5), wherein one end of the fourth resistor (R4) is connected to the reference voltage source (4), the other end is connected to the inverting input terminal of the comparator (3), and one end of the fifth resistor (R5) is connected to the input power source (1), and the other end is grounded.
10. A circuit protection system, characterized in that the circuit protection system comprises the protection circuit of any one of claims 1 to 9 and a management module, the management module is electrically connected to the first P-channel fet (MP1) for controlling the first P-channel fet (MP1) to turn on and off.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011282505.3A CN112366652A (en) | 2020-11-17 | 2020-11-17 | Protection circuit and circuit protection system |
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| CN202011282505.3A CN112366652A (en) | 2020-11-17 | 2020-11-17 | Protection circuit and circuit protection system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117117809A (en) * | 2023-10-23 | 2023-11-24 | 荣湃半导体（上海）有限公司 | Protection circuit and equipment |
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| US20150280606A1 (en) * | 2014-03-31 | 2015-10-01 | Renesas Electronics Corporation | Semiconductor Device Which Generates a DC Power Supply from an AC Power Supply |
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|---|---|---|---|---|
| US20020039034A1 (en) * | 2000-09-29 | 2002-04-04 | Yoshimi Kohda | FET-OR circuit and power supply circuit using the same |
| US20150280606A1 (en) * | 2014-03-31 | 2015-10-01 | Renesas Electronics Corporation | Semiconductor Device Which Generates a DC Power Supply from an AC Power Supply |
| CN104052017A (en) * | 2014-06-12 | 2014-09-17 | 四川联友电讯技术有限公司 | Short message gateway allowing short-circuit protection |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117117809A (en) * | 2023-10-23 | 2023-11-24 | 荣湃半导体（上海）有限公司 | Protection circuit and equipment |
| CN117117809B (en) * | 2023-10-23 | 2024-01-19 | 荣湃半导体（上海）有限公司 | Protection circuit and equipment |
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