CN112365830A - Signal driving board - Google Patents
Signal driving board Download PDFInfo
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- CN112365830A CN112365830A CN202011270094.6A CN202011270094A CN112365830A CN 112365830 A CN112365830 A CN 112365830A CN 202011270094 A CN202011270094 A CN 202011270094A CN 112365830 A CN112365830 A CN 112365830A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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Abstract
The present invention provides a signal driving board, including: a main board and a sub-board; the output end of the main board is electrically connected with the daughter board; the main board is used for receiving image signals and outputting the image signals to the daughter board or the display panel to be tested in a V-BY-ONE signal or EDP signal mode; the daughter board is used for receiving the V-BY-ONE signal, converting the V-BY-ONE signal into an LVDS signal or an MIPI signal and outputting the LVDS signal or the MIPI signal to a display panel to be tested. The signal driving board provided by the embodiment of the invention can realize the test of various types of display panels to be tested, thereby improving the test efficiency of the display panels and reducing the production cost.
Description
Technical Field
The invention relates to the field of display driving, in particular to a signal driving board.
Background
With the continuous pursuit of display technology, the display technology has been changed from black and white to color, from CRT to RCA to plasma, to the present liquid crystal display, OLED, etc., from ultra-low resolution to 720P to 4K to the present 8K display panel. The display panel is ubiquitous in the life of people, and meanwhile, the life of people is enriched.
The development of display panels is being followed by the development of processes, production techniques, and display test techniques. At present, with the increasing demand of consumers, higher and higher requirements are also put forward on the capacity and the technology of manufacturers of display panels. The technical fields of productivity and display panels are two important indexes of manufacturers. The capacity cannot keep up with the requirements of customers, the benefits of enterprises are influenced, and the technology is the foundation of the survival of the enterprises. Display panel manufacturers currently have two very common requirements. First, more display panels can be tested at once on the production run. Second, burn-in testing of display panels also requires that more products be tested in a single burn-in test for data analysis and production.
The manufacturer providing the display panel testing equipment also needs to meet the requirements of display panel production and aging test. At present, a display panel signal tester can only generally test a display panel of one signal type, and the testing efficiency is influenced.
Disclosure of Invention
The signal driving board provided by the embodiment of the invention can realize the test of various types of display panels to be tested, thereby improving the test efficiency of the display panels and reducing the production cost.
The present invention provides a signal driving board, including: a main board and a sub-board;
the output end of the main board is electrically connected with the daughter board;
the main board is used for receiving image signals and outputting the image signals to the daughter board or the display panel to be tested in a V-BY-ONE signal or EDP signal mode;
the daughter board is used for receiving the V-BY-ONE signal, converting the V-BY-ONE signal into an LVDS signal or an MIPI signal and outputting the LVDS signal or the MIPI signal to a display panel to be tested.
Optionally, the daughter board includes a first signal conversion module, and an input end of the first signal conversion module is electrically connected to an output end of the motherboard;
the first signal conversion module is used for receiving the V-BY-ONE signal output BY the mainboard, converting the V-BY-ONE signal into an LVDS signal and outputting the LVDS signal to a display panel to be tested.
Optionally, the daughter board includes a second signal conversion module and a third signal conversion module;
the input end of the second signal conversion module is electrically connected with the output end of the mainboard, and the output end of the second signal conversion module is electrically connected with the input end of the third signal conversion module;
the second signal conversion module is used for receiving the V-BY-ONE signal output BY the mainboard and converting the V-BY-ONE signal into an RGB signal;
and the third signal conversion module is used for converting the RGB signals into MIPI signals and then outputting the MIPI signals to the display panel to be tested.
Optionally, the daughter board further includes an information reading module, an input end of the information reading module is electrically connected to an output end of the second signal conversion module, and a first output end of the information reading module is electrically connected to the third signal conversion module;
the information reading module is used for reading an instruction signal sent by the mainboard and outputting the instruction signal to the display panel to be tested through the third signal conversion module.
Optionally, the second output end of the information reading module is electrically connected to the feedback input end of the motherboard;
the information reading module is further used for obtaining feedback information of the display panel to be tested through the third signal conversion module and sending the feedback information to the mainboard.
Optionally, the motherboard includes an FPGA chip;
the FPGA chip comprises: the device comprises a signal processing module and a signal transmission module;
the signal processing module is connected with the signal transmission module and used for processing the image signal and outputting the processed image signal to the signal transmission module in a V-BY-ONE signal or EDP signal mode;
the signal transmission module is used for outputting a V-BY-ONE signal or an EDP signal.
Optionally, the motherboard includes a first DP interface, and the first DP interface is electrically connected to the signal output module;
the daughter board comprises a second DP interface, and the first DP interface and the second DP interface are electrically connected through a DP line; and the daughter board receives the V-BY-ONE signal output BY the mainboard through the second DP interface.
Optionally, the signal transmission module includes eight pairs of SerDes interfaces, and the SerDes interfaces are configured to receive the V-BY-ONE signal or the EDP signal output BY the signal processing module.
Optionally, the motherboard further includes an expansion module;
the input end of the expansion module is electrically connected with the signal output module of the FPGA chip, and the output end of the expansion module is electrically connected with the first DP interface;
the expansion module is used for converting each path of V-BY-ONE signal output BY the signal output module into at least two paths of same V-BY-ONE signals.
Optionally, the expansion module is a distributor.
According to the signal driving board provided BY the embodiment of the invention, the image signal received BY the main board is converted into the V-BY-ONE signal or the EDP signal, the main board is electrically connected with the daughter board, and the daughter board receives the V-BY-ONE signal output BY the main board and converts the V-BY-ONE signal into the LVDS signal or the MIPI signal. The signal driving board can directly input output LVDS signals, MIPI signals or EDP signals into a display panel to be tested which can receive corresponding signals. The signal driving board provided by the embodiment of the invention can output LVDS signals, MIPI signals or EDP signals through the main board and the sub board, and the test of various display panels to be tested can be realized without replacing the signal driving board, so that the test efficiency of the display panels is improved, and the production cost is reduced.
Drawings
Fig. 1 is a signal driving board according to an embodiment of the present invention;
fig. 2 is another signal driving board provided by an embodiment of the present invention;
fig. 3 is a diagram illustrating a signal driving board according to another embodiment of the present invention;
fig. 4 is a diagram illustrating a further signal driving board according to an embodiment of the present invention.
Detailed Description
The embodiments of the present invention will be described in further detail with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of and not restrictive on the broad invention. It should be further noted that, for convenience of description, only some structures, not all structures, relating to the embodiments of the present invention are shown in the drawings.
Fig. 1 is a signal driving board according to an embodiment of the present invention, and referring to fig. 1, a signal driving board 100 according to an embodiment of the present invention includes: a main board 110 and a sub board 120; the output terminal of the main board 110 is electrically connected with the sub-board 120; the main board 110 is configured to receive an image signal and output the image signal to the sub board 120 or the display panel to be tested in the form of a V-BY-ONE signal or an EDP signal; the daughter board 120 is configured to receive the V-BY-ONE signal, convert the V-BY-ONE signal into an LVDS signal or an MIPI signal, and output the LVDS signal or the MIPI signal to the display panel to be tested.
Illustratively, the interface of the smart watch and the mobile phone supports the input of MIPI signals, the interface of the computer notebook supports the input of EDP signals, the interface of the control screen in the automobile supports the input of LVDS signals, and different physical interfaces support different signal inputs. The main board 110 in this embodiment receives the image signal, converts the image signal into a V-BY-ONE signal, and can directly transmit the V-BY-ONE signal to the display panel to be tested, which can receive the V-BY-ONE signal. Or the daughter board 120 may receive the V-BY-ONE signal and convert the received V-BY-ONE signal into an LVDS signal or an MIPI signal. In addition, the main board 110 may also convert the received image signal into an EDP signal, and may directly transmit the EDP signal to a display panel to be tested that can receive the EDP signal.
According to the signal driving board provided BY the embodiment of the invention, the image signal received BY the main board is converted into the V-BY-ONE signal or the EDP signal, the main board is electrically connected with the daughter board, and the daughter board receives the V-BY-ONE signal output BY the main board and converts the V-BY-ONE signal into the LVDS signal or the MIPI signal. The signal driving board can directly input the output V-BY-ONE signal, LVDS signal, MIPI signal or EDP signal into a display panel to be tested which can receive corresponding signals. The signal driving board provided BY the embodiment of the invention can output the V-BY-ONE signal, the LVDS signal, the MIPI signal or the EDP signal through the main board and the sub board, and the test of various display panels to be tested can be realized without replacing the signal driving board, so that the test efficiency of the display panels is improved, and the production cost is reduced.
Optionally, fig. 2 is another signal driving board provided in an embodiment of the present invention, referring to fig. 2, the daughter board 120 includes a first signal conversion module 121, and an input end of the first signal conversion module 121 is electrically connected to an output end of the motherboard 110; the first signal conversion module 121 is configured to receive the V-BY-ONE signal output BY the main board 110, convert the V-BY-ONE signal into an LVDS signal, and output the LVDS signal to the display panel to be tested.
Further, the first signal conversion module 121 may convert the two paths of V-BY-ONE signals into a dual-channel 12-bit LVDS signal. The first signal conversion module can be a THV216 chip, in practical application, the THV216 chip has high response speed, can quickly convert the V-BY-ONE signal into an LVDS signal, and has low cost on the THV216 chip, so that the cost of the signal driving board provided BY the embodiment of the invention can be reduced.
Optionally, with continued reference to fig. 2, the sub-board 120 further includes a second signal conversion module 122 and a third signal conversion module 123; the input end of the second signal conversion module 122 is electrically connected with the output end of the main board 110, and the output end is electrically connected with the input end of the third signal conversion module 123; the second signal conversion module 122 is configured to receive the V-BY-ONE signal output BY the motherboard 110, and convert the V-BY-ONE signal into an RGB signal; the third signal conversion module 123 is configured to convert the RGB signals into MIPI signals and output the MIPI signals to the display panel to be tested.
Specifically, the V-BY-ONE signal is converted into an MIPI signal, two paths of V-BY-ONE signals need to be converted into two sets of 30-bit RGB signals through the second signal conversion module 122, then the two sets of 30-bit RGB signals are converted into an MIPI signal through the third signal conversion module 123, and the converted MIPI signal is input to a display panel to be tested, which can receive the MIPI signal, so that the test of the display panel to be tested can be realized. For example, the second signal conversion module 122 may be a THC218 chip, and the third signal conversion module 123 may be an SSD2832 chip, in practical applications, the THV218 chip and the SSD2832 chip have fast response speed, and can fast convert the V-BY-ONE signal into the MIPI signal, thereby improving the test efficiency.
Optionally, fig. 3 is another signal driving board provided in an embodiment of the present invention, referring to fig. 3, the daughter board 120 further includes an information reading module 124, an input end of the information reading module 124 is electrically connected to an output end of the second signal conversion module 122, and a first output end is electrically connected to the third signal conversion module 123; the information reading module 124 is configured to read an instruction signal sent by the main board 110 and output the instruction signal to the display panel to be tested through the third signal conversion module 123.
Further, in the common mode, the instruction signal sent by the main board 110 is transmitted to the information reading module 124 through the second signal conversion module 122, and the information reading module 124 transmits the instruction signal to the display panel to be tested through the third signal conversion module 123. Illustratively, the information reading module 124 may be a CPLD chip.
Optionally, with continued reference to fig. 3, a second output terminal of the information reading module 124 is electrically connected to a feedback input terminal of the motherboard 110; the information reading module 124 is further configured to obtain feedback information of the display panel to be tested through the third signal conversion module 123, and send the feedback information to the main board 110.
Further, after the information reading module 124 transmits the instruction signal to the display panel to be tested, the feedback signal of the display panel to be tested after receiving the read instruction signal is transmitted to the information reading module 124 through the third signal conversion module 123, the information reading module 124 transmits the feedback signal to the main board 110, and the main board 110 processes the feedback signal.
Optionally, fig. 4 is a further signal driving board according to an embodiment of the present invention, and referring to fig. 4, the main board 110 includes an FPGA chip 111; the FPGA chip 111 includes: a signal processing module 10 and a signal transmission module 20; the signal processing module 10 is connected to the signal transmission module 20, and is configured to process the image signal and output the processed image signal to the signal transmission module 20 in the form of a V-BY-ONE signal or an EDP signal; the signal transmission module 20 is configured to output a V-BY-ONE signal or an EDP signal.
Furthermore, the FPGA chip 111 can support the output of multiple signal types, and compared with other processing chips, the FPGA chip 111 has the characteristics of fast transmission rate, strong processing capability and the like. The signal processing module 10 can be controlled to convert the image signal into the V-BY-ONE signal or the EDP signal BY switching the program in the signal processing module 10. The signal transmission module 20 is configured to receive and transmit the V-BY-ONE signal or the EDP signal in the signal processing module 10.
Optionally, with continued reference to fig. 4, the main board 110 includes a first DP interface 112, and the first DP interface 112 is electrically connected to the signal output module 20; the sub board 120 includes a second DP interface 125, and the first DP interface 112 and the second DP interface 125 are electrically connected through a DP line; the sub board 120 receives the V-BY-ONE signal output from the main board 110 through the second DP interface 125.
Specifically, the first DP interface 112 on the main board 110 and the second DP interface 125 on the sub board 120 are electrically connected through a DP line, so as to transmit the V-BY-ONE signal on the main board 110 to the first signal conversion module 121 or the second signal conversion module 122 on the sub board 120. The DP wire is made of a twisted copper pair cable, so that the manufacturing cost is low, and in addition, the DP wire has the characteristics of high transmission speed, no loss and the like when transmitting V-BY-ONE signals, so that long-distance transmission can be performed through the DP wire.
Optionally, the signal transmission module includes a SerDes interface, and the SerDes interface is configured to receive the V-BY-ONE signal or the EDP signal output BY the signal processing module.
Specifically, the V-by-One signal realizes a high speed of 3.75Gbit/s for each pair of conductors through a SerDes interface and a clock recovery technology, and reduces the number of conductors, thereby reducing the total cost including cables and connectors. This solves the skew problem and reduces electromagnetic interference and power consumption. The V-BY-ONE is transmitted through the SerDes, and the current mainstream FPGA can output a stable V-BY-ONE signal as long as the SerDes pin is arranged. The pair of SerDes interfaces receives ONE path of V-BY-ONE signal, the two paths of V-BY-ONE signals can output a set of LVDS signals or MIPI signals, and illustratively, the signal transmission module includes eight pairs or more than eight pairs of SerDes interfaces, so that the signal driving board can detect at least four display panels simultaneously.
Optionally, with continued reference to fig. 4, the motherboard 110 further includes an expansion module 113; the input end of the expansion module 113 is electrically connected with the signal output module 20 of the FPGA chip 111, and the output end is electrically connected with the first DP interface 112; the expansion module 113 is configured to convert each of the V-BY-ONE signals output BY the signal output module 20 into at least two identical V-BY-ONE signals.
Specifically, the expansion module 113 mainly plays a role of copying the V-BY-ONE signal. For example, when the signal output module 20 in the motherboard 110 includes eight pairs of SerDes interfaces, the V-BY-ONE signal may transmit 8V-BY-ONE signals through the eight pairs of SerDes interfaces, the 8V-BY-ONE signals may be converted into two groups of 8V-BY-ONE signals through the expansion module 113, that is, 16V-BY-ONE signals, and the signal driving board 100 may be used to test 4 display panels and further to test 8 display panels. Further, the expansion module 113 converts ONE path of V-BY-ONE signal into how many paths of V-BY-ONE signals can be set according to actual requirements. Compared with the traditional signal driving board, the signal driving board provided BY the embodiment of the invention can flexibly control the number of the V-BY-ONE signals according to the requirements of clients, and the test requirements of a plurality of display panels are realized without increasing the volume of the signal driving board.
Optionally, the expansion module is a distributor.
Illustratively, the distributor can be an NB7L14MING chip, the NB7L14MING chip has the characteristics of high response speed, low cost and the like, and the application of the NB7L14MING chip to the signal driving board in the embodiment of the invention can improve the operation rate of the signal driving board and reduce the cost of the signal driving board.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will appreciate that the embodiments of the present invention are not limited to the specific embodiments described herein, and that various obvious changes, adaptations, and substitutions are possible, without departing from the scope of the embodiments of the present invention. Therefore, although the embodiments of the present invention have been described in more detail through the above embodiments, the embodiments of the present invention are not limited to the above embodiments, and many other equivalent embodiments may be included without departing from the concept of the embodiments of the present invention, and the scope of the embodiments of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A signal driving board, comprising: a main board and a sub-board;
the output end of the main board is electrically connected with the daughter board;
the main board is used for receiving image signals and outputting the image signals to the daughter board or the display panel to be tested in a V-BY-ONE signal or EDP signal mode;
the daughter board is used for receiving the V-BY-ONE signal, converting the V-BY-ONE signal into an LVDS signal or an MIPI signal and outputting the LVDS signal or the MIPI signal to a display panel to be tested.
2. The signal driving board according to claim 1, wherein the daughter board comprises a first signal conversion module, an input terminal of the first signal conversion module being electrically connected to an output terminal of the main board;
the first signal conversion module is used for receiving the V-BY-ONE signal output BY the mainboard, converting the V-BY-ONE signal into an LVDS signal and outputting the LVDS signal to a display panel to be tested.
3. The signal driving board according to claim 1, wherein the sub-board includes a second signal conversion module and a third signal conversion module;
the input end of the second signal conversion module is electrically connected with the output end of the mainboard, and the output end of the second signal conversion module is electrically connected with the input end of the third signal conversion module;
the second signal conversion module is used for receiving the V-BY-ONE signal output BY the mainboard and converting the V-BY-ONE signal into an RGB signal;
and the third signal conversion module is used for converting the RGB signals into MIPI signals and then outputting the MIPI signals to the display panel to be tested.
4. The signal driving board according to claim 3, wherein the daughter board further comprises an information reading module, an input terminal of the information reading module is electrically connected to an output terminal of the second signal conversion module, and a first output terminal is electrically connected to the third signal conversion module;
the information reading module is used for reading an instruction signal sent by the mainboard and outputting the instruction signal to the display panel to be tested through the third signal conversion module.
5. The signal driving board according to claim 4, wherein the second output terminal of the information reading module is electrically connected to the feedback input terminal of the main board;
the information reading module is further used for obtaining feedback information of the display panel to be tested through the third signal conversion module and sending the feedback information to the mainboard.
6. The signal driving board according to claim 1, wherein the motherboard comprises an FPGA chip;
the FPGA chip comprises: the device comprises a signal processing module and a signal transmission module;
the signal processing module is connected with the signal transmission module and used for processing the image signal and outputting the processed image signal to the signal transmission module in a V-BY-ONE signal or EDP signal mode;
the signal transmission module is used for outputting a V-BY-ONE signal or an EDP signal.
7. The signal driving board according to claim 6,
the main board comprises a first DP interface which is electrically connected with the signal output module;
the daughter board comprises a second DP interface, and the first DP interface and the second DP interface are electrically connected through a DP line; and the daughter board receives the V-BY-ONE signal output BY the mainboard through the second DP interface.
8. The signal driving board according to claim 6, wherein the signal transmission module comprises a SerDes interface for receiving the V-BY-ONE signal or EDP signal output BY the signal processing module.
9. The signal driving board according to claim 7, wherein the motherboard further comprises an expansion module;
the input end of the expansion module is electrically connected with the signal output module of the FPGA chip, and the output end of the expansion module is electrically connected with the first DP interface;
the expansion module is used for converting each path of V-BY-ONE signal output BY the signal output module into at least two paths of same V-BY-ONE signals.
10. The signal driving board according to claim 9, wherein:
the expansion module is a distributor.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011270094.6A CN112365830B (en) | 2020-11-13 | 2020-11-13 | Signal driving board |
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| CN202011270094.6A CN112365830B (en) | 2020-11-13 | 2020-11-13 | Signal driving board |
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| CN112365830B CN112365830B (en) | 2022-11-15 |
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| WO2023226118A1 (en) * | 2022-05-23 | 2023-11-30 | 上海闻泰信息技术有限公司 | Display module and computer device |
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