CN112242177A

CN112242177A - Memory testing method and device, computer readable storage medium and electronic equipment

Info

Publication number: CN112242177A
Application number: CN201910640379.5A
Authority: CN
Inventors: 周奕
Original assignee: Beijing Horizon Robotics Technology Research and Development Co Ltd
Current assignee: Beijing Horizon Robotics Technology Research and Development Co Ltd
Priority date: 2019-07-16
Filing date: 2019-07-16
Publication date: 2021-01-19

Abstract

The embodiment of the disclosure discloses a memory testing method, a memory testing device, a computer readable storage medium and an electronic device, wherein the method comprises the following steps: acquiring functional data; determining to-be-tested data and reference data based on the type of the functional data; determining a comparison result of the data to be tested and the reference data; based on the comparison result, a test result for the memory is determined. The embodiment of the disclosure effectively utilizes the functional data, tests the memory in real time, and improves the efficiency of testing the memory.

Description

Memory testing method and device, computer readable storage medium and electronic equipment

Technical Field

The present disclosure relates to the field of computer technologies, and in particular, to a method and an apparatus for testing a memory, a computer-readable storage medium, and an electronic device.

Background

In various electronic circuit designs (e.g., system on a chip design) at present, memories (e.g., FIFO (First in First out) memories) are used in large quantities, and errors may occur in the memories during operation, such as a read pointer, a write pointer, and the like, so as to cause data read/write errors. Therefore, there is a need for efficiently testing memory while the memory is running.

Disclosure of Invention

The embodiment of the disclosure provides a memory testing method and device, a computer readable storage medium and electronic equipment.

An embodiment of the present disclosure provides a memory test method, including: acquiring functional data; determining to-be-tested data and reference data based on the type of the functional data; determining a comparison result of the data to be tested and the reference data; based on the comparison result, a test result for the memory is determined.

According to another aspect of the embodiments of the present disclosure, there is provided a memory test apparatus including: the acquisition module is used for acquiring functional data; the first determining module is used for determining the data to be tested and the reference data based on the type of the functional data; the second determination module is used for determining the comparison result of the data to be tested and the reference data; and the third determination module is used for determining the test result of the memory based on the comparison result.

According to another aspect of the embodiments of the present disclosure, there is provided a computer-readable storage medium storing a computer program for executing the above-described memory testing method.

According to another aspect of the embodiments of the present disclosure, there is provided an electronic apparatus including: a processor; a memory for storing processor-executable instructions; and the processor is used for reading the executable instructions from the memory and executing the instructions to realize the memory test method.

Based on the memory testing method, the memory testing device, the computer readable storage medium and the electronic equipment provided by the embodiments of the disclosure, the data to be tested and the reference data are determined based on the type of the functional data of the memory, the data to be tested and the reference data are compared, and the testing result of the memory is determined according to the comparison result, so that the functional data is effectively utilized, the memory is tested in real time, the efficiency of testing the memory is improved, and the memory can be tested more comprehensively due to the various types of the functional data.

The technical solution of the present disclosure is further described in detail by the accompanying drawings and examples.

Drawings

The above and other objects, features and advantages of the present disclosure will become more apparent by describing in more detail embodiments of the present disclosure with reference to the attached drawings. The accompanying drawings are included to provide a further understanding of the embodiments of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the principles of the disclosure and not to limit the disclosure. In the drawings, like reference numbers generally represent like parts or steps.

Fig. 1 is a block diagram of an integrated circuit to which the present disclosure is applicable.

Fig. 2 is a flowchart illustrating a memory testing method according to an exemplary embodiment of the disclosure.

Fig. 3A is a schematic flowchart of a memory testing method according to another exemplary embodiment of the disclosure.

Fig. 3B is a block diagram of an exemplary circuit for performing the method of fig. 3A according to an exemplary embodiment of the present disclosure.

Fig. 4A is a flowchart illustrating a memory testing method according to another exemplary embodiment of the disclosure.

Fig. 4B is a block diagram of an exemplary circuit for performing the method corresponding to fig. 4A according to an exemplary embodiment of the present disclosure.

Fig. 5A is a flowchart illustrating a memory testing method according to another exemplary embodiment of the disclosure.

Fig. 5B is a block diagram of an exemplary circuit for performing the method of fig. 5A according to an exemplary embodiment of the present disclosure.

Fig. 6 is a schematic structural diagram of a data processing apparatus according to an exemplary embodiment of the present disclosure.

Fig. 7 is a schematic structural diagram of a data processing apparatus according to another exemplary embodiment of the present disclosure.

Fig. 8 is a block diagram of an electronic device provided in an exemplary embodiment of the present disclosure.

Detailed Description

Hereinafter, example embodiments according to the present disclosure will be described in detail with reference to the accompanying drawings. It is to be understood that the described embodiments are merely a subset of the embodiments of the present disclosure and not all embodiments of the present disclosure, with the understanding that the present disclosure is not limited to the example embodiments described herein.

It should be noted that: the relative arrangement of the components and steps, the numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.

It will be understood by those of skill in the art that the terms "first," "second," and the like in the embodiments of the present disclosure are used merely to distinguish one element from another, and are not intended to imply any particular technical meaning, nor is the necessary logical order between them.

It is also understood that in embodiments of the present disclosure, "a plurality" may refer to two or more and "at least one" may refer to one, two or more.

It is also to be understood that any reference to any component, data, or structure in the embodiments of the disclosure, may be generally understood as one or more, unless explicitly defined otherwise or stated otherwise.

In addition, the term "and/or" in the present disclosure is only one kind of association relationship describing an associated object, and means that three kinds of relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" in the present disclosure generally indicates that the former and latter associated objects are in an "or" relationship.

It should also be understood that the description of the various embodiments of the present disclosure emphasizes the differences between the various embodiments, and the same or similar parts may be referred to each other, so that the descriptions thereof are omitted for brevity.

Meanwhile, it should be understood that the sizes of the respective portions shown in the drawings are not drawn in an actual proportional relationship for the convenience of description.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.

The disclosed embodiments may be applied to electronic devices such as terminal devices, computer systems, servers, etc., which are operational with numerous other general purpose or special purpose computing system environments or configurations. Examples of well known terminal devices, computing systems, environments, and/or configurations that may be suitable for use with electronic devices, such as terminal devices, computer systems, servers, and the like, include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, hand-held or laptop devices, microprocessor-based systems, set top boxes, programmable consumer electronics, network pcs, minicomputer systems, mainframe computer systems, distributed cloud computing environments that include any of the above systems, and the like.

Electronic devices such as terminal devices, computer systems, servers, etc. may be described in the general context of computer system-executable instructions, such as program modules, being executed by a computer system. Generally, program modules may include routines, programs, objects, components, logic, data structures, etc. that perform particular tasks or implement particular abstract data types. The computer system/server may be practiced in distributed cloud computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed cloud computing environment, program modules may be located in both local and remote computer system storage media including memory storage devices.

Summary of the application

In various electronic circuit designs (e.g., system on a chip design) at present, memories (e.g., FIFO (First in First out) memories) are used in large quantities, and errors may occur in the memories during operation, such as a read pointer, a write pointer, and the like, so as to cause data read/write errors. Therefore, there is a need for efficiently testing memory while the memory is running. Generally, a memory can be tested in a software mode, but the software testing mode needs to occupy resources of a processor, is long in testing time, cannot achieve real-time performance of testing, is few in testing types, and cannot comprehensively test the memory.

Exemplary System

FIG. 1 shows an integrated circuit structure diagram 100 to which embodiments of the disclosure may be applied.

As shown in FIG. 1(a), an integrated circuit structure diagram 100 may include a memory 101 and a test module 102.

The memory 101 may be various memories such as a FIFO memory.

The test module 102 may be used to test the memory state of the memory. The test module 102 may write data into or read data from the memory, and may also obtain functional data (e.g., a data read pointer, a data write pointer, an empty/full flag, etc.) from the memory, and perform a test on the memory based on the functional data to obtain a test result (e.g., output a warning message).

It should be noted that the memory 101 and the test module 102 may be independent electronic devices respectively, or may be integrated into one electronic device.

As shown in fig. 1(b), which shows an exemplary circuit structure diagram included in the test module 102, the test module 102 may include a stored data test sub-module 1021, a data read pointer test module 1022, a data write pointer test sub-module 1023, an empty and full flag test sub-module 1024, and an encoding verification sub-module 1025. The stored data testing submodule 1021 can select the testing read pointer under the condition that the testing data mode is started, and read the data in the memory 101 by using the testing read pointer to perform testing. The data read pointer testing module 1022 may perform a copy operation on the data read pointer to obtain a data read pointer copy, and then compare the data read pointer with the data read pointer copy by using the comparator. The data write pointer test sub-module 1023 may copy the data write pointer to obtain a data write pointer copy, and then compare the data read pointer with the data read pointer copy by using the comparator. The empty/full flag testing sub-module 1024 may copy the empty/full flag to obtain a copy of the empty/full flag, and then compare the empty/full flag with the copy of the empty/full flag by using a comparator. The code verification sub-module 1025 may encode the data written to the memory using a preset encoding method by which the data read from the memory is verified. Each sub-module can output warning information under the condition that the test result represents that the memory is abnormal.

Exemplary method

Fig. 2 is a flowchart illustrating a memory testing method according to an exemplary embodiment of the disclosure. The present embodiment can be applied to the test module 102 shown in fig. 1, as shown in fig. 2, and includes the following steps:

step 201, functional data is acquired.

In this embodiment, the test module 102 may retrieve the functional data from memory. Wherein the functional data is data used by the memory to perform a specific function. For example, the functional data may include at least one of: a data read pointer, a data write pointer, an empty-full flag, etc.

Step 202, determining the data to be tested and the reference data based on the type of the functional data.

In this embodiment, the testing module 102 may determine the data to be tested and the reference data based on the type of the functional data. The data to be tested can be various data to be tested in the memory at the current time, such as a data write pointer, a data read pointer, data stored at the current time, and the like. The reference data may be data for comparison with the data to be tested, e.g. a copied data write pointer, a copied data read pointer, a copied empty-full flag, etc.

Step 203, determining the comparison result of the data to be tested and the reference data.

In this embodiment, the test module 102 may determine a comparison result of the data to be tested and the reference data. Wherein the comparison result can be used to characterize the data to be tested as being the same as or different from the reference data.

And step 204, determining a test result for the memory based on the comparison result.

In this embodiment, the test module 102 may determine the test result for the memory based on the comparison result.

The test result may include outputting warning information, and the warning information may be used to prompt a user that a data reading error occurs in the memory at the current time.

According to the method provided by the embodiment of the disclosure, the to-be-tested data and the reference data are determined based on the type of the functional data of the memory, the to-be-tested data and the reference data are compared, and the test result of the memory is determined according to the comparison result, so that the functional data is effectively utilized, the memory is tested in real time, the efficiency of testing the memory is improved, and the memory can be tested more comprehensively due to the various types of the functional data.

With further reference to FIG. 3A, a flow diagram of yet another embodiment of a memory testing method is shown. As shown in fig. 3A, based on the embodiment shown in fig. 2, step 202 may include the following steps:

step 20211, in response to the test data mode being on and determining that the functional data is the test read pointer, controls the memory to stop updating the data read pointer.

Specifically, the test data pattern is a state for testing data written to the memory. Typically, the test module 102 may be triggered to turn on the test data mode automatically or manually by a user. Generally, when a memory works normally, a data read pointer in the memory is updated after data is read once, so that the next read data is prepared, and after data is written once, a data write pointer is updated, so that the next write data is prepared. The test read pointer is a pointer for reading data from the memory to perform a test. The test read pointer may be set manually by a user or automatically by the test module 102 (e.g., after writing a datum to memory, the test read pointer is updated, pointing to the address of the most recently written stored datum).

And stopping updating the data read pointer of the memory in the time period of starting the test data mode. I.e. the time period during which the test data mode is on, data is no longer read continuously from the memory according to the data read pointer, but the test is performed by reading data from the memory according to the test read pointer.

At step 20212, the data written to the memory is read as the data to be tested based on the test read pointer.

Step 20213, obtain the original data corresponding to the data to be tested as the reference data.

Wherein the original data is data before being written into the memory. For example, data a is original data before being written into the memory, and data a is read based on the test read pointer after being written into the memory, and is to-be-tested data corresponding to data a.

As shown in fig. 3B, the stored data testing submodule 1021 can execute the embodiment, and the stored data testing submodule 1021 includes a selector, and when the test data mode is turned on, the selector selects the test data read pointer to read data from the memory 101 for testing.

In some optional implementations, based on the above steps 20211 to 20213, the above step 204 may include:

and if the comparison result shows that the test data is different from the reference data, determining the test result of the memory as the output first warning information. The first warning information is used for indicating that the data written into the memory is different from the read data, namely the memory has an error, so that the stored data is changed. The form of the first warning message may include, but is not limited to, at least one of: text, sound, image, etc.

In some alternative implementations, the test module 102 may also control the memory update data read pointer in response to the test data mode being off.

The method provided by the embodiment corresponding to fig. 3A highlights the step of determining the data to be tested based on the test read pointer set in the memory, so that the data in the memory can be read in a targeted manner according to the test read pointer for testing.

With further reference to FIG. 4A, a flow diagram of yet another embodiment of a memory testing method is shown. As shown in fig. 4A, based on the embodiment shown in fig. 2, step 202 may include the following steps:

step 20221, in response to determining the functional data is any of: and determining the functional data as the data to be tested by using the data reading pointer, the data writing pointer and the empty and full mark.

The data reading pointer is used for indicating the address of the read data, the data writing pointer is used for indicating the address of the written data, and the empty and full mark is used for indicating that the memory is empty or the memory is full.

At step 20222, the functional data is copied to obtain functional duplicate data, and the functional duplicate data is used as reference data.

In general, the test module may copy the functional data at the time of updating the various functional data described above, so that the functional copy data is the same as the functional data at the time of updating.

As shown in fig. 4B, the data read pointer testing module 1022, the data write pointer testing sub-module 1023, and the empty and full flag testing sub-module 1024 are used for executing the present embodiment. The three sub-modules comprise comparators for comparing the functional data with the functional copy data.

In some optional implementations, based on the above steps 20221 to 20222, the above step 204 may include:

first, functional data and functional replica data are input to a functional data comparator. The data comparator can be hardware or software, and when the hardware is adopted, the data comparator does not need to participate in a processor, so that the data comparison speed can be increased, and the efficiency of testing the memory is improved.

Then, in the target period, a comparison result between the functional data and the functional replica data is determined by the comparator. The target cycle may be a clock cycle corresponding to a current data read operation or data write operation. Generally, one data is read out in one read cycle, and another data is read out when the next read cycle comes. The comparison result is used for representing that the functional data is the same as or different from the functional duplicate data.

And finally, if the comparison result shows that the functional data and the functional data copy are different, determining the test result of the memory as outputting second warning information.

The second warning information is used for representing that the current functional data is different from the functional copy data, namely, a memory error occurs, so that the functional data is changed. The form of the second warning message may include, but is not limited to, at least one of: text, sound, image, etc. By implementing the optional implementation mode, whether the memory fails or not can be determined in real time, so that various functional data are changed, and the accuracy and pertinence of testing the memory are improved.

The method provided by the embodiment corresponding to fig. 4A highlights the step of using the functional duplicate data obtained by copying the functional data as the reference data, so that whether the functional data changes can be determined in real time, which is helpful for more comprehensively and accurately testing the memory.

With further reference to FIG. 5A, a flow diagram of yet another embodiment of a memory testing method is shown. As shown in fig. 5A, based on the embodiment shown in fig. 2, step 202 may include the following steps:

step 20231, in response to writing the data to the memory, determines the written data to be functional data.

The written data is data written at the current time.

Step 20232, encode the functional data to obtain a first encoded data as the data to be tested.

In particular, the test module may encode the functional data according to various encoding methods. Such as a parity check algorithm. As an example, the functional data may be encoded using an ECC (Error correction Code) encoding method. The ECC encoding method may determine, among other things, a bit in the data that sent an error and correct the bit.

In step 20233, in response to reading the written data from the memory, the read data is encoded to obtain second encoded data as reference data.

The encoding method in this step is the same as that in step 20232. The read data is read from an address storing the written data.

It should be noted that the above coding method may be implemented by software, or may also be implemented by hardware, for example, an ECC coding circuit is used, the written data is input into the ECC coding circuit, and the first coded data is output, so that verification without participation of a processor of the electronic device is achieved, the speed of data verification is increased, and the efficiency of testing the memory is improved.

As shown in fig. 5B, the code verification sub-module 1025 may be used to perform the present embodiment. The coding verification sub-module 1025 can be hardware, when data is written into the memory 101, the data is sent to the coding verification sub-module 1025 to be coded, when the data is read from the memory 101, the data is sent to the coding verification sub-module 1025 to be verified, and when the verification result shows that the written data is different from the read data, warning information is output.

In some optional implementations, based on the above steps 20231 to 20233, the above step 204 may include:

first, it is determined whether the written data and the read data are the same based on the comparison result of the data to be tested and the reference data.

Then, if different, the test result of the memory is determined to be the output of the third warning message. The third warning information is used to indicate that the written data is different from the read data, that is, the memory has failed, and the data read from a certain memory cell is changed from the data read at the time of writing. The implementation mode which can be selected by the implementation mode can verify whether the read data is the same as the written data when the data is read from the memory, so that the memory can be tested more comprehensively and accurately.

In some optional implementations, the test module 102 determines that the test result of the memory is to output third warning information including a first data bit error warning if it is determined that the number of bits of the written data and the read data is different is less than a preset number of bits. Specifically, as an example, the preset number of bits may be 2, and when the ECC verification method is adopted, a data bit in which an error occurs may be determined.

The test module 102 determines that the test result of the memory is to output third warning information including a second data bit error warning if it is determined that the number of bits of the written data and the read data is different is greater than or equal to a preset number of bits.

In some optional implementations, the test module 102 may output third warning information including an error warning of the first data bit and correct the erroneous data bit if it is determined that the number of bits of the written data and the read data is different from a preset number of bits. As an example, when the above-described ECC encoding method is employed, if the number of bits of the written data and the read data is different from a preset number of bits, the data bits in which errors occur may be corrected; if the different number of bits of the written data and the read data is greater than or equal to the preset number of bits, the error cannot be corrected, and only a second data bit error warning can be output.

The method provided by the embodiment corresponding to fig. 5A highlights the step of encoding the written data and the read data to verify whether the data is erroneous, so that whether the data is stored in the memory is erroneous can be accurately verified, and the accuracy and pertinence of testing the memory are improved.

Exemplary devices

Fig. 6 is a schematic structural diagram of a memory test apparatus according to an exemplary embodiment of the disclosure. The present embodiment can be applied to an electronic device, as shown in fig. 6, the memory testing apparatus includes: an obtaining module 601, configured to obtain functional data; a first determining module 602, configured to determine to-be-tested data and reference data based on a type of the functional data; a second determining module 603, configured to determine a comparison result between the data to be tested and the reference data; a third determining module 604 for determining a test result for the memory based on the comparison result.

In this embodiment, the obtaining module 601 may obtain the function data from the memory. Wherein the functional data is data used by the memory to perform a specific function. For example, the functional data may include at least one of: a data read pointer, a data write pointer, an empty-full flag, etc.

In this embodiment, the first determining module 602 may determine the data to be tested and the reference data based on the type of the functional data. The data to be tested can be various data to be tested in the memory at the current time, such as a data write pointer, a data read pointer, data stored at the current time, and the like. The reference data may be data for comparison with the data to be tested, e.g. a copied data write pointer, a copied data read pointer, a copied empty-full flag, etc.

In this embodiment, the second determining module 603 may determine a comparison result of the data to be tested and the reference data. Wherein the comparison result can be used to characterize the data to be tested as being the same as or different from the reference data.

In this embodiment, the third determining module 604 may determine the test result for the memory based on the comparison result.

Referring to fig. 7, fig. 7 is a schematic structural diagram of a memory test apparatus according to another exemplary embodiment of the present disclosure.

In some optional implementations, the first determining module 602 includes: a first control unit 6021 configured to control the memory to stop updating of the data read pointer in response to the test data mode being turned on and the functional data being determined as the test read pointer; a reading unit 6022 for reading the data written into the memory as the data to be tested based on the test read pointer; the obtaining unit 6023 is configured to obtain original data corresponding to the data to be tested as reference data.

In some optional implementations, the third determining module 604 may include: a first output unit 6041 for determining the test result of the memory as outputting the first warning information if the comparison result indicates that the test data is different from the reference data.

In some optional implementations, the first control unit 6021 is further configured to: and controlling the memory to update the data read pointer in response to the test data mode being turned off.

In some optional implementations, the first determining module 602 includes: a first determining unit 6024 for, in response to determining that the function data is any one of: determining the functional data as to-be-tested data by a data reading pointer, a data writing pointer and an empty/full mark; the copying unit 6025 is configured to copy the functional data to obtain functional copy data, and use the functional copy data as reference data.

In some optional implementations, the third determining module 604 includes: an input unit 6042 for inputting the functional data and the functional replica data to the functional data comparator; a comparison unit 6043 for determining a comparison result between the functional data and the functional replica data by the comparator in the target cycle; a second output unit 6044 for determining the test result of the memory as output second warning information if the comparison result indicates that the functional data and the functional data copy are different.

In some optional implementations, the first determining module 602 includes: a second determination unit 6026 for determining that the written data is functional data in response to writing of the data to the memory; a first encoding unit 6027 that encodes the functional data to obtain first encoded data as data to be tested; a second encoding unit 6028 for encoding the read data in response to reading the written data from the memory to obtain second encoded data as reference data.

In some optional implementations, the third determining module 604 may include: a third determination unit 6045 for determining whether the written data and the read data are the same based on the comparison result of the data to be tested and the reference data; a third output unit 6046 for determining that the test result of the memory is to output the third warning information if different.

In some optional implementations, the third output unit 6046 includes: a first determining sub-module 60461 for determining the test result of the memory as outputting a third warning message including a first data bit error warning if the number of bits of the written data and the read data is different from a preset number of bits; a second determining sub-module 60462 for determining the test result of the memory as outputting a third warning message including a second data bit error warning if the number of bits of the written data and the read data is different from the preset number of bits or more.

In some optional implementations, the first determination submodule 60461 is further configured to: if the number of bits of the written data and the read data is different from each other is less than or equal to a predetermined number of bits, third warning information including a warning of an error of the first data bit is output, and the erroneous data bit is corrected.

According to the memory testing device provided by the embodiment of the disclosure, the to-be-tested data and the reference data are determined based on the type of the functional data of the memory, the to-be-tested data and the reference data are compared, and the testing result of the memory is determined according to the comparison result, so that the functional data is effectively utilized, the memory is tested in real time, the efficiency of testing the memory is improved, and the memory can be tested more comprehensively due to the various types of the functional data.

Exemplary electronic device

Next, an electronic apparatus according to an embodiment of the present disclosure is described with reference to fig. 8. FIG. 8 illustrates a block diagram of an electronic device in accordance with an embodiment of the disclosure.

As shown in fig. 8, an electronic device 800 includes one or more processors 801 and memory 802.

The processor 801 may be a Central Processing Unit (CPU) or other form of processing unit having data processing capabilities and/or instruction execution capabilities, and may control other components in the electronic device 800 to perform desired functions.

Memory 802 may include one or more computer program products that may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory. Volatile memory can include, for example, Random Access Memory (RAM), cache memory (or the like). The non-volatile memory may include, for example, Read Only Memory (ROM), a hard disk, flash memory, and the like. One or more computer program instructions may be stored on a computer-readable storage medium and executed by the processor 701 to implement the memory testing methods of the various embodiments of the disclosure above and/or other desired functions. Various contents such as an input signal, a signal component, a noise component, etc. may also be stored in the computer-readable storage medium.

In one example, the electronic device 800 may further include: an input device 803 and an output device 804, which are interconnected by a bus system and/or other form of connection mechanism (not shown).

For example, the input device 803 may be a mouse, a keyboard, or the like, for inputting data, commands, or the like.

The output device 804 may output various information, including the determined category information, to the outside. The output devices 804 may include, for example, a display, speakers, a printer, and a communication network and its connected remote output devices, among others.

Of course, for simplicity, only some of the components of the electronic device 800 relevant to the present disclosure are shown in fig. 8, omitting components such as buses, input/output interfaces, and the like. In addition, electronic device 800 may include any other suitable components depending on the particular application.

Exemplary computer program product and computer-readable storage Medium

In addition to the above-described methods and apparatus, embodiments of the present disclosure may also be a computer program product comprising computer program instructions that, when executed by a processor, cause the processor to perform the steps in the memory testing method according to various embodiments of the present disclosure described in the "exemplary methods" section above of this specification.

The computer program product may write program code for carrying out operations for embodiments of the present disclosure in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server.

Furthermore, embodiments of the present disclosure may also be a computer-readable storage medium having stored thereon computer program instructions that, when executed by a processor, cause the processor to perform the steps in the memory testing method according to various embodiments of the present disclosure described in the "exemplary methods" section above of this specification.

The computer-readable storage medium may take any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may include, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

The foregoing describes the general principles of the present disclosure in conjunction with specific embodiments, however, it is noted that the advantages, effects, etc. mentioned in the present disclosure are merely examples and are not limiting, and they should not be considered essential to the various embodiments of the present disclosure. Furthermore, the foregoing disclosure of specific details is for the purpose of illustration and description and is not intended to be limiting, since the disclosure is not intended to be limited to the specific details so described.

In the present specification, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts in the embodiments are referred to each other. For the system embodiment, since it basically corresponds to the method embodiment, the description is relatively simple, and for the relevant points, reference may be made to the partial description of the method embodiment.

The block diagrams of devices, apparatuses, systems referred to in this disclosure are only given as illustrative examples and are not intended to require or imply that the connections, arrangements, configurations, etc. must be made in the manner shown in the block diagrams. These devices, apparatuses, devices, systems may be connected, arranged, configured in any manner, as will be appreciated by those skilled in the art. Words such as "including," "comprising," "having," and the like are open-ended words that mean "including, but not limited to," and are used interchangeably therewith. The words "or" and "as used herein mean, and are used interchangeably with, the word" and/or, "unless the context clearly dictates otherwise. The word "such as" is used herein to mean, and is used interchangeably with, the phrase "such as but not limited to".

The methods and apparatus of the present disclosure may be implemented in a number of ways. For example, the methods and apparatus of the present disclosure may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order for the steps of the method is for illustration only, and the steps of the method of the present disclosure are not limited to the order specifically described above unless specifically stated otherwise. Further, in some embodiments, the present disclosure may also be embodied as programs recorded in a recording medium, the programs including machine-readable instructions for implementing the methods according to the present disclosure. Thus, the present disclosure also covers a recording medium storing a program for executing the method according to the present disclosure.

It is also noted that in the devices, apparatuses, and methods of the present disclosure, each component or step can be decomposed and/or recombined. These decompositions and/or recombinations are to be considered equivalents of the present disclosure.

The previous description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects without departing from the scope of the disclosure. Thus, the present disclosure is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

The foregoing description has been presented for purposes of illustration and description. Furthermore, this description is not intended to limit embodiments of the disclosure to the form disclosed herein. While a number of example aspects and embodiments have been discussed above, those of skill in the art will recognize certain variations, modifications, alterations, additions and sub-combinations thereof.

Claims

1. A memory testing method, comprising:

acquiring functional data;

determining to-be-tested data and reference data based on the type of the functional data;

determining a comparison result of the data to be tested and the reference data;

determining a test result for the memory based on the comparison result.

2. The method of claim 1, wherein said determining data to be tested and reference data based on a type of said functional data comprises:

responding to the starting of a test data mode, determining the functional data as a test read pointer, and controlling the memory to stop updating the data read pointer;

reading the data written into the memory as data to be tested based on the test read pointer;

and acquiring original data corresponding to the data to be tested as reference data.

3. The method of claim 2, wherein the determining a test result for the memory based on the comparison comprises:

and if the comparison result shows that the test data is different from the reference data, determining the test result of the memory as outputting first warning information.

4. The method of claim 2, wherein the method further comprises:

controlling the memory update data read pointer in response to the test data mode being off.

5. The method of claim 1, wherein said determining data to be tested and reference data based on a type of said functional data comprises:

in response to determining that the functional data is any of: determining the functional data as to-be-tested data by a data reading pointer, a data writing pointer and an empty/full mark;

and copying the functional data to obtain functional copy data, and taking the functional copy data as reference data.

6. The method of claim 5, wherein the determining a test result for the memory based on the comparison comprises:

inputting the functional data and the functional replica data into a functional data comparator;

determining, by the comparator, a comparison result between the functional data and the functional replica data within a target period;

and if the comparison result shows that the functional data and the functional data copy are different, determining the test result of the memory as outputting second warning information.

7. The method of one of claims 1 to 6, wherein said determining the data to be tested and the reference data based on the type of the functional data comprises:

in response to writing data to the memory, determining the written data to be functional data;

coding the functional data to obtain first coded data serving as to-be-tested data;

in response to reading the written data from the memory, the read data is encoded, resulting in second encoded data as reference data.

8. The method of claim 7, wherein the determining a test result for the memory based on the comparison comprises:

determining whether the written data and the read data are the same based on a comparison result of the data to be tested and the reference data;

and if the difference is not the same, determining that the test result of the memory is to output third warning information.

9. The method of claim 8, wherein the determining the test result of the memory is outputting a third warning message comprises:

if the different digit of the written data and the read data is less than the preset digit, determining the test result of the memory as third warning information which outputs a first data bit error warning;

and if the different bit number of the written data and the read data is larger than or equal to the preset bit number, determining that the test result of the memory is to output third warning information comprising a second data bit error warning.

10. The method of claim 9, wherein the method further comprises:

and if the different bit numbers of the written data and the read data are less than or equal to the preset bit number, outputting third warning information comprising a first data bit error warning, and correcting the error data bit.

11. A memory test apparatus, comprising:

the acquisition module is used for acquiring functional data;

the first determining module is used for determining the data to be tested and the reference data based on the type of the functional data;

the second determination module is used for determining the comparison result of the data to be tested and the reference data;

and the third determination module is used for determining the test result of the memory based on the comparison result.

12. A computer-readable storage medium, the storage medium storing a computer program for performing the method of any of the preceding claims 1-10.

13. An electronic device, the electronic device comprising:

a processor;

a memory for storing the processor-executable instructions;

the processor is configured to read the executable instructions from the memory and execute the instructions to implement the method of any one of claims 1-10.