CN112038237B - 一种沟槽mosfet的制造方法 - Google Patents
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Abstract
本发明公开了一种沟槽MOSFET的制造方法,包括以下步骤:步骤S1:在N型衬底的表面形成N型外延层;步骤S2:在N型外延层的表面注入硼原子,并在N型外延层上形成沟槽;步骤S3:对沟槽采用高温氧化工艺,硼原子在高温氧化工艺中发生热扩散形成P型扩散区;步骤S4:淀积多晶硅,去除沟槽之外的多晶硅;步骤S5:在P型扩散区的表层之中形成N型扩散区。本发明提供的沟槽MOSFET的制造方法具有更小的单位面积导通电阻、成本更低等优点。
Description
技术领域
本发明涉及半导体技术领域,尤其涉及一种沟槽MOSFET的制造方法。
背景技术
MOSFET芯片是一种分立器件,属于半导体功率器件范畴,与集成电路同属于半导体芯片领域,MOSFET的最关键指标参数包括击穿电压(特指漏源击穿电压)、导通电阻和阈值电压(口语中也称之为开启电压),通常情况下,击穿电压越大越好,导通电阻越小越好。为实现其标称的击穿电压,MOSFET芯片内部结构中都采用特定电阻率、特定厚度的外延层来承压,通常所需实现的击穿电压越高,外延层的电阻率或(和)厚度也就越大,芯片的单位面积的导通电阻随之也越大,所以说,单位面积的导通电阻与击穿电压是一对互为矛盾的参数;最大程度的减小MOSFET芯片的导通电阻,是芯片研发工程师最重要的工作之一,为减小MOSFET芯片的导通电阻,最直接的方法是增大芯片的面积,但这种方法也最直接的增加了芯片的成本,所以说,最大程度的改善单位面积的导通电阻,才是芯片研发工程师的职责所在。
现有技术的缺点:工艺流程中至少包含三次高温处理的工艺(高温氧化形成栅氧化层,高温退火形成体区,高温退火形成源),在这些高温处理的工艺过程中,衬底中的掺杂物质因其掺杂浓度比外延层的掺杂浓度更大所以向外延层中扩散,导致外延层的电阻率变小,MOSFET的击穿电压随之变小,这种情况下,为实现目标击穿电压,需提高外延层的初始电阻率或(和)初始厚度来抵消衬底中的掺杂物质向外延层中扩散产生的影响,这种做法导致芯片单位面积的导通电阻随之增大,因此需要更大的芯片面积实现目标导通电阻,芯片成本增加。现需要一种能实现更低的单位面积导通电阻的方法。
发明内容
本发明提供了一种沟槽MOSFET的制造方法,旨在解决芯片单位面积的导通电阻大的问题。
根据本申请实施例,提供了一种沟槽MOSFET的制造方法,包括以下步骤:
步骤S1:在N型衬底的表面形成N型外延层;
步骤S2:在N型外延层的表面注入硼原子,并在N型外延层上形成沟槽;
步骤S3:对沟槽采用高温氧化工艺,硼原子在高温氧化工艺中发生热扩散形成P型扩散区;
步骤S4:淀积多晶硅,去除沟槽之外的多晶硅;
步骤S5:在P型扩散区的表层之中形成N型扩散区。
优选地,所述步骤S5包括:
步骤S51:采用光刻、离子工艺对预设区域注入磷原子和/或砷原子;
步骤S52:采用快速热处理工艺激活所述磷原子和/或砷原子,形成N型扩散区。
优选地,所述快速热处理的工艺温度为800-1000摄氏度,工艺时间为10-30秒。
优选地,在所述快速热处理工艺中,所述硼原子再次热扩散,所述磷原子和/或砷原子再次向N型外延层热扩散。
优选地,所述步骤S3包括:
步骤S31:所述高温氧化的工艺在所述沟槽的表面生成栅氧化层;
步骤S32:所述硼原子在所述高温氧化工艺中发生热扩散以形成P型扩散区;
步骤S33:所述P型扩散区与N型外延层形成PN结;
所述PN结与所述N型外延层的上表面距离小于所述沟槽的深度。
本申请实施例提供的技术方案可以包括以下有益效果:本申请设计了一种沟槽MOSFET的制造方法,利用生成栅氧化层时的高温工艺对硼原子进行热扩散形成P型扩散区作为MOSFET的体区,而现有技术为形成体区需要额外的一步高温退火工艺;本发明在体区的表层之中注入N型掺杂物质(磷原子或/和砷原子)之后采用快速热处理工艺形成N型扩散区作为MOSFET的源,而现有技术为形成源需要额外的一步高温退火工艺。如此,相比现有技术,本发明减少了高温退火工艺,从而减小了高温处理工艺过程中衬底中的掺杂物质向外延层中的扩散,因此可以得到比现有技术更高的击穿电压,或在实现同样击穿电压的情况下可以得到更小的单位面积导通电阻;另一方面,本发明相比现有技术减少了高温退火工艺,因此加工成本更低、加工效率更高。
附图说明
为了更清楚地说明本发明实施例技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是本发明沟槽MOSFET的制造方法的流程示意图;
图2是本发明步骤S3的流程示意图;
图3是本发明步骤S3之前的流程示意图;
图4是本发明步骤S5的流程示意图;
图5是本发明步骤S1中MOSFET芯片的结构示意图;
图6是本发明步骤S2中MOSFET芯片的结构示意图;
图7是本发明步骤S2中MOSFET芯片的结构示意图;
图8是本发明步骤S3中MOSFET芯片的结构示意图;
图9是本发明步骤S4中MOSFET芯片的结构示意图;
图10是本发明步骤S4中MOSFET芯片的结构示意图;
图11是本发明步骤S5中MOSFET芯片的结构示意图;
图12是本发明另一实施例中MOSFET芯片的结构示意图。
标号说明:
10、沟槽MOSFET的制造方法;1、N型衬底;2、N型外延层;3、P型扩散区;4、沟槽;5、栅氧化层;6、多晶硅;7、N型扩散区;11、硼原子;100、P型衬底;110、P型外延层;130、N型扩散区;140、P型扩散区。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
还应当理解,在此本发明说明书中所使用的术语仅仅是出于描述特定实施例的目的而并不意在限制本发明。如在本发明说明书和所附权利要求书中所使用的那样,除非上下文清楚地指明其它情况,否则单数形式的“一”、“一个”及“该”意在包括复数形式。
还应当进一步理解,在本发明说明书和所附权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合,并且包括这些组合。
请参阅图1和图5,本发明公开了一种沟槽MOSFET的制造方法10,提供MOSFET芯片,所述MOSFET芯片包括N型衬底1以及形成在所述N型衬底1上的N型外延层2,所述沟槽MOSFET的制造方法10包括以下步骤:
步骤S1:在N型衬底1的表面形成N型外延层2,参见图5;
步骤S2:在N型外延层2的表面注入硼原子11,并在N型外延层2上形成沟槽4,参见图6和图7;
步骤S3:对沟槽4采用高温氧化工艺,硼原子11在高温氧化工艺中发生热扩散形成P型扩散区3,参见图8;
步骤S4:淀积多晶硅6,去除沟槽4之外的多晶硅6,参见图9和图10;
步骤S5:在P型扩散区3的表层之中形成N型扩散区7,参见图11。
请参阅图2,所述步骤S3包括步骤S31:所述高温氧化的工艺在所述沟槽4的表面生成栅氧化层5,参见图8;
步骤S32:所述硼原子11在所述高温氧化工艺中发生热扩散以形成P型扩散区3,参见图8;
步骤S33:所述P型扩散区3与N型外延层2形成PN结,参见图8;
在本实施例中,所述PN结与所述N型外延层2的上表面距离小于所述沟槽4的深度。
请参阅图3,可选的,在本实施例中,在所述步骤S31之前,包括如下步骤:
S301:采用高温氧化工艺在所述沟槽4的表面生成牺牲氧化层;
S302:采用湿法腐蚀的工艺去除所述牺牲氧化层。
所述高温氧化工艺的温度为850-1150摄氏度,通常为1000-1050摄氏度,工艺时间为10-100分钟。由于形成沟槽的工艺方法为干法刻蚀工艺,干法刻蚀工艺对沟槽4表层的硅会产生轻微的损伤,为了保证后续栅氧化层的质量,有必要将沟槽4表层有损伤的硅除掉。所述步骤S301和步骤S302的目的在于:通过在所述沟槽4的表层生成牺牲氧化层,该牺牲氧化层中氧原子在高温环境下与沟槽4表层的硅原子发生氧化反应形成氧化硅,沟槽4表层的硅经氧化反应被消耗掉。
所述PN结距离N型外延层2的上表面的高度称之为结深,在步骤S301和S31中,所述硼原子11在生成牺牲氧化层和生成栅氧化层这两步高温氧化工艺中都发生热扩散,并在所述生成栅氧化层之后达到预设结深。
请参阅图4,所述步骤S5包括:
步骤S51:采用光刻、离子工艺对预设区域注入磷原子和/或砷原子;
步骤S52:采用快速热处理工艺激活所述磷原子和/或砷原子,形成N型扩散区7。
所述快速热处理的工艺温度为800-1000摄氏度,工艺时间为10-30秒,在此工艺过程中硼原子11再次热扩散、N型衬底1中的磷原子和/或砷原子再次向N型外延层2中热扩散,但由于快速热处理的工艺时间非常短,所述二者的热扩散都可以忽略不计。
请参阅图11,所述N型扩散区7为MOSFET的源,所述N型衬底1的背面为MOSFET的漏,所述多晶硅6为MOSFET的栅,所述P型扩散区3为MOSFET的体区。
本发明提供的沟槽MOSFET的制造方法10,利用生成栅氧化层时的高温工艺对硼原子11进行热扩散形成P型扩散区3作为MOSFET的体区,而现有技术为形成体区需要额外的一步高温退火工艺;本发明在体区的表层之中注入N型掺杂物质(磷原子或/和砷原子)之后采用快速热处理工艺形成N型扩散区7作为MOSFET的源,而现有技术为形成源需要额外的一步高温退火工艺。如此,相比现有技术,本发明减少了高温退火工艺,从而减小了高温处理工艺过程中衬底中的掺杂物质向N型外延层2中的扩散,因此可以得到比现有技术更高的击穿电压,或在实现同样击穿电压的情况下可以得到更小的单位面积导通电阻;另一方面,本发明相比现有技术减少了高温退火工艺,因此加工成本更低、加工效率更高。
必须提出的是,本发明的制造方法,是以N型沟槽MOSFET为实施例阐述的,但本发明同样也适用于P型沟槽MOSFET;以及所有由沟槽MOSFET衍生和演变形成的其它半导体器件(比如SGT),也都视为本发明之保护范围。
请参阅图12,作为本发明的另一实施例,所述MOSFET芯片对应P型MOSFET时,提供P型衬底100和P型外延层110,在所述P型外延层110的表层之中注入磷原子,最终形成N型扩散区130为MOSFET的体区,最终形成的P型扩散区140为MOSFET的源,由预设区域注入硼原子然后快速热处理形成,所述P型衬底100的背面为MOSFET的漏。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到各种等效的修改或替换,这些修改或替换都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以权利要求的保护范围为准。
Claims (1)
1.一种沟槽MOSFET的制造方法,其特征在于,包括以下步骤:
步骤S1:在N型衬底的表面形成N型外延层;
步骤S2:在N型外延层的表面注入硼原子,并在N型外延层上形成沟槽;
步骤S3:对沟槽采用高温氧化工艺,硼原子在高温氧化工艺中发生热扩散形成P型扩散区;
步骤S4:淀积多晶硅,去除沟槽之外的多晶硅;
步骤S5:在P型扩散区的表层之中形成N型扩散区;
所述衬底、N型外延层、P型扩散区及所述N型扩散区依次叠层设置,所述N型外延层的深度大于所述沟槽的深度;
所述步骤S5包括:步骤S51:采用光刻、离子工艺对预设区域注入磷原子和/或砷原子;
步骤S52:采用快速热处理工艺激活所述磷原子和/或砷原子,形成N型扩散区;
所述快速热处理的工艺温度为800-1000摄氏度,工艺时间为10-30秒;在所述快速热处理工艺中,所述硼原子再次热扩散,所述磷原子和/或砷原子再次向N型外延层热扩散;
所述步骤S3包括:
步骤S31:所述高温氧化的工艺在所述沟槽的表面生成栅氧化层;
步骤S32:所述硼原子在所述高温氧化工艺中发生热扩散以形成P型扩散区;
步骤S33:所述P型扩散区与N型外延层形成PN结;
所述PN结与所述N型外延层的上表面距离小于所述沟槽的深度;
在所述步骤S31之前,包括如下步骤:
S301:采用高温氧化工艺在所述沟槽的表面生成牺牲氧化层;所述高温氧化工艺的温度为1000-1050摄氏度,工艺时间为10-100分钟;
S302:采用湿法腐蚀的工艺去除所述牺牲氧化层。
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