CN112009306B - A wake-up and sleep circuit for AC charging CP signal - Google Patents
A wake-up and sleep circuit for AC charging CP signal Download PDFInfo
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- CN112009306B CN112009306B CN202010812303.9A CN202010812303A CN112009306B CN 112009306 B CN112009306 B CN 112009306B CN 202010812303 A CN202010812303 A CN 202010812303A CN 112009306 B CN112009306 B CN 112009306B
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- B60L58/00—Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles
- B60L58/10—Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles for monitoring or controlling batteries
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- B60L1/00—Supplying electric power to auxiliary equipment of vehicles
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- B60L53/00—Methods of charging batteries, specially adapted for electric vehicles; Charging stations or on-board charging equipment therefor; Exchange of energy storage elements in electric vehicles
- B60L53/10—Methods of charging batteries, specially adapted for electric vehicles; Charging stations or on-board charging equipment therefor; Exchange of energy storage elements in electric vehicles characterised by the energy transfer between the charging station and the vehicle
- B60L53/14—Conductive energy transfer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/60—Other road transportation technologies with climate change mitigation effect
- Y02T10/70—Energy storage systems for electromobility, e.g. batteries
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/60—Other road transportation technologies with climate change mitigation effect
- Y02T10/7072—Electromobility specific charging systems or methods for batteries, ultracapacitors, supercapacitors or double-layer capacitors
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T90/00—Enabling technologies or technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02T90/10—Technologies relating to charging of electric vehicles
- Y02T90/14—Plug-in electric vehicles
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- Power Engineering (AREA)
- Transportation (AREA)
- Mechanical Engineering (AREA)
- Life Sciences & Earth Sciences (AREA)
- Sustainable Development (AREA)
- Sustainable Energy (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
本发明公开了一种交流充电CP信号的唤醒和休眠电路，其特征在于，包括5V常电模块、CP信号转换模块、D触发器模块、D锁存器模块、BMS主控芯片、选择开关模块和电源模，其中：5V常电模块，分别与CP信号转换模块、D触发器模块和D锁存器模块相连接；CP信号转换模块依次与D触发器模块、D锁存器模块、选择开关模块和电源模块；BMS主控芯片分别与D触发器模块、D锁存器模块、选择开关模块和电源模块相连接，本发明通过对D触发器和D锁存器的输入输出信号高低电平变化的逻辑组合控制，来实现交流充电CP信号自动唤醒BMS以及使BMS自动休眠的功能，具有重大的生产实践意义。
The invention discloses an AC charging CP signal wake-up and sleep circuit, which is characterized by comprising a 5V normal power module, a CP signal conversion module, a D trigger module, a D latch module, a BMS main control chip, a selection switch module and a power supply module, wherein: the 5V normal power module is respectively connected to the CP signal conversion module, the D trigger module and the D latch module; the CP signal conversion module is sequentially connected to the D trigger module, the D latch module, the selection switch module and the power supply module; the BMS main control chip is respectively connected to the D trigger module, the D latch module, the selection switch module and the power supply module. The invention realizes the function of automatically waking up the BMS by the AC charging CP signal and automatically putting the BMS to sleep by controlling the logic combination of the high and low level changes of the input and output signals of the D trigger and the D latch, and has great production practice significance.
Description
Technical Field
The invention relates to the technical field of battery management, in particular to a wake-up and sleep circuit of an alternating-current charging CP signal.
Background
The Battery Management System (BMS) is a Battery protection device, is also a bridge between the Battery and the load terminal, and provides protection functions of overcharge, overdischarge, over-temperature and the like for the Battery according to the on-line monitored actual use state of the Battery, so that the Battery is ensured to be safely used. The battery management system BMS is widely used in various fields such as electric vehicles, communication base stations, robots, and the like.
Taking an electric automobile as an example, when an alternating-current charging mode is adopted to charge a vehicle-mounted power battery system (hereinafter referred to as a battery system), if a charging gun on an automobile charging pile is not pulled out for a long time after charging is finished, the battery system can influence the endurance mileage of the automobile due to electric quantity consumption, and the power feeding of a vehicle-mounted accumulator can also be caused, so that the normal use of vehicle-mounted electronic and electric components (including BMS) is influenced.
The reason for the problem is that the charging gun is not pulled out after the charging is finished, and the charging gun always keeps 12V voltage for a charging wake-up CP (CP, i.e. charging wake-up) signal of the battery management system BMS, so that the battery management system BMS cannot enter a low-power-consumption dormant state, but keeps a high-power-consumption normal working state. At this time, if the battery management system BMS is powered by the vehicle-mounted DC/DC power supply (powered by the battery system), the DC/DC power supply consumes the electric power of the battery system due to the continuous power supply to the battery management system BMS, and if the battery management system BMS is powered by the vehicle-mounted accumulator, the battery management system BMS always consumes the electric power of the vehicle-mounted accumulator.
At present, two types of charge wake-up CP signals in an alternating current charging mode are 12V or PWM signals.
In view of the above problems, some existing technical solutions utilize PWM signals output by the CP end (i.e., the charging wake-up end) of the ac charging interface to wake up the BMS and control the BMS to sleep, but the PWM signal detection and processing circuits and PWM signal driving circuits of these technical solutions have complex structures and high design cost.
Therefore, there is an urgent need to develop a wake-up and sleep scheme of an ac charging CP signal that does not use a PWM signal as a trigger signal and is inexpensive.
Disclosure of Invention
The invention aims at overcoming the technical defects existing in the prior art and provides a wake-up and sleep circuit of an alternating-current charging CP signal.
Therefore, the invention provides a wake-up and sleep circuit of an alternating-current charging CP signal, which comprises a 5V constant-current module, a CP signal conversion module, a D trigger module, a D latch module, a BMS main control chip, a selection switch module and a power supply module, wherein:
The 5V constant power module is respectively connected with the CP signal conversion module, the D trigger module and the D latch module and is used for providing continuous 5V direct current output for the CP signal conversion module, the D trigger module and the D latch module;
The CP signal conversion module is provided with two input ends which are respectively connected with an output end CP of the charging interface of the charging gun and an output end of the 5V constant electric module, and is used for converting a CP signal output by the output end CP of the charging interface of the charging gun into a 5V signal and then inputting the 5V signal into a clock signal input end CLK of the D trigger module;
the D trigger module is provided with a signal input end D1 and a preset input end PRE which are respectively connected with the output end of the 5V constant current module;
The zero clearing input end CLR of the D trigger module is connected with the output end of the BMS main control chip;
The D trigger module is provided with a clock signal input end CLK which is connected with the output end of the CP signal conversion module and is used for receiving the 5V signal input by the CP signal conversion module;
The output end of the D trigger module is connected with the input end D2 of the D latch module and is used for providing an input signal for the D latch module;
A D latch module, which has a latch enable input LEN connected with the output end of the 5V constant current module;
The output enabling input end OEN of the D latch module is connected with the output end of the BMS main control chip and is used for receiving an output state control signal output by the BMS main control chip;
the input end D2 of the D latch module is connected with the output end of the D trigger module and is used for receiving the output signal of the D trigger module;
the output end of the D latch module is connected with the input end of the selection switch module and is used for inputting a charging wake-up signal WKUP to the selection switch module;
The BMS main control chip comprises three signal output ends, wherein a first signal output end of the BMS main control chip is connected with a clear input end CLR of the D trigger module and used for providing a clear control signal for the D trigger module and controlling the high-low level state of the clear input end CLR input signal of the D trigger module;
The BMS main control chip is provided with a second signal output end which is connected with an output enabling input end OEN of the D latch module and used for providing an output state control signal for the D latch module so as to control the high-low level state of the output enabling input end OEN input signal of the D latch module;
the BMS main control chip is provided with a third signal output end which is connected with the input end of the selection switch module and is used for providing a charging wake-up self-locking signal PWR for the selection switch module;
In addition, a power input end DVDD of the BMS main control chip is connected with the output end of the power module and is used for receiving the direct current power output by the power module;
the BMS main control chip is provided with a PWM input end which is connected with an output end CP of the charging interface of the charging gun and is used for detecting PWM signals provided by the output end CP of the charging interface of the charging gun and judging whether the charging is finished or not;
the selection switch module comprises two signal input ends and is used for realizing or logic functions;
The first signal input end of the selection switch module is connected with the output end of the D latch module and is used for receiving a charging wake-up signal WKUP input by the D latch module;
The second signal input end of the selection switch module is connected with the output of the BMS main control chip and is used for receiving a charging awakening self-locking signal PWR output by the BMS main control chip;
the output end of the selection switch module is connected with the power supply enabling input end EN of the power supply module and is used for providing a power supply enabling signal EN for the power supply module so as to control the on-off of the power supply output of the power supply module;
The power module is provided with a power output enabling input end EN, is connected with the output end of the selection switch module and is used for receiving a power enabling signal EN output by the selection switch module, and the power enabling signal EN is in a high-low level state to control whether the power module outputs a direct-current power supply or not;
The output end of the power supply module is connected with the power supply input end DVDD of the BMS main control chip, when the power supply module outputs direct current power supply, the power supply module supplies power to the BMS main control chip so as to wake up the battery management system BMS, and when the power supply module does not output direct current power supply, the power supply of the BMS main control chip is stopped, so that the BMS is dormant.
The input end of the 5V constant electric module is connected with an external constant electric 12V or 24V power supply.
The CP signal conversion module 200 includes a switch K1, a switch K2, a resistor R15, a resistor R16, and a resistor R17, where:
The controlled end of the switch K1 is connected with the output end CP of the charging interface of the charging gun;
One end of the switch K1 is connected with the 2 nd pin of the resistor R15;
the other end of the switch K1 is connected with the grounding end GND;
the controlled end of the switch K2 is connected with the 1 st pin of the resistor R15;
one end of the switch K2 is connected with the output end of the 5V constant-current module;
the other end of the switch K2 is connected with the 1 st pin of the resistor R16;
The 1 st pin of the resistor R17 is connected with the 2 nd pin of the resistor R16 and the clock signal input end CLK of the D trigger module;
the 2 nd pin of the resistor R17 is connected to the ground GND.
The D trigger module comprises a D trigger and a zero clearing control circuit, and the D trigger is connected with the zero clearing control circuit;
the D trigger is triggered by an edge and has preset and clear functions, and the clear control circuit is connected with a first signal output end of the BMS main control chip and is used for receiving a clear control signal output by the BMS main control chip so as to control whether the clear function of the D trigger is effective.
The D trigger module comprises a D trigger, a resistor R1, a resistor R2, a resistor R3, a resistor R8 and a zero clearing control circuit, wherein:
the zero clearing control circuit comprises resistors R4, R5, R6 and R7 and an enhanced N-channel field effect transistor Q1;
The power input end VCC of the D trigger is connected with the 2 nd pin of the resistor R1;
preset input terminal of D trigger The end is connected with the 2 nd pin of the resistor R2;
the input end D of the D trigger is connected with the 2 nd pin of the resistor R3;
zero clearing input end of D trigger A1 st pin connected with the resistor R5;
The output end Q of the D trigger is connected with the 1 st pin of the resistor R8;
the clock signal input end CLK of the D trigger is connected with the output end of the CP signal conversion module;
The 1 st pin of the resistor R1, the 1 st pin of the resistor R2 and the 1 st pin of the resistor R3 are respectively connected with the output end of the 5V constant current module;
The 2 nd pin of the resistor R8 is connected with the 1 st pin of the resistor R9;
the 2 nd pin of the resistor R9 is connected with the ground end GND;
the 2 nd pin of the resistor R5 is respectively connected with the 2 nd pin of the resistor R4 and the drain electrode D of the NMOS tube Q1;
The 1 st pin of the resistor R4 is connected with the output end of the 5V constant-current module;
The grid electrode G of the NMOS tube Q1 is respectively connected with the 1 st pin of the resistor R6 and the 2 nd pin of the resistor R7;
the source electrode S of the NMOS tube Q1 and the 1 st pin of the resistor R7 are respectively connected with the ground end GND;
and the 2 nd pin of the resistor R6 is connected with a third signal output end of the BMS main control chip.
The D latch module comprises a D latch and an output control circuit, and the D latch is connected with the output control circuit;
Wherein the D latch has a tri-state gate output function;
The output control circuit is connected with the second signal output end of the BMS main control chip and is used for receiving an output enabling signal OEN output by the BMS main control chip.
The D latch module comprises a D latch, a resistor R10, a resistor R11, a resistor R14 and an output control circuit;
the output control circuit comprises a resistor R12 and a resistor R13;
The power input end VCC of the D latch is connected with the 2 nd pin of the resistor R11;
the latch input end LE of the D latch is connected with the 2 nd pin of the resistor R10;
The input end D of the D latch is respectively connected with the 2 nd pin of the resistor R8 and the 1 st pin of the resistor R9;
The output enable input of the D latch The 2 nd pin of the resistor R12 and the 1 st pin of the resistor R13 are respectively connected;
The output end Q of the D latch is connected with the 1 st pin of the resistor R14 and the input end of the selection switch module;
The 1 st pin of the resistor R10 and the 1 st pin of the resistor R11 are respectively connected with the output end of the 5V constant current module;
The 1 st pin of the resistor R12 is connected with the ground end GND;
the 2 nd pin of the resistor R13 is respectively connected with the 2 nd pin of the resistor R6 and the third signal output end of the BMS main control chip;
The 2 nd pin of the resistor R14 is connected with the ground GND.
The control logic strategy of the circuit for waking up the battery management system BMS through the CP signal is as follows:
Step S0, before the charging gun is inserted, a CP signal output by an output end CP of a charging interface of the charging gun is 0V and the BMS is in a dormant state, a zero clearing control signal is not input into the D trigger module by the BMS main control chip, so that the zero clearing function of the D trigger module is invalid, namely, the output end of the D trigger module changes along the same direction along with an input signal of the D trigger module after a clock signal CLK generates a rising edge valid signal, and when the clock signal CLK is invalid, the output of the D trigger module is a low-level signal;
Step S1, before a charging gun is inserted and charging is started, a CP signal output by an output end CP of a charging interface of the charging gun is hopped to 12V from OV, a rising edge effective signal is input into a clock signal input end CLK of the D trigger module through the CP signal conversion module, the output of the D trigger module is triggered to be changed from low level to high level, a charging wakeup signal WKUP output by the D latch module is enabled to be changed from low level to high level effective signal, a power supply enabling signal EN output by the selection switch module is enabled to be high level, and the power supply module is triggered to output a power supply to activate a BMS main control chip, and at the moment, BMS is primarily wakened but charging is not allowed;
Step S2, after the BMS is primarily awakened, the BMS main control chip outputs a high-level charging awakening self-locking signal PWR for the selection switch module, a power supply enabling signal EN output by the selection switch module continues to keep high level, the power supply module is controlled to output power for continuously supplying power to the BMS main control chip, the BMS main control chip inputs a high-level zero clearing control signal to the D trigger module to enable the zero clearing function of the D trigger module to be changed from invalid to valid, namely, the output signal of the D trigger module is locked from high level to low level until the zero clearing control signal is cancelled, the BMS main control chip inputs a high-level output state control signal to the D latch module to enable the high-resistance state output of the D latch to be changed from invalid to valid, namely, a charging awakening signal WKUP output by the D latch module is locked from high level to low level until the output state control signal is cancelled, and the BMS is fully awakened and charging is allowed.
Wherein, after step S2, the method further comprises the following control steps:
And S3, changing a CP signal output by an output end CP of a charging interface of the charging gun from 12V to a PWM signal until the charging is finished after the charging of the charging gun is started, wherein the rising edge of the PWM signal does not affect the low-level output signals of the D trigger module and the D latch module, and the PWM signal is the basis for judging the charging ending by the BMS main control chip, wherein the charging ending is indicated when the PWM signal is not provided by the output end CP of the charging interface of the charging gun any more, otherwise, if the charging is continuously provided, the charging is indicated not to be ended yet.
Wherein, after step S3, the method further comprises the following control steps:
Step S4, when charging is finished and the charging gun is not pulled out, a CP signal output by an output end CP of a charging interface of the charging gun is changed from a PWM signal to 12V, and at the moment, a control logic strategy that the CP signal enables the BMS to automatically sleep is executed, and the method specifically comprises the following substeps:
Step S40, before the BMS sleeps, under the combined action of the zero clearing function of the D trigger module and the high-impedance output of the D latch module, the charging wake-up signal WKUP output by the D latch module 400 is kept at a low level, namely the WKUP signal is not valid;
Step S41, when the CP signal output by the output end CP of the charging interface of the charging gun is changed from a PWM signal to a 12V continuous high level signal, the third signal output end of the BMS main control chip stops outputting the charging wake-up self-locking signal PWR, namely, the PWR signal is changed from a high level to a low level;
Step S42, the power enable signal EN output by the switch selection module is changed from high level to low level, so that the power module stops outputting power and does not supply power to the BMS main control chip;
Step S43, after the BMS main control chip is powered off, no output signal is input into the D trigger module and the D latch module, so that the zero clearing function of the D trigger module is changed from effective to ineffective, and the high-resistance state output of the D latch module is changed from effective to ineffective, so that the output of the D trigger module and the D latch can change along with the input signal in the same direction;
In step S44, in view of the fact that the CP signal output from the output terminal CP of the charging interface of the charging gun keeps 12V high level, and no rising edge signal that jumps from 0V to 12V is input to the clock signal input terminal CLK of the D flip-flop module, the output of the D flip-flop module still maintains low level, so that the charging wake-up signal WKUP also maintains low level, and the BMS main control chip is locked to be in a power-off state, so far, the BMS sleeps.
Compared with the prior art, the invention provides the wake-up and sleep circuit of the AC charging CP signal, which does not use PWM signals as trigger signals, and realizes the functions of automatically waking up the BMS and automatically sleeping the BMS by the AC charging CP signal through the logic combination control of the high and low level change of the input and output signals of the D trigger and the D latch, thereby having great production and practical significance.
In addition, the hardware circuit design of the invention is scientific, the electronic components are of a general application model, the electronic components are easy to select, the system resources of the BMS main control chip are not required to be additionally occupied, the occupied space of the circuit board is small, and the design cost is low;
In addition, the hardware circuit of the invention has low power consumption, almost no BMS system overhead is increased, even if the charging gun is not pulled out for a long time, the battery system or the vehicle-mounted accumulator jar can not consume electric quantity, and the working time required by the vehicle is ensured, so the technical scheme of the invention has strong practical value and market popularization value.
Drawings
Fig. 1 is a block diagram showing a structure of a wake-up and sleep circuit of an ac charging CP signal according to the present invention;
fig. 2 is a schematic diagram of a specific connection structure of a wake-up and sleep circuit of an ac charging CP signal according to the present invention.
Detailed Description
In order that the manner in which the application is carried out will become more readily apparent, a more particular description of the application will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. It is to be understood that the specific embodiments described herein are merely illustrative of the application and not limiting of the application. It should be further noted that, for convenience of description, only the portions related to the present application are shown in the drawings.
It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other. The application will be described in detail below with reference to the drawings in connection with embodiments.
Referring to fig. 1 and 2, the present invention provides a wake-up and sleep circuit of an ac charging CP signal, which includes a 5V constant power module 100, a CP signal conversion module 200, a D flip-flop module 300, a D latch module 400, a BMS main control chip 500, a selection switch module 600, and a power module 700, wherein:
The 5V constant power module 100 is respectively connected with the CP signal conversion module 200, the D trigger module 300 and the D latch module 400 and is used for providing direct current output with 5V for the CP signal conversion module 200, the D trigger module 300 and the D latch module 400;
In the present invention, the input terminal of the 5V constant current module 100 is connected to an external constant current 12V or 24V power supply.
The CP signal conversion module 200 has two input terminals respectively connected to the output terminal CP of the charging gun charging interface and the output terminal of the 5V constant power module 100, and is configured to convert the CP signal output by the output terminal CP of the charging gun charging interface into a 5V signal, and then input the 5V signal to the clock signal input terminal CLK of the D flip-flop module 300;
The D flip-flop module 300 has a signal input terminal D1 and a preset input terminal PRE connected to the output terminal of the 5V constant current module 100, respectively, and keeps the signals of the two input terminals always high level signals;
The D trigger module 300 is provided with a clear input end CLR which is connected with the output end of the BMS main control chip 500, and the high-low level state of the clear input end CLR input signal is controlled by the output end of the BMS main control chip 500;
A D flip-flop module 300 having a clock signal input CLK connected to the output of the CP signal conversion module 200, for receiving a 5V signal input from the CP signal conversion module 200, the 5V signal being valid at a rising edge;
A D flip-flop module 300 having an output terminal connected to the input terminal D2 of the D latch module 400 for providing an input signal to the D latch module 400;
The D flip-flop module 300 outputs the corresponding signals according to the level states of all the input signals (i.e., the 5V signal output from the 5V normal power module 100, the 5V signal output from the CP signal conversion module 200, and the clear control signal output from the BMS main control chip 500), specifically, when the clear input terminal CLR of the D flip-flop module 300 is at the low level, the output terminal of the D flip-flop module 300 is at the low level, irrespective of the signal level states of the D1 and CLK, when the clear input terminal CLR of the D flip-flop module 300 is at the high level, when the clock CLK signal output from the CP signal conversion module 200 is changed from the low level to the high level, the output terminal of the D flip-flop module is at the high level, and when the D1 signal is at the high level, the output terminal of the D flip-flop module is at the low level, otherwise.
A D latch module 400 having a latch enable input LEN connected to the output of the 5V constant current module 100, always maintaining the input signal at a high level;
The D latch module 400 has an output enable input end OEN connected with an output end of the BMS main control chip 500, and a high-low level state of the output enable input end OEN is controlled by the output of the BMS main control chip 500, and is used for receiving an output state control signal output by the BMS main control chip 500;
A D latch module 400 having an input D2 connected to an output of the D flip-flop module 400 for receiving an output signal of the D flip-flop module 300;
A D latch module 400 having an output terminal connected to the input terminal of the selection switch module 600, for inputting a charge wakeup signal WKUP to the selection switch module 600;
The D latch module 400 determines whether to output the charge wake-up signal WKUP according to the level states of all the input signals (i.e., the 5V signal output by the 5V constant current module 100, the output signal of the D flip-flop module 400, and the output state control signal output by the BMS main control chip 500), specifically, when the output enable input OEN of the D latch module 400 is at a low level, the output terminal of the D latch module 400 is at a low level, no charge wake-up signal WKUP is output, irrespective of the signal level state input by the input terminal D2 of the D latch module 400, when the output enable input OEN of the D latch module 400 is at a high level, the output terminal of the D latch module 400 is identical to the level state of the D2 signal input by the input terminal D2 of the D latch module 400, when the D2 signal input by the input terminal D2 of the D latch module 400 is at a high level, the charge wake-up signal wup valid at a high level is output, and when the D2 signal input by the input terminal D2 of the D latch module 400 is at a low level, no charge wake-up signal wup is output.
The BMS main control chip 500 includes three signal output ends, wherein a first signal output end of the BMS main control chip is connected with a clear input end CLR of the D trigger module 300, and is used for providing a clear control signal for the D trigger module 300 and controlling a high-low level state of the clear input end CLR input signal of the D trigger module 300;
the BMS main control chip 500 has a second signal output end connected to the output enable input end OEN of the D latch module 400, and is configured to provide an output state control signal for the D latch module 400, so as to control a high-low level state of the output enable input end OEN input signal of the D latch module 400;
the third signal output end of the BMS main control chip 500 is connected to the input end of the selector switch module 600, and is configured to provide a charging wake-up self-locking signal PWR for the selector switch module 600;
In addition, a power input end DVDD of the BMS main control chip 500 is connected to an output end of the power module 700, and is configured to receive a dc power output by the power module 700;
The BMS main control chip 500 has a PWM input terminal connected to the output terminal CP of the charging gun charging interface, and is configured to detect a PWM signal provided by the output terminal CP of the charging gun charging interface, and determine whether to end charging, where when the output terminal CP of the charging gun charging interface no longer provides the PWM signal, it indicates that charging is ended, and if not, if continuing to provide, it indicates that charging is not ended yet.
A selector switch module 600 comprising two signal inputs for implementing or logic functions;
a first signal input end of the selection switch module 600 is connected to the output end of the D latch module 400, and is configured to receive a charging wake-up signal WKUP input by the D latch module 400;
A second signal input end of the selection switch module 600 is connected with the output of the BMS main control chip 500, and is used for receiving a charging wake-up self-locking signal PWR output by the BMS main control chip 500;
The output end of the selection switch module 600 is connected with the power enable input end EN of the power module 700 and is used for providing a power enable signal EN for the power module 700 so as to control the on-off of the power output of the power module 700;
It should be noted that, the selection switch module 600 determines whether to output the power enable signal EN according to the high-low level states of the charge wake-up signal WKUP and the charge wake-up latch signal PWR, specifically, when the charge wake-up latch signal PWR output by the BMS main control chip 500 is high, the power enable signal EN output by the selection switch module 600 is also high, irrespective of the level state of the charge signal wake-up signal WKUP, when the charge wake-up latch signal PWR output by the BMS main control chip 500 is low, if the charge signal wake-up signal WKUP input by the D latch module 400 is high, the power enable signal EN output by the selection switch module 600 is also high, and if the charge signal wake-up signal WKUP input by the D latch module 400 is low, the power enable signal EN output by the selection switch module 600 is also low.
A power module 700 having a power output enable input end EN connected to the output end of the selection switch module 600, for receiving a power enable signal EN output from the selection switch module 600, wherein a high-low state of the power enable signal EN controls whether the power module 700 outputs a dc power;
note that, when the power enable signal EN output from the switching module 600 is selected to be at a high level, the power module 700 outputs the dc power, and when it is at a low level, stops outputting the dc power.
The output end of the power module 700 is connected with the power input end DVDD of the BMS main control chip 500, when the power module 700 outputs direct current power, the power module 700 supplies power to the BMS main control chip 500 so as to wake up the BMS, and when the power module 700 does not output direct current power, the power supply to the BMS main control chip 500 is stopped so as to enable the BMS to sleep.
In the invention, the charging gun is a charging gun on an existing automobile charging pile. As described in the background art, the charging gun is not pulled out after the charging is finished, and the charging gun always maintains 12V voltage for the charging wake CP (CP, i.e. charging wake-up) signal of the battery management system BMS, so that the battery management system BMS cannot enter a sleep state with low power consumption, but continues to maintain a normal working state with high power consumption. At this time, if the battery management system BMS is powered by the vehicle-mounted DC/DC power supply (powered by the battery system), the DC/DC power supply consumes the electric power of the battery system due to the continuous power supply to the battery management system BMS, and if the battery management system BMS is powered by the vehicle-mounted accumulator, the battery management system BMS always consumes the electric power of the vehicle-mounted accumulator.
In particular implementation, the charging gun is a charging pile on any electric vehicle conduction charging system (i.e. a charging pile) which accords with the national standard GBT18487.1-2015 general requirement of the 1 st part of electric vehicle conduction charging system of the people's republic of China.
In the present invention, referring to fig. 2, the CP signal conversion module 200 includes a switch K1, a switch K2, a resistor R15, a resistor R16, and a resistor R17, where:
The controlled end of the switch K1 is connected with the output end CP of the charging interface of the charging gun;
One end of the switch K1 is connected with the 2 nd pin of the resistor R15;
the other end of the switch K1 is connected with the grounding end GND;
the controlled end of the switch K2 is connected with the 1 st pin of the resistor R15;
One end of the switch K2 is connected with the output end of the 5V constant current module 100;
the other end of the switch K2 is connected with the 1 st pin of the resistor R16;
The 1 st pin of the resistor R17 is connected with the 2 nd pin of the resistor R16 and the clock signal input end CLK of the D trigger module;
the 2 nd pin of the resistor R17 is connected to the ground GND.
It should be noted that the switches K1, K2 may alternatively use MOSFETs, transistors, or photocouplers to convert the input CP signal into an edge trigger signal acceptable to the D flip-flop module 300.
When the input terminal of the CP signal conversion module 200 is not connected to the output terminal CP of the charging interface of the charging gun, the CP signal is 0V, so that both the switch K1 and the switch K2 are turned off, and the signal at the 1 st pin of the resistor R17 is at a low level, that is, the output of the CP signal conversion module 200 is at a low level. When the output end CP of the charging interface of the charging gun is connected, the input signal CP of the CP signal conversion module 200 jumps from low level to high level (12V), so that the switches K1 and K2 are turned on, the 5V output of the 5V constant current module is turned on, and the signal of the 1 st pin of the resistor R17 jumps from low level to high level, i.e. the output of the CP signal conversion module 200 is high level.
In the present invention, referring to fig. 2, a D flip-flop module 300 includes a D flip-flop and a zero clearing control circuit, where the D flip-flop is connected to the zero clearing control circuit;
the D trigger is triggered by an edge (a rising edge is effective) and has preset and clear functions, and the clear control circuit is connected with a first signal output end of the BMS main control chip 500 and is used for receiving a clear control signal output by the BMS main control chip 500, so as to control whether the clear function of the D trigger is effective.
In particular implementation, the D flip-flop module 300 includes a D flip-flop, a resistor R1, a resistor R2, a resistor R3, a resistor R8, and a clear control circuit, where:
The zero clearing control circuit comprises resistors R4, R5, R6 and R7 and an enhanced N-channel field effect transistor (NMOS transistor for short) Q1;
The power input end VCC of the D trigger is connected with the 2 nd pin of the resistor R1;
preset input terminal of D trigger The end is connected with the 2 nd pin of the resistor R2;
the input end D of the D trigger is connected with the 2 nd pin of the resistor R3;
zero clearing input end of D trigger A1 st pin connected with the resistor R5;
The output end Q of the D trigger is connected with the 1 st pin of the resistor R8;
the clock signal input end CLK of the D trigger is connected with the output end of the CP signal conversion module 200;
The 1 st pin of the resistor R1, the 1 st pin of the resistor R2 and the 1 st pin of the resistor R3 are respectively connected with the output end of the 5V constant current module;
The 2 nd pin of the resistor R8 is connected with the 1 st pin of the resistor R9;
the 2 nd pin of the resistor R9 is connected with the ground end GND;
the 2 nd pin of the resistor R5 is respectively connected with the 2 nd pin of the resistor R4 and the drain electrode D of the NMOS tube Q1;
The 1 st pin of the resistor R4 is connected with the output end of the 5V constant-current module;
The grid electrode G of the NMOS tube Q1 is respectively connected with the 1 st pin of the resistor R6 and the 2 nd pin of the resistor R7;
the source electrode S of the NMOS tube Q1 and the 1 st pin of the resistor R7 are respectively connected with the ground end GND;
The 2 nd pin of the resistor R6 is connected to the third signal output end (i.e. the output end of the charge wake-up self-locking signal PWR) of the BMS main control chip 500.
It should be noted that, referring to fig. 2, for the D flip-flop module 300, the input terminal D of the D flip-flop is a preset enable input terminalAnd the power input end VCC is connected to the output of the 5V constant power module 100 through resistors R3, R2 and R1 respectively, and always keeps a 5V high level, and the latch input enabling end LE and the power input end VCC of the D latch are connected to the output of the 5V constant power module 100 through resistors R10 and R11 respectively, and always keeps a 5V high level.
In the D flip-flop module 300, when no PWR signal is input to the 2 nd pin of the resistor R6 in the clear control circuit, the resistor R7 turns on the gate of the NMOS transistor Q1 and the power ground, and pulls down the gate voltage of the NMOS transistor Q1 to a low level to turn off the same, and the resistors R4 and R5 turn on the clear input terminal of the D flip-flopIs connected with the output end of the 5V constant electric module 100 to maintain the zero clearing input end of the D triggerAnd at a high level of 5V, disabling the zero clearing function of the D trigger. When a PWR signal (high level) is input to the 2 nd pin of the resistor R6, the NMOS tube Q1 is conducted to connect the 2 nd pin of the resistor R5 and the 2 nd pin of the resistor R4 with the ground GND, and the resistor R5 clears the zero input end of the D flip-flopThe zero clearing function of the D flip-flop is enabled by being connected with the ground GND to maintain the low level, and the output of the D flip-flop is locked to the low level without being influenced by the clock input signal CLK.
It should be noted that, for the D flip-flop module 300, when the D flip-flop zero clearing function is not effective, when the clock signal input terminal CLK of the D flip-flop does not have a rising edge signal, the output terminal Q of the D flip-flop is connected to the ground terminal GND through the resistor R8 and the resistor R9, and maintains the output signal at a low level, and when the clock signal input terminal CLK of the D flip-flop has a rising edge signal, the output terminal Q outputs a high level.
In the present invention, referring to fig. 2, a D latch module 400 includes a D latch and an output control circuit, where the D latch is connected to the output control circuit;
Wherein the D latch has a tri-state gate output function;
The output control circuit is connected with the second signal output end of the BMS main control chip 500 and is configured to receive an output enable signal OEN output by the BMS main control chip 500, so as to control the D latch to output a corresponding level signal according to the tri-state gate control logic.
In particular implementation, the D latch module 400 includes a D latch, a resistor R10, a resistor R11, a resistor R14, and an output control circuit;
the output control circuit comprises a resistor R12 and a resistor R13;
The power input end VCC of the D latch is connected with the 2 nd pin of the resistor R11;
the latch input end LE of the D latch is connected with the 2 nd pin of the resistor R10;
The input end D of the D latch is respectively connected with the 2 nd pin of the resistor R8 and the 1 st pin of the resistor R9;
The output enable input of the D latch The 2 nd pin of the resistor R12 and the 1 st pin of the resistor R13 are respectively connected;
An output end Q of the D latch is connected with a1 st pin of the resistor R14 and an input end of the selection switch module 600;
The 1 st pin of the resistor R10 and the 1 st pin of the resistor R11 are respectively connected with the output end of the 5V constant current module 100;
The 1 st pin of the resistor R12 is connected with the ground end GND;
The 2 nd pin of the resistor R13 is connected to the 2 nd pin of the resistor R6 and the third signal output end (i.e. the output end of the charge wake-up self-locking signal PWR) of the BMS main control chip 500, respectively;
The 2 nd pin of the resistor R14 is connected with the ground GND.
It should be noted that, referring to fig. 2, in the output control circuit, when no PWR signal is input to the 2 nd pin of the resistor R13, the resistor R12 outputs the output enable input terminal of the D latch 400Is connected with the power ground GND, maintains the output enable input terminalThe input signal of the D latch is low level, so that the high-resistance output of the D latch is invalid, namely, the output of the D latch changes along with the input signal in the same direction, when the input end D is high level, the charge wake-up signal WKUP output by the output end Q is also high level and can wake up the BMS main control chip 500, when the PWR signal (high level) is input to the 2 nd pin of the resistor R13, the output of the D latch is enabled to the input endThe high-resistance state output of the D latch is enabled to be effective by being pulled up to be high-resistance state, namely the output end Q of the D latch is enabled to be high-resistance state, the output end Q of the D latch is connected with the ground end GND through the resistor R14, and the charging wake-up signal WKUP output by the output end Q is pulled down to be low-level, so that the charging wake-up signal WKUP is enabled to be in an invalid state; when the high-impedance state output of the D latch is valid, the charge wakeup signal WKUP is locked into an inactive state, independent of the input signal change at the input D of the D latch.
In the present invention, it should be noted that, in a specific implementation, the CP signal conversion module 200 may be a coupling circuit formed by a MOSFET or a triode, may be formed by a photo coupler, or may be other circuit structures with similar functions, and are configured to convert an input CP signal into an edge trigger signal acceptable to the D flip-flop module 300.
In the present invention, it should be noted that, in a specific implementation, the selection switch module 600 may be alternatively implemented using a currently commonly used or logic circuit, such as a discrete resistor/diode, a switch integrated chip, or an existing or logic integrated chip.
In the present invention, it should be noted that, in a specific implementation, the power module 700 and the 5V constant current module 100 may use a low-power-consumption, buck-type dc power circuit or integrated power module 700 commonly used at present, such as a linear LDO, a switching power supply, etc., and the dc power circuit or integrated power module 700 should have a power output enabling function so as to control on/off of a power output.
In the present invention, it should be noted that, in specific implementation, the BMS main control chip 500 may be applied to brands, series and models commonly used at present, such as MC9S12 series of NXP, TC265 series of ying fei ling, etc., and the model of the BMS main control chip 500 is not within the protection scope of the present invention.
In the invention, the wake-up and sleep circuit based on the ac charging CP signal provided by the invention can jump the CP signal output by the output CP of the charging interface of the charging gun from 0V to a rising edge effective signal of 12V, thereby being used as a BMS wake-up trigger signal (i.e. CP signal), wherein the control logic strategy of waking up the BMS by the CP signal is as follows:
Step S0, before inserting the charging gun, the CP signal output by the output end CP of the charging interface of the charging gun is 0V and the BMS is in a dormant state, the BMS main control chip 500 does not input a zero clearing control signal into the D trigger module, so that the zero clearing function of the D trigger module 300 is invalid, namely, the output end of the D trigger module 300 changes in the same direction along with the input signal after the rising edge valid signal appears on the clock signal CLK, and when the clock signal CLK is invalid, the output of the D trigger module 300 is a low level signal, the BMS main control chip 500 does not input a state control signal into the D latch module 400, so that the high-impedance state output of the D latch module 400 is invalid, namely, the output of the D trigger module 300 changes in the same direction along with the input signal, and the output charging wake-up signal WKUP is a low level signal;
Step S1, before a charging gun is inserted and charging is started, a CP signal output by an output end CP of a charging interface of the charging gun is hopped to 12V from OV, a rising edge effective signal is input into a clock signal input end CLK of the D trigger module 300 through the CP signal conversion module, the output of the D trigger module 300 is triggered to be changed from low level (obtained through the awakening control logic step S0) to high level, a charging awakening signal WKUP output by the D latch module 400 is enabled to be changed from low level (obtained through the awakening control logic step S0) to high level effective signal, a power enabling signal EN output by the selection switch module 600 is enabled to be high level, and the power module 700 is triggered to output a power source to activate the BMS master control chip 500, and at the moment, the BMS is primarily awakened but charging is not allowed;
step S2, after the BMS is primarily awakened, the BMS main control chip 500 outputs a high-level charge awakening self-locking signal PWR for the selection switch module 600, the power enable signal EN output by the selection switch module 600 continues to keep high level, the power supply module 700 is controlled to output power for continuously supplying power to the BMS main control chip 500, the BMS main control chip 500 inputs a high-level zero clearing control signal to the D trigger module 300, so that the zero clearing function of the D trigger module 300 is changed from invalid to valid, namely, the output signal of the D trigger module 300 is locked from high level to low level until the zero clearing control signal is cancelled, the BMS main control chip 500 inputs a high-level output state control signal to the D latch module 400, so that the high-resistance state output of the D latch is changed from invalid, namely, the charge awakening signal WKUP output by the D latch module 400 is locked from high level to low level until the output state control signal is cancelled, and thus the BMS is fully awakened and charging is allowed.
In specific implementation, in the above-mentioned control logic step S2, the charging wake-up signal WKUP output by the D latch module 400 is disabled, and only the charging wake-up self-locking signal PWR is enabled, so that the BMS can automatically sleep after the charging is completed.
For the present invention, after step S2, the following control steps are further included:
Step S3, after the charging of the charging gun is started, the CP signal output by the output end CP of the charging interface of the charging gun is changed from 12V to a PWM signal until the charging is finished, the rising edge of the PWM signal does not affect the low-level output signals of the D trigger module 300 and the D latch module 400, the PWM signal is the basis for judging the charging ending by the BMS main control chip 500, wherein the charging ending is indicated when the output end CP of the charging interface of the charging gun does not provide the PWM signal any more, otherwise, if the charging is continuously provided, the charging is indicated not to be ended yet.
For the present invention, after step S3, the following control steps are further included:
Step S4, when charging is finished and the charging gun is not pulled out, a CP signal output by an output end CP of a charging interface of the charging gun is changed from a PWM signal to 12V, and at the moment, a control logic strategy that the CP signal enables the BMS to automatically sleep is executed, and the method specifically comprises the following substeps:
Step S40, before the BMS sleeps, under the combined action of the zero clearing function of the D trigger module 300 and the high-impedance output of the D latch module 400, the charging wake-up signal WKUP output by the D latch module 400 is kept at a low level, namely the WKUP signal is not valid;
step S41, when the CP signal output by the output terminal CP of the charging interface of the charging gun is changed from the PWM signal to the 12V continuous high level signal, the third signal output terminal of the BMS main control chip 500 stops outputting the charging wake-up self-locking signal PWR, i.e. the PWR signal is changed from the high level to the low level;
Step S42, the power enable signal EN output by the switch selection module 600 is changed from high level to low level, so that the power module 700 stops outputting power and no power is supplied to the BMS main control chip 500;
Step S43, after the BMS main control chip 500 is powered off, no output signal is input to the D flip-flop module 300 and the D latch module 400, so that the zero clearing function of the D flip-flop module 300 is changed from active to inactive, and the high-impedance output of the D latch module 400 is changed from active to inactive, so that the outputs of the D flip-flop module 300 and the D latch can change along with the input signals in the same direction;
In step S44, since the CP signal outputted from the output terminal CP of the charging interface of the charging gun keeps 12V high, and no rising edge signal from 0V to 12V is inputted to the clock signal input terminal CLK of the D flip-flop module 300, the output of the D flip-flop module 300 still keeps low, so that the charging wake-up signal WKUP also keeps low, and the BMS main control chip 500 is locked in the power-off state, so far, the BMS is dormant.
It should be noted that, for the wake-up and sleep circuit of the ac charging CP signal provided by the present invention, the wake-up and sleep circuit may be directly applied to a BMS, or may be applied to other electronic control systems for controlling the wake-up and sleep of the BMS, or electronic devices having wake-up and sleep requirements.
In summary, compared with the prior art, the wake-up and sleep circuit of the ac charging CP signal provided by the invention does not use the PWM signal as the trigger signal, and realizes the functions of automatically waking up the BMS and automatically sleeping the BMS by the ac charging CP signal through the logic combination control of the high-low level change of the input/output signals of the D trigger and the D latch, thereby having great production and practical significance.
In addition, the hardware circuit design of the invention is scientific, the electronic components are of a general application model, the electronic components are easy to select, the system resources of the BMS main control chip 500 are not required to be additionally occupied, the occupied space of the circuit board is small, and the design cost is low;
In addition, the hardware circuit of the invention has low power consumption, almost no BMS system overhead is increased, even if the charging gun is not pulled out for a long time, the battery system or the vehicle-mounted accumulator jar can not consume electric quantity, and the working time required by the vehicle is ensured, so the technical scheme of the invention has strong practical value and market popularization value.
The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (9)
1. The utility model provides a wake-up and dormancy circuit of alternating current charging CP signal, its characterized in that includes 5V normal electric module (100), CP signal conversion module (200), D trigger module (300), D latch module (400), BMS main control chip (500), select switch module (600) and power module (700), wherein:
The 5V constant power module (100) is respectively connected with the CP signal conversion module (200), the D trigger module (300) and the D latch module (400) and is used for providing direct current output with 5V for the CP signal conversion module (200), the D trigger module (300) and the D latch module (400);
The CP signal conversion module (200) is provided with two input ends which are respectively connected with an output end CP of the charging interface of the charging gun and an output end of the 5V constant electric module (100) and is used for converting a CP signal output by the output end CP of the charging interface of the charging gun into a 5V signal and then inputting the 5V signal into a clock signal input end CLK of the D trigger module (300);
The D trigger module (300) is provided with a signal input end D1 and a preset input end PRE which are respectively connected with the output end of the 5V constant current module (100);
The D trigger module (300) is provided with a clear input end CLR which is connected with the output end of the BMS main control chip (500);
A D flip-flop module (300) having a clock signal input CLK connected to the output of the CP signal conversion module (200) for receiving a 5V signal input by the CP signal conversion module (200);
A D flip-flop module (300) having an output connected to the input D2 of the D latch module (400) for providing an input signal to the D latch module (400);
A D latch module (400) having a latch enable input LEN connected to the output of the 5V constant current module (100);
the output enabling input end OEN of the D latch module (400) is connected with the output end of the BMS main control chip (500) and is used for receiving an output state control signal output by the BMS main control chip (500);
A D latch module (400) having an input D2 connected to the output of the D flip-flop module (400) for receiving the output signal of the D flip-flop module (300);
a D latch module (400) having an output terminal connected to the input terminal of the selection switch module (600) for inputting a charge wakeup signal WKUP to the selection switch module (600);
The BMS main control chip (500) comprises three signal output ends, wherein a first signal output end of the BMS main control chip is connected with a clear input end CLR of the D trigger module (300) and used for providing a clear control signal for the D trigger module (300) and controlling the high-low level state of the clear input end CLR of the D trigger module (300) to input signals;
The second signal output end of the BMS main control chip (500) is connected with the output enabling input end OEN of the D latch module (400) and is used for providing an output state control signal for the D latch module (400) so as to control the high-low level state of the output enabling input end OEN input signal of the D latch module (400);
The BMS main control chip (500) is provided with a third signal output end connected with the input end of the selection switch module (600) and used for providing a charging awakening self-locking signal PWR for the selection switch module (600);
in addition, a power input end DVDD of the BMS main control chip (500) is connected with the output end of the power module (700) and is used for receiving the direct current power output by the power module (700);
The BMS main control chip (500) is provided with a PWM input end which is connected with an output end CP of the charging interface of the charging gun and is used for detecting PWM signals provided by the output end CP of the charging interface of the charging gun and judging whether the charging is finished or not;
-a selection switch module (600) comprising two signal inputs for implementing or logic functions;
A first signal input end of the selection switch module (600) is connected with the output end of the D latch module (400) and is used for receiving a charging wake-up signal WKUP input by the D latch module (400);
The second signal input end of the selection switch module (600) is connected with the output end of the BMS main control chip (500) and is used for receiving a charging awakening self-locking signal PWR output by the BMS main control chip (500);
the output end of the selection switch module (600) is connected with the power supply enabling input end EN of the power supply module (700) and is used for providing a power supply enabling signal EN for the power supply module (700) so as to control the on-off of the power supply output of the power supply module (700);
A power module (700) having a power output enable input end EN connected to the output end of the selection switch module (600) for receiving a power enable signal EN output by the selection switch module (600), and controlling whether the power module (700) outputs a dc power or not in a high-low state of the power enable signal EN;
The output end of the power supply module (700) is connected with the power supply input end DVDD of the BMS main control chip (500), when the power supply module (700) outputs a direct current power supply, the power supply module (700) supplies power to the BMS main control chip (500) so as to wake up the battery management system BMS, and when the power supply module (700) does not output the direct current power supply, the power supply to the BMS main control chip (500) is stopped so as to enable the BMS to sleep;
the wake-up and sleep circuit of the ac charging CP signal wakes up the control logic strategy of the battery management system BMS through the CP signal as follows:
Step S0, before a charging gun is inserted, a CP signal output by an output end CP of a charging interface of the charging gun is 0V, and a BMS is in a dormant state, a zero clearing control signal is not input into the D trigger module by the BMS main control chip (500), so that the zero clearing function of the D trigger module (300) is invalid, namely, the output end of the D trigger module (300) changes in the same direction along with an input signal of the D trigger module after a rising edge valid signal appears on a clock signal CLK, and when the clock signal CLK is invalid, the output of the D trigger module (300) is a low level signal, the BMS main control chip (500) does not input a state control signal into the D latch module (400), so that the high-impedance state output of the D latch module (400) is invalid, namely, the output of the D trigger module (300) changes in the same direction along with the input signal, and an output charging wake-up signal WKUP is a low level signal;
Step S1, before a charging gun is inserted and charging is started, a CP signal output by an output end CP of a charging interface of the charging gun is hopped to 12V from OV, a rising edge effective signal is input into a clock signal input end CLK of the D trigger module (300) through the CP signal conversion module (200), the output of the D trigger module (300) is triggered to be changed from low level to high level, a charging wakeup signal WKUP output by the D latch module (400) is enabled to be changed from low level to high level effective signal, a power supply enabling signal EN output by the selection switch module (600) is enabled to be high level, and the power supply module (700) is triggered to output a power supply to activate a BMS main control chip (500), and at the moment, the BMS is primarily woken up but charging is not allowed;
Step S2, after the BMS is primarily awakened, the BMS main control chip (500) outputs a high-level charge awakening self-locking signal PWR for the selection switch module (600), a power source enabling signal EN output by the selection switch module (600) continues to keep high level, the power source module (700) is controlled to output power, the BMS main control chip (500) continuously supplies power, the BMS main control chip (500) inputs a high-level zero clearing control signal to the D trigger module (300), the zero clearing function of the D trigger module (300) is enabled to be enabled from invalid, namely, the output signal of the D trigger module (300) is locked from high level to low level until the zero clearing control signal is cancelled, the BMS main control chip (500) inputs a high-level output state control signal to the D latch module (400), the high-resistance state output of the D latch is enabled to be enabled from invalid, namely, the charging signal WKUP output by the D trigger module (400) is enabled to be locked from high level to low level until the zero level is cancelled, and the BMS is enabled to be fully charged.
2. The wake-up and sleep circuit of an ac charging CP signal according to claim 1, wherein the input of the 5V constant current module (100) is connected to an external constant current 12V or 24V power supply.
3. The wake-up and sleep circuit of an ac charging CP signal of claim 1, wherein CP signal conversion module 200 comprises switch K1, switch K2, resistor R15, resistor R16, and resistor R17, wherein:
The controlled end of the switch K1 is connected with the output end CP of the charging interface of the charging gun;
One end of the switch K1 is connected with the 2 nd pin of the resistor R15;
the other end of the switch K1 is connected with the grounding end GND;
the controlled end of the switch K2 is connected with the 1 st pin of the resistor R15;
One end of the switch K2 is connected with the output end of the 5V constant current module (100);
the other end of the switch K2 is connected with the 1 st pin of the resistor R16;
The 1 st pin of the resistor R17 is connected with the 2 nd pin of the resistor R16 and the clock signal input end CLK of the D trigger module;
the 2 nd pin of the resistor R17 is connected to the ground GND.
4. The wake-up and sleep circuit of an ac charging CP signal of claim 1, wherein the D flip-flop module (300) comprises a D flip-flop and a clear control circuit, the D flip-flop being connected to the clear control circuit;
The D trigger is triggered by an edge and has preset and zero clearing functions, and the zero clearing control circuit is connected with a first signal output end of the BMS main control chip (500) and is used for receiving zero clearing control signals output by the BMS main control chip (500) so as to control whether the zero clearing function of the D trigger is effective.
5. The wake-up and sleep circuit of an ac charging CP signal of claim 4, wherein the D flip-flop module (300) comprises a D flip-flop, a resistor R1, a resistor R2, a resistor R3, a resistor R8, and a clear control circuit, wherein:
the zero clearing control circuit comprises resistors R4, R5, R6 and R7 and an enhanced N-channel field effect transistor Q1;
The power input end VCC of the D trigger is connected with the 2 nd pin of the resistor R1;
the PRE-set input end PRE end of the D trigger is connected with the 2 nd pin of the resistor R2;
the input end D of the D trigger is connected with the 2 nd pin of the resistor R3;
the zero clearing input end CLR of the D trigger is connected with the 1 st pin of the resistor R5;
The output end Q of the D trigger is connected with the 1 st pin of the resistor R8;
the clock signal input end CLK of the D trigger is connected with the output end of the CP signal conversion module (200);
The 1 st pin of the resistor R1, the 1 st pin of the resistor R2 and the 1 st pin of the resistor R3 are respectively connected with the output end of the 5V constant current module;
The 2 nd pin of the resistor R8 is connected with the 1 st pin of the resistor R9;
the 2 nd pin of the resistor R9 is connected with the ground end GND;
the 2 nd pin of the resistor R5 is respectively connected with the 2 nd pin of the resistor R4 and the drain electrode D of the NMOS tube Q1;
The 1 st pin of the resistor R4 is connected with the output end of the 5V constant-current module;
the grid electrode G of the NMOS tube Q1 is respectively connected with the 1 st pin of the resistor R6 and the 2 nd pin of the resistor R7;
the source electrode S of the NMOS tube Q1 and the 1 st pin of the resistor R7 are respectively connected with the ground end GND;
And the 2 nd pin of the resistor R6 is connected with a third signal output end of the BMS main control chip (500).
6. The wake-up and sleep circuit of an ac charging CP signal of claim 5, wherein the D latch module (400) comprises a D latch and an output control circuit, the D latch being connected to the output control circuit;
Wherein the D latch has a tri-state gate output function;
the output control circuit is connected with a second signal output end of the BMS main control chip (500) and is used for receiving an output enabling signal OEN output by the BMS main control chip (500).
7. The wake-up and sleep circuit of an ac charging CP signal of claim 6, wherein the D latch module (400) comprises a D latch, a resistor R10, a resistor R11, a resistor R14, and an output control circuit;
the output control circuit comprises a resistor R12 and a resistor R13;
The power input end VCC of the D latch is connected with the 2 nd pin of the resistor R11;
the latch input end LE of the D latch is connected with the 2 nd pin of the resistor R10;
The input end D of the D latch is respectively connected with the 2 nd pin of the resistor R8 and the 1 st pin of the resistor R9;
an output enabling input end OE of the D latch is respectively connected with a 2 nd pin of the resistor R12 and a1 st pin of the resistor R13;
An output end Q of the D latch is connected with a1 st pin of the resistor R14 and an input end of the selection switch module (600);
The 1 st pin of the resistor R10 and the 1 st pin of the resistor R11 are respectively connected with the output end of the 5V constant current module (100);
The 1 st pin of the resistor R12 is connected with the ground end GND;
the 2 nd pin of the resistor R13 is respectively connected with the 2 nd pin of the resistor R6 and a third signal output end of the BMS main control chip (500);
The 2 nd pin of the resistor R14 is connected with the ground GND.
8. The wake-up and sleep circuit of an ac charging CP signal according to claim 1, further comprising the control step of, after step S2:
And S3, changing a CP signal output by an output end CP of a charging interface of the charging gun from 12V to a PWM signal until the charging is finished after the charging of the charging gun is started, wherein the rising edge of the PWM signal does not affect the low-level output signals of the D trigger module (300) and the D latch module (400), and the PWM signal is the basis for judging the charging ending by the BMS main control chip (500), wherein the charging ending is indicated when the PWM signal is not provided by the output end CP of the charging interface of the charging gun any more, otherwise, if the charging is continuously provided, the charging is not ended.
9. The wake-up and sleep circuit of an ac charging CP signal as claimed in claim 8, further comprising, after step S3, the control step of:
Step S4, when charging is finished and the charging gun is not pulled out, a CP signal output by an output end CP of a charging interface of the charging gun is changed from a PWM signal to 12V, and at the moment, a control logic strategy that the CP signal enables the BMS to automatically sleep is executed, and the method specifically comprises the following substeps:
Step S40, before the BMS sleeps, under the combined action of the zero clearing function of the D trigger module (300) and the high-resistance state output of the D latch module (400), the charging wake-up signal WKUP output by the D latch module 400 is kept at a low level, namely the WKUP signal is invalid;
Step S41, after the CP signal output by the output end CP of the charging interface of the charging gun is changed from a PWM signal to a 12V continuous high level signal, the third signal output end of the BMS main control chip (500) stops outputting the charging wake-up self-locking signal PWR, namely, the PWR signal is changed from a high level to a low level;
Step S42, the power enable signal EN output by the switch selection module (600) is changed from high level to low level, so that the power module (700) stops outputting power and does not supply power to the BMS main control chip (500);
Step S43, after power is off, the BMS main control chip (500) does not have output signals input into the D trigger module (300) and the D latch module (400), so that the zero clearing function of the D trigger module (300) is changed from effective to ineffective, and the high-resistance output of the D latch module (400) is changed from effective to ineffective, so that the output of the D trigger module (300) and the output of the D latch can change along with the input signals in the same direction;
In step S44, since the CP signal outputted from the output terminal CP of the charging interface of the charging gun keeps 12V high level, and no rising edge signal from 0V to 12V is inputted to the clock signal input terminal CLK of the D flip-flop module (300), the output of the D flip-flop module (300) still keeps low level, so that the charging wake-up signal WKUP also keeps low level, and the BMS main control chip (500) is locked to be in a power-off state, so that the BMS is dormant.
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| CN112659935B (en) * | 2020-12-02 | 2024-12-31 | 力神（青岛）新能源有限公司 | A high-security DC charging gun electronic lock control circuit |
| CN115246340B (en) * | 2021-04-26 | 2025-03-07 | 广汽埃安新能源汽车股份有限公司 | Car wake-up control circuit and electric car |
| CN113147504B (en) * | 2021-05-17 | 2022-08-09 | 昆山宝创新能源科技有限公司 | Charging control circuit, charging system, vehicle and charging control method |
| CN113561806B (en) * | 2021-07-28 | 2024-07-26 | 中国第一汽车股份有限公司 | Controller, control method, vehicle and control system |
| CN114701398B (en) * | 2022-03-29 | 2025-09-16 | 肇庆合林立业科技有限公司 | Electric automobile alternating-current charging CP signal awakening and dormancy circuit |
| CN115837860B (en) | 2022-10-08 | 2024-11-22 | 宁德时代新能源科技股份有限公司 | BMS sleep wake-up circuit, method, BMS and electrical equipment |
| CN115933456B (en) * | 2022-10-19 | 2024-09-13 | 重庆长安新能源汽车科技有限公司 | Low-power-consumption vehicle-mounted CP wake-up circuit and vehicle |
| CN120396767A (en) * | 2022-10-24 | 2025-08-01 | 宁德时代新能源科技股份有限公司 | BMS sleep wake-up circuit, method, BMS and electrical equipment |
| CN116252677B (en) * | 2022-11-24 | 2026-02-24 | 宁德时代新能源科技股份有限公司 | BMS dormancy awakening circuit and method, BMS and electric equipment |
| CN116207843A (en) * | 2023-03-24 | 2023-06-02 | 厦门新能达科技有限公司 | Power supply device, battery management device and method thereof, battery system and electric equipment |
| CN117938184B (en) * | 2024-03-21 | 2024-06-04 | 华南理工大学 | Wireless energy-carrying receiving device based on bistable latch and timing control |
| CN119396269B (en) * | 2024-12-31 | 2025-07-15 | 无锡中微爱芯电子有限公司 | Low-power consumption wake-up circuit integrated in MCU |
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| DE102017223806A1 (en) * | 2017-12-27 | 2019-06-27 | Borgward Trademark Holdings Gmbh | Charging control method, associated equipment and vehicle |
| CN108233489A (en) * | 2018-03-11 | 2018-06-29 | 深圳大力神科技有限公司 | A kind of charging lock-in circuit and its lithium battery source protection plate |
| CN109435764A (en) * | 2018-12-13 | 2019-03-08 | 深圳市麦澜创新科技有限公司 | A kind of the wake/sleep system and its logic control method of battery management system |
| CN110450654A (en) * | 2019-09-09 | 2019-11-15 | 上海外斯能源科技有限公司 | Cell management system of electric automobile charging wake-up circuit |
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