CN111913904B - Method for automatically allocating mutually different addresses to a plurality of slave devices using a master-slave communication protocol and device therefor - Google Patents

Method for automatically allocating mutually different addresses to a plurality of slave devices using a master-slave communication protocol and device therefor Download PDF

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Publication number
CN111913904B
CN111913904B CN201910663602.8A CN201910663602A CN111913904B CN 111913904 B CN111913904 B CN 111913904B CN 201910663602 A CN201910663602 A CN 201910663602A CN 111913904 B CN111913904 B CN 111913904B
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terminal
slave device
clock
slave
address
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CN111913904A (en
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郑正仁
林兴泽
金太爀
李真宇
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Zinitix Co Ltd
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Zinitix Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0016—Inter-integrated circuit (I2C)

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)

Abstract

An I2C system apparatus including an apparatus supporting I2C communication, comprising: a master device including an SCL terminal and an SDA terminal; and a first slave device including an SCL terminal and an SDA terminal; the first slave device determines whether or not the SCL terminal and the SDA terminal of the first slave device are connected to the SCL terminal and the SDA terminal of the master device, respectively, or to the SDA terminal and the SCL terminal of the master device, and when it is determined that the SCL terminal and the SDA terminal of the first slave device are connected to the SCL terminal and the SDA terminal of the master device, the first slave device is automatically set to use a first address as the address of the first slave device, and when it is determined that the SCL terminal and the SDA terminal of the first slave device are connected to the SDA terminal and the SDA terminal of the master device, respectively, the second slave device is automatically set to use a second address as the address of the first slave device.

Description

Method for automatically allocating mutually different addresses to a plurality of slave devices using a master-slave communication protocol and device therefor
Technical Field
The present invention relates to a device using a master-slave communication protocol and a system constituted by the same, and more particularly to a technique for automatically communicating addresses of slave devices with a master device.
Background
Recently, for control of a plurality of devices such as front and rear cameras and a dual camera, a chipset of the same structure is being used.
On the other hand, I2C is a serial computer bus developed by philips for connecting low-speed peripheral devices to a motherboard, a built-in system, a mobile phone, and the like. I2C uses two bi-directional open collector or open drain lines called Serial Data (SDA) and Serial Clock (SCL) to which a pull-up resistor is connected. In the I2C communication scheme, one master (master) device and one or more slave (slave) devices may be used. That is, the I2C communication scheme corresponds to a master-slave communication protocol.
In the I2C communication scheme, in the case of using the same-structured chip sets (i.e., slave chip sets, slave devices), it is preferable to operate on a single bus in order to reduce complexity caused by a communication line connected to a master chip set (i.e., master device).
In order to use the same-structured chipsets on the unified bus, it is necessary to assign mutually different dependent addresses to each of the chipsets. As one method for this, a method of fixing and using mutually different slave addresses to slave chipsets of the same structure may be used. However, according to the method, management of addresses is inconvenient, and there is a problem in that the possibility of misuse of the dependent addresses increases. As another method, a method of assigning a slave address to each of the slave chip groups of the same structure according to the setting of another H/W pin may be utilized. However, in this case, there is a problem in that the additional H/W pin is required.
As related patents, korean patent publication No. 10-2011-013423. The korean published patent relates to I2C address translation. Is a technique related to a method of receiving an original I2C address, converting the original I2C address into a converted I2C address, and outputting the converted I2C address.
Disclosure of Invention
In order to solve the above-described problems, the present invention provides a master-slave communication system device and a communication device capable of automatically assigning slave addresses to slave chipsets having the same configuration without additional pins.
According to an aspect of the present invention, there may be provided a master-slave communication system apparatus including: a main device including a clock terminal and a data terminal; and a first slave device including a clock terminal and a data terminal. At this time, the first slave device uses a first address as an address of the first slave device in a case where a clock terminal of the first slave device and a data terminal of the first slave device are connected to a clock terminal of the master device and a data terminal of the master device, respectively. In addition, when the clock terminal of the first slave device and the data terminal of the first slave device are connected to the data terminal of the master device and the clock terminal of the master device, respectively, the second address is used as the address of the first slave device.
At this time, the master-slave communication system device may further include a second slave device including a clock terminal and a data terminal. At this time, the second slave device makes use of the first address as the address of the second slave device in a case where the clock terminal of the second slave device and the data terminal of the second slave device are connected to the clock terminal of the master device and the data terminal of the master device, respectively. The second address is used as the address of the second slave device when the clock terminal of the second slave device and the data terminal of the second slave device are connected to the data terminal of the master device and the clock terminal of the master device, respectively.
In this case, the clock terminal of the first slave device and the data terminal of the first slave device may be connected to the clock terminal of the master device and the data terminal of the master device, respectively, and the clock terminal of the second slave device and the data terminal of the second slave device may be connected to the data terminal of the master device and the clock terminal of the master device, respectively.
At this time, the first slave device and the second slave device may have the same structure as each other.
At this time, the master-slave communication system device may be an I2C system device supporting I2C communication, the clock terminal of the first slave device may be an SCL terminal of the first slave device, the data terminal of the first slave device may be an SDA terminal of the first slave device, the clock terminal of the second slave device may be an SCL terminal of the second slave device, and the data terminal of the second slave device may be an SDA terminal of the second slave device.
According to another aspect of the present invention, a communication device including a data terminal and a clock terminal may be provided. The communication device includes: and a control unit including a first terminal connected to the data terminal and a second terminal connected to the clock terminal. The control unit (1) uses the first terminal as a terminal for data use, uses the second terminal as a terminal for clock use, and uses a first address as an address of the communication device when a terminal for receiving a clock signal is the clock terminal, (2) uses the second terminal as a terminal for data use, uses the first terminal as a terminal for clock use, and uses a second address as an address of the communication device when a terminal for receiving the clock signal is the data terminal.
According to still another aspect of the present invention, a communication device including a data terminal and a clock terminal may be provided. The communication device includes: a control unit including a first terminal for data use and a second terminal for clock use; and a switching unit that selectively connects the data terminal and the clock terminal to the first terminal and the second terminal. In this case, the switching unit (1) connects the first terminal and the second terminal to the data terminal and the clock terminal, respectively, when the terminal receiving the clock signal is the clock terminal, and (2) connects the first terminal and the second terminal to the clock terminal and the data terminal, respectively, when the terminal receiving the clock signal is the data terminal. Further, the control unit (1) uses a first address as an address of the communication device when a terminal receiving the clock signal is the clock terminal, and (2) uses a second address as an address of the communication device when a terminal receiving the clock signal is the data terminal.
According to still another aspect of the present invention, a communication device including a data terminal and a clock terminal may be provided. The communication device includes: a first control section including a terminal for data use and a terminal for clock use so that a first address is used as an address of the communication device; a second control section including a terminal for data use and a terminal for clock use so that a second address is used as an address of the communication device; and a selection unit that selects one of the first control unit and the second control unit so that the selected control unit is activated and the unselected control unit is in an inactive state. In this case, the data terminal of the first control unit and the clock terminal of the first control unit are connected to the data terminal and the clock terminal, respectively. The data terminal of the second control unit and the clock terminal of the second control unit are connected to the clock terminal and the data terminal, respectively. The selecting unit determines a control unit capable of decoding a specific packet received through the data terminal or the clock terminal in the first control unit and the second control unit, and activates the determined control unit.
At this time, the communication apparatus can be used as a slave apparatus in a master-slave communication system.
According to still another aspect of the present invention, a communication device including a data terminal and a clock terminal may be provided. The communication device includes: and a control unit including a first terminal connected to the data terminal and a second terminal connected to the clock terminal. In this case, the control unit (1) uses the first terminal as a terminal for data use, uses the second terminal as a terminal for clock use, and uses a first address as an address of the communication device when the data terminal of the communication device and the clock terminal of the communication device are connected to the data terminal of the other communication device and the clock terminal of the other communication device, respectively, and (2) uses the second terminal as a terminal for data use, uses the first terminal as a terminal for clock use, and uses the second address as an address of the communication device when the data terminal of the communication device and the clock terminal of the communication device are connected to the clock terminal of the other communication device and the clock terminal of the other communication device, respectively.
In this case, the communication device may be a slave device in the master-slave communication system, and the other communication device may be a master device in the master-slave communication system.
According to an aspect of the present invention, there may be provided an I2C system apparatus as an I2C system apparatus including an apparatus supporting I2C communication, including: a master device including an SCL terminal and an SDA terminal; and a first slave device including an SCL terminal and an SDA terminal.
At this time, the first slave device determines whether or not the SCL terminal and the SDA terminal of the first slave device are connected to the SCL terminal and the SDA terminal of the master device, respectively, or to the SDA terminal and the SCL terminal of the master device, and when it is determined that the SCL terminal and the SDA terminal of the first slave device are connected to the SCL terminal and the SDA terminal of the master device, respectively, automatically sets the first address as the address of the first slave device.
At this time, the first slave device determines whether or not the SCL terminal and the SDA terminal of the first slave device are connected to the SCL terminal and the SDA terminal of the master device, respectively, or to the SDA terminal and the SCL terminal of the master device, and when it is determined that the SCL terminal and the SDA terminal of the first slave device are connected to the SDA terminal and the SCL terminal of the master device, respectively, automatically sets the second address as the address of the first slave device.
At this time, the I2C system device may further include a second slave device including an SCL terminal and an SDA terminal.
The second slave device may determine whether or not the SCL terminal and the SDA terminal of the second slave device are connected to the SCL terminal and the SDA terminal of the master device, respectively, or may automatically set the first address to be the address of the second slave device when it is determined that the SCL terminal and the SDA terminal of the second slave device are connected to the SCL terminal and the SDA terminal of the master device, respectively.
The second slave device may determine whether or not the SCL terminal and the SDA terminal of the second slave device are connected to the SCL terminal and the SDA terminal of the master device, respectively, or may be connected to the SDA terminal and the SCL terminal of the master device, and may automatically set the second address to be used as the address of the second slave device when the SCL terminal and the SDA terminal of the second slave device are connected to the SDA terminal and the SCL terminal of the master device, respectively.
In this case, (1) the SCL terminal and the SDA terminal of the first slave device may be connected to the SCL terminal and the SDA terminal of the master device, the SCL terminal and the SDA terminal of the second slave device may be connected to the SDA terminal and the SCL terminal of the master device, respectively, or (2) the SCL terminal and the SDA terminal of the second slave device may be connected to the SCL terminal and the SDA terminal of the master device, respectively, and the SCL terminal and the SDA terminal of the first slave device may be connected to the SDA terminal and the SCL terminal of the master device, respectively.
At this time, the first slave device and the second slave device may be devices having the same structure as each other.
According to another aspect of the present invention, there may be provided an I2C communication device including an SDA terminal and an SCL terminal.
The I2C communication device includes: an I2C control unit including a first terminal connected to the SDA terminal and a second terminal connected to the SCL terminal; and a terminal connection state detection unit that determines a terminal that receives a clock signal from the outside among the SDA terminal and the SCL terminal.
At this time, the I2C control unit (1) uses the first terminal as a data terminal, uses the second terminal as a clock terminal, uses a first address as an address of the I2C communication device when it is determined that the terminal receiving the clock signal is the SCL terminal, and (2) uses the second terminal as a data terminal, uses the first terminal as a clock terminal, and uses a second address as an address of the I2C communication device when it is determined that the terminal receiving the clock signal is the SDA terminal.
According to another aspect of the present invention, there may be provided an I2C communication device including an SDA terminal and an SCL terminal. The I2C communication device includes: an I2C control unit including a first terminal and a second terminal; a switching unit that selectively connects an SDA terminal and an SCL terminal to the first terminal and the second terminal; and a terminal connection state detection unit that determines a terminal that receives a clock signal from the outside among the SDA terminal and the SCL terminal.
At this time, the switching unit (1) connects the first terminal and the second terminal to the SDA terminal and the SCL terminal, respectively, when the terminal that is determined to receive the clock signal is the SCL terminal, and (2) connects the first terminal and the second terminal to the SCL terminal and the SDA terminal, respectively, when the terminal that is determined to receive the clock signal is the SDA terminal.
The I2C control unit (1) uses a first address as the address of the I2C communication device when the terminal that receives the clock signal is determined to be the SCL terminal, and (2) uses a second address as the address of the I2C communication device when the terminal that receives the clock signal is determined to be the SDA terminal.
According to still another aspect of the present invention, there may be provided an I2C communication device including an SDA terminal and an SCL terminal. The I2C communication device includes: an I2C control unit including a first terminal connected to the SDA terminal and a second terminal connected to the SCL terminal; and a terminal connection state detection unit that determines whether or not the SDA terminal and the SCL terminal are connected to the SDA terminal and the SCL terminal of the other I2C communication device, respectively, in a state in which the I2C communication device is connected to the other I2C communication device, and, if not, determines whether or not the SDA terminal and the SCL terminal are connected to the SCL terminal and the SDA terminal of the other I2C communication device, respectively.
In this case, the I2C control unit (1) may use the first terminal as a data terminal, the second terminal as a clock terminal, and the first address as an address of the I2C communication device when it is determined that the SDA terminal and the SCL terminal are connected to the SDA terminal and the SCL terminal of the other I2C communication device, respectively, (2) may use the second terminal as a data terminal, the first terminal as a clock terminal, and the second address as an address of the I2C communication device when it is determined that the SDA terminal and the SCL terminal are connected to the SCL terminal and the SDA terminal of the other I2C communication device, respectively.
According to still another aspect of the present invention, there may be provided an I2C communication device including an SDA terminal and an SCL terminal. The I2C communication device includes: a first I2C control section including a data terminal and a clock terminal such that a first address is used as an address of the I2C communication device; a second I2C control section having the same structure as the first I2C control section such that a second address is used as an address of the I2C communication device; and a selection unit that selects one of the first I2C control unit and the second I2C control unit so that the selected I2C control unit is activated and the unselected I2C control unit is deactivated.
At this time, the data terminal and the clock terminal of the first I2C control unit are connected to the SDA terminal and the SCL terminal, respectively. The data terminal and the clock terminal of the second I2C control unit are connected to the SCL terminal and the SDA terminal, respectively. The selection unit determines, among the first I2C control unit and the second I2C control unit, an I2C control unit that can decode a specific packet received through the SDA terminal and the SCL terminal, and activates the determined I2C control unit.
According to the present invention, when using the master-slave communication system apparatus, it is possible to automatically assign mutually different slave addresses to each of the slave chips having the same configuration without requiring an additional pin.
Drawings
Fig. 1 is a diagram for explaining a master-slave communication system apparatus according to an embodiment of the present invention.
Fig. 2a shows the internal configuration of the first slave device and the second slave device according to the first embodiment of the present invention, and fig. 2b shows the configuration of the master-slave communication system device according to the first embodiment of the present invention.
Fig. 3a shows the internal configuration of a first slave device and a second slave device according to a second embodiment of the present invention, and fig. 3b shows the configuration of a master-slave communication system device according to the second embodiment of the present invention.
Fig. 4a shows the internal configuration of a first slave device and a second slave device according to a third embodiment of the present invention, and fig. 4b shows the configuration of a master-slave communication system device according to the third embodiment of the present invention.
Detailed Description
Embodiments of the present invention are described below with reference to the accompanying drawings. The invention is not limited to the embodiments described in this specification, but may be embodied in many different forms. The terminology used in the description is for the purpose of aiding in the understanding of the embodiments and is not intended to limit the scope of the present invention. The singular forms used hereinafter also include the plural forms, unless the statement explicitly indicates the contrary.
Fig. 1 is a diagram for explaining a master-slave communication system apparatus according to an embodiment of the present invention.
In the following, in the present specification, the master-slave communication system apparatus may be an I2C communication system apparatus. In the following, in the present specification, an I2C system device or an I2C communication system device may be understood alternatively by the term of a master-slave communication system device.
The I2C system apparatus may include: a master device 1 supporting I2C communication, a first slave device 2, and a second slave device 3 having the same structure as the first slave device 2. Wherein the master device and the slave device may be ICs. The I2C system device may also be referred to as an I2C system in the following description.
In the present invention, it is intended to provide a method of automatically setting addresses of slave devices to slave devices having the same structure using the I2C system device. Here, the "slave devices having the same structure" may mean, for example, ICs manufactured in the same process and having the same internal structure and the same part number (part number), and ICs using the I2C communication protocol.
In the present invention, the slave devices may be referred to as I2C communication devices.
The master device 1 is a device that performs a master function under an I2C communication protocol as an IC including an SCL terminal 11 and an SDA terminal 12.
The first slave device 2 may determine whether the SCL terminal 21 and the SDA terminal 22 of the first slave device 2 are connected to the SCL terminal 11 and the SDA terminal 12 of the master device 1, or to the SDA terminal 12 and the SCL terminal 11 of the master device 1, respectively.
In the present specification, the case where the SCL terminal 21 and the SDA terminal 22 of the first slave device 2 are connected to the SCL terminal 11 and the SDA terminal 12 of the master device 1, respectively, may be referred to as "non-cross connection". In contrast, in the case of the first slave device 2, the case where the SCL terminal 21 and the SDA terminal 22 of the first slave device 2 are connected to the SDA terminal 12 and the SCL terminal 11 of the master device 1, respectively, may be referred to as "cross connection". In the case of supporting a chipset using an I2C communication protocol to which the present invention is not applied, the system is expected to operate normally when it is "non-cross-connected", whereas it is impossible to operate normally when it is "cross-connected".
Then, when the first slave device 2 determines that the SCL terminal 21 and the SDA terminal 22 of the first slave device 2 are connected to the SCL terminal 11 and the SDA terminal 12 of the master device 1, that is, when the first slave device is determined to be not cross-connected, the first slave device 2 may be automatically set to use the first address as the address of the first slave device 2.
In contrast, when the first slave device 2 determines that the SCL terminal 21 and the SDA terminal 22 of the first slave device 2 are connected to the SDA terminal 12 and the SCL terminal 11 of the master device 1, that is, when the first slave device determines that the first slave device is cross-connected, the first slave device 2 may automatically set a second address as the address of the first slave device 2.
Wherein the first address and the second address may be mutually different values stored in advance in the first slave device. The first address and the second address may be stored in a storage provided in the first slave device, respectively.
For example, in fig. 1, the first slave device 2 may automatically set the first address as the address of the first slave device 2 because the SCL terminal 21 and the SDA terminal 22 of the first slave device 2 are connected (not cross-connected) to the SCL terminal 11 and the SDA terminal 12 of the master device 1, respectively.
As with the first slave device 2, it may be determined whether the SCL terminal 31 and the SDA terminal 32 of the second slave device 3 are connected to the SCL terminal 11 and the SDA terminal 12 of the master device 1, respectively, i.e., are not cross-connected, otherwise, whether they are connected to the SDA terminal 12 and the SCL terminal 11 of the master device 1, i.e., are cross-connected, and the address of the second slave device 3 may be automatically set.
For example, in fig. 1, the second slave device 3 is automatically configured to use the second address as the address of the second slave device 3 because the SCL terminal 31 and the SDA terminal 32 of the second slave device 3 are connected (cross-connected) to the SDA terminal 12 and the SCL terminal 11 of the master device 1, respectively.
The first slave device 2 and the second slave device 3 are devices having the same structure as each other, but differ from each other in terms of whether they are cross-connected or non-cross-connected to the master device 1.
Fig. 2a shows the internal configuration of the first slave device and the second slave device according to the first embodiment of the present invention.
Fig. 2b shows the structure of the I2C system device according to the first embodiment of the present invention.
The first slave device 2 may include an SCL terminal 21 and an SDA terminal 22. The first slave device 2 may further include an I2C control unit 210, a switching unit 230, and a terminal connection state detection unit 240.
The I2C control part 210 may include a first terminal 211 and a second terminal 212.
The second slave device 3 may include an SCL terminal 31 and an SDA terminal 32. The second slave device 3 may further include an I2C control unit 310, a switching unit 330, and a terminal connection state detection unit 340.
The I2C control part 310 may include a first terminal 311 and a second terminal 312.
As described above, the first slave device 2 and the second slave device 3 may have the same structure as each other.
As shown in fig. 2b, the first slave device 2 and the second slave device 3 may be connected to the master device 1, respectively.
The master device 1 may include an SCL terminal 11 and an SDA terminal 12.
For example, the SCL terminal 21 and the SDA terminal 22 of the first slave device 2 may be connected (not cross-connected) to the SCL terminal 11 and the SDA terminal 12 of the master device 1, respectively. Also, the SCL terminal 31 and the SDA terminal 32 of the second slave device 3 may be connected (cross-connected) to the SDA terminal 12 and the SCL terminal 11 of the master device 1, respectively.
The following description will be made with reference to the first slave device 2.
The SCL terminal 21 and the SDA terminal 22 of the first slave device 2 may be connected (not cross-connected) to the SCL terminal 11 and the SDA terminal 12 of the master device 1 via the 11 th transmission line TL11 and the 12 th transmission line TL12, respectively. The SCL terminal 21 and the SDA terminal 22 of the first slave device 2 may receive the transmission clock signal and the data signal through the 11 th transmission line TL11 and the 12 th transmission line TL12, respectively.
The terminal connection state detection unit 240 of the first slave device 2 may receive signals detected from the SCL terminal 21 and the SDA terminal 22, respectively. The terminal connection state detecting unit 240 may determine a terminal that receives the clock signal in the received signal. If the terminal connection state detecting unit 240 determines a terminal receiving a clock signal, the determined result may be transmitted to the switching unit 230 and the I2C control unit 210. For example, in fig. 2b, the terminal receiving the clock signal may be the SCL terminal 21.
The switching unit 230 of the first slave device 2 may selectively connect the SCL terminal 21 and the SDA terminal 22 to the first terminal 211 and the second terminal 212 of the I2C control unit 210. In this case, the "selection" may be performed based on whether the terminal receiving the clock signal is one of the SCL terminal 21 and the SDA terminal 22. That is, the switching unit 230 may connect the first terminal 211 and the second terminal 212 to the SCL terminal 21 and the SDA terminal 22, respectively, when the terminal that receives the clock signal is determined to be the SCL terminal 21, and may connect the first terminal 211 and the second terminal 212 to the SDA terminal 22 and the SCL terminal 21, respectively, when the terminal that receives the clock signal is determined to be the SDA terminal 22. For example, in fig. 2b, since the terminal determined to receive the clock signal is the SCL terminal 21, the switching unit 230 may connect the first terminal 211 and the second terminal 212 to the SCL terminal 21 and the SDA terminal 22, respectively.
The determination as to whether or not to receive the clock signal or the data signal via the specific terminal may be embodied in various ways by those skilled in the art, and thus, in this specification, the method will not be described in detail. However, it is easily understood that the clock signal and the data signal can be distinguished from each other, for example, when using an internal clock that is much faster than the clock signal period that needs to be received.
The I2C control unit 210 may use a first address as the address of the first slave device 2 when it is determined that the terminal receiving the clock signal is the SCL terminal 21, and may use a second address as the address of the first slave device 2 when it is determined that the terminal receiving the clock signal is the SDA terminal 22. For example, in fig. 2b, the first address may be used as the address of the first slave device 2, corresponding to the case where the terminal determined to receive the clock signal is the SCL terminal 21.
In the present specification, the "I2C control section" may be regarded as a module that plays a role of deciding which of the SCL terminal and the SDA terminal of the slave device is used as the clock terminal and which is used as the data terminal in the slave device according to an embodiment of the present invention using the I2C communication protocol. Also, at the same time, a function of deciding an address to be used by the corresponding slave device may be performed.
The details described in the first slave device 2 are equally applicable to the second slave device 3.
At this time, the SCL terminal 21, the SDA terminal 22, the I2C control section 210, the switching section 230, the terminal connection state detecting section 240, the first terminal 211, and the second terminal 212 of the first slave device 2 may correspond to the SCL terminal 31, the SDA terminal 32, the I2C control section 310, the switching section 330, the terminal connection state detecting section 340, the first terminal 311, and the second terminal 312 of the second slave device 3, respectively.
For example, in fig. 2b, if the same principle as the address setting principle of the first slave device 2 is applied for the second slave device 3, the second slave device 3 may use a second address as the address of the second slave device 3.
In the first embodiment of fig. 2a and 2b, the first slave device 2 and the second slave device 3 can automatically allocate the internal address according to the external connection state.
Fig. 3a shows the internal configuration of the first slave device and the second slave device according to the second embodiment of the present invention, and fig. 3b shows the structure of the I2C system device according to the second embodiment of the present invention.
The first slave device 2 may include an SCL terminal 21 and an SDA terminal 22. The first slave device 2 may further include an I2C control unit 210 and a terminal connection state detection unit 240.
The I2C control section 210 may include a first terminal 211, a second terminal 212, a switching section 213, and a clock and data input/output section 214.
The clock and data input/output portion 214 may include a clock terminal CLK and a data terminal D. The clock and data input/output unit 214 may function to supply the clock and data input from the first terminal 211 and the second terminal 212 to other logic (not shown) existing in the first slave device 2 or to supply the clock and data from the first slave device 2 to the master device 1.
The second slave device 3 may include an SCL terminal 31 and an SDA terminal 32. The second slave device 3 may further include an I2C control unit 310 and a terminal connection state detection unit 340.
The I2C control part 310 may include a first terminal 311, a second terminal 312, a switching part 313, and a clock and data input/output part 314.
The function of the clock and data input/output unit 314 of the second slave device 3 may be the same as that of the clock and data input/output unit 214 of the first slave device 2.
As described above, the first slave device 2 and the second slave device 3 may have the same structure as each other.
As shown in fig. 3b, the first slave device 2 and the second slave device 3 may be connected to the master device 1, respectively.
The connection relationship between the master device 1 and the first and second slave devices 2 and 3 may be the same as that shown in fig. 3 b.
The following description will be made with reference to the first slave device 2.
The SCL terminal 21 and the SDA terminal 22 of the first slave device 2 may be connected to the SCL terminal 11 and the SDA terminal 12 of the master device 1 via the 11 th transmission line TL11 and the 12 th transmission line TL12, respectively. The SCL terminal 21 and the SDA terminal 22 of the first slave device 2 can receive a transmission clock signal and a data signal from the master device 1 via the 11 th transmission line TL11 and the 12 th transmission line TL12, respectively.
The terminal connection state detection unit 240 of the first slave device 2 may receive signals transmitted from the SCL terminal 21 and the SDA terminal 22, respectively. The terminal connection state detecting unit 240 may determine a terminal that receives the clock signal in the received signal. If the terminal connection state detecting unit 240 determines a terminal for receiving a clock signal, the determined result may be transmitted to the switching unit 213 of the I2C control unit 210. For example, in fig. 3b, the terminal receiving the clock signal may be the SCL terminal 21.
The first terminal 211 and the second terminal 212 of the I2C control section 210 of the first slave device 2 may be connected to the SCL terminal 21 and the SDA terminal 22, respectively. Therefore, the switching unit 213 of the I2C control unit 210 may selectively connect the first terminal 211 and the second terminal 212 to the clock terminal CLK and the data terminal D of the clock and data input/output unit 214.
That is, the switching unit 213 ① may connect the first terminal 211 and the second terminal 212 to the clock terminal CLK and the data terminal D, respectively, when the terminal that is determined to receive the clock signal is the SCL terminal 21, and may connect the first terminal 211 and the second terminal 212 to the data terminal D and the clock terminal CLK, respectively, when the terminal that is determined to receive the clock signal is the SDA terminal 22, ②. For example, in fig. 3b, since the terminal determined to receive the clock signal is the SCL terminal 21, the switching unit 213 may connect the first terminal 211 and the second terminal 212 to the clock terminal CLK and the data terminal D, respectively.
The I2C control unit 210 may use the first terminal 211 as a clock terminal and the second terminal 212 as a data terminal when it is determined that the terminal receiving the clock signal is the SCL terminal 21. At this time, the first address may be used as the address of the first slave device 2. Alternatively, the I2C control unit 210 may use the second terminal 212 as a clock terminal and the first terminal 211 as a data terminal when it is determined that the terminal receiving the clock signal is the SDA terminal 22. At this time, the second address may be used as the address of the first slave device 2.
The details described in the first slave device 2 are equally applicable to the second slave device 3.
At this time, the SCL terminal 21, the SDA terminal 22, the I2C control section 210, the first terminal 211, the second terminal 212, the switching section 213, the clock and data input/output section 214, and the terminal connection state detection section 240 of the first slave device 2 may correspond to the SCL terminal 31, the SDA terminal 32, the I2C control section 310, the first terminal 311, the second terminal 312, the switching section 313, the clock and data input/output section 314, and the terminal connection state detection section 340 of the second slave device 3, respectively.
For example, in fig. 3b, if the same principle as the address setting principle of the first slave device 2 is applied for the second slave device 3, the second slave device 3 may use a second address as the address of the second slave device 3.
In the second embodiment of fig. 3a and 3b, it is possible to automatically set the first slave device 2 to use the first address and the second slave device 3 to use the second address.
Fig. 4a shows the internal configuration of the first slave device and the second slave device according to the third embodiment of the present invention, and fig. 4b shows the structure of the I2C system device according to the third embodiment of the present invention.
The first slave device 2 may include an SCL terminal 21 and an SDA terminal 22. The first slave device 2 may further include a first I2C control unit 210, a second I2C control unit 220, and a selection unit 250. In addition, the first slave device 2 may comprise other internal circuitry not shown in fig. 4 a.
The first I2C control section 210 may include a first terminal 211 and a second terminal 212. For example, the first terminal 211 may be a clock terminal and the second terminal 212 may be a data terminal. Also, the first I2C control section 210 may cause the first address to be used as the address of the first slave device 2.
The second I2C control section 220 may have the same structure as the first I2C control section 210. That is, the second I2C control part 220 may include a third terminal 221 and a fourth terminal 222. For example, the third terminal 221 may be a clock terminal and the fourth terminal 222 may be a data terminal. Also, the second I2C control section 220 may cause the second address to be used as the address of the first slave device 2.
The selecting unit 250 may select one of the first I2C control unit 210 and the second I2C control unit 220, and activate the selected I2C control unit 210 or 220 such that the unselected I2C control unit 220 or 210 is in an inactive state. The meaning of "active" and "inactive" may mean that an "active" I2C control unit is used and an "inactive" I2C control unit is not used.
The first slave device 2 and the second slave device 3 may have the same structure as each other.
The second slave device 3 may include an SCL terminal 31 and an SDA terminal 32. The second slave device 3 may include a first I2C control unit 310, a second I2C control unit 320, and a selection unit 350.
The first I2C control part 310 may include a first terminal 311 and a second terminal 312. For example, the first terminal 311 may be a clock terminal, and the second terminal 312 may be a data terminal. Also, the first I2C control section 310 may cause the first address to be used as the address of the second slave device 3.
The second I2C control part 320 may have the same structure as the first I2C control part 310. That is, the second I2C control unit 320 may include a third terminal 321 and a fourth terminal 322. For example, the third terminal 321 may be a clock terminal and the fourth terminal 322 may be a data terminal. Also, the second I2C control section 320 may cause the second address to be used as the address of the second slave device 3.
The selecting unit 350 may select one of the first I2C control unit 310 and the second I2C control unit 320, so that the selected I2C control unit 310 or 320 is activated, and the unselected I2C control unit 320 or 310 is deactivated.
As shown in fig. 4b, the first slave device 2 and the second slave device 3 may be connected to the master device 1, respectively. The connection relationship between the master device 1 and the first and second slave devices 2 and 3 may be the same as that shown in fig. 2 b.
The following description will be made with reference to the first slave device 2.
The SCL terminal 21 and the SDA terminal 22 of the first slave device 2 can receive a transmission clock signal and a data signal from the SCL terminal 11 and the SDA terminal 12 of the master device 1 through the 11 th transmission line TL11 and the 12 th transmission line TL12, respectively.
A first terminal (e.g., clock terminal) 211 and a second terminal (e.g., data terminal) 212 of the first I2C control unit 210 of the first slave device 2 may be connected to the SCL terminal 21 and the SDA22 terminal, respectively. That is, the first terminal (e.g., clock terminal) 211 and the second terminal (e.g., data terminal) 212 of the first I2C control part 210 may receive signals transmitted from the SCL terminal 21 and the SDA terminal 22, respectively.
A third terminal (e.g., clock terminal) 221 and a fourth terminal (e.g., data terminal) 222 of the second I2C control section 220 of the first slave device 2 may be connected to the SDA terminal 22 and the SCL terminal 21, respectively. That is, the third terminal (e.g., clock terminal) 221 and the fourth terminal (e.g., data terminal) 222 of the first I2C control section 210 may receive signals transmitted from the SDA terminal 22 and the SCL terminal 21, respectively.
The selection unit 250 of the first slave device 2 may determine an I2C control unit that can successfully decode a specific packet received through the SCL terminal 21 and the SDA terminal 22 in the first I2C control unit 210 and the second I2C control unit 220, and activate the determined I2C control unit. At this time, successful decoding of the specific data packet may mean decoding the data packet transmitted from the master device 1 into a data signal instead of a clock signal.
For example, the selecting unit 250 may select the first terminal (for example, a clock terminal) 211 to be connected to the first I2C control unit 210 of the SCL terminal 21 transmitting the clock signal as an I2C control unit capable of successfully decoding the specific data packet received through the SCL terminal 21 and the SDA terminal 22. The selection unit 250 may activate the selected first I2C control unit 210 to deactivate the unselected second I2C control unit 220. That is, the first I2C control section 210 may be responsible for the communication function of the first slave device 2.
The details described in the first slave device 2 are equally applicable to the second slave device 3.
At this time, the SCL terminal 21, the SDA terminal 22, the first I2C control section 210, the first terminal 211, the second terminal 212, the second I2C control section 220, the third terminal 221, the fourth terminal 222, and the selection section 250 of the first slave device 2 may correspond to the SCL terminal 31, the SDA terminal 32, the first I2C control section 310, the first terminal 311, the second terminal 312, the second I2C control section 320, the third terminal 321, the fourth terminal 322, and the selection section 350 of the second slave device 3, respectively.
For example, in fig. 4b, if the same principle as the address setting principle of the first slave device 2 is applied to the second slave device 3, the second I2C control part 320 of the second slave device 3 may be responsible for the communication function of the second slave device 3. That is, the second slave device 3 may use a second address as the address of the second slave device 3.
In the third embodiment of fig. 4a and 4b, it is possible to automatically set the first slave device 2 to use the first address and the second slave device 3 to use the second address.
With the embodiments of the present invention described above, various changes and modifications can be easily made by those skilled in the art to which the present invention pertains without departing from the essential characteristics of the present invention. The contents of each claim of the claims can be combined with other claim items having no reference relationship within the scope that can be understood from the present specification.

Claims (4)

1. A master-slave communication system apparatus comprising:
a main device including a clock terminal and a data terminal; and
A first slave device including a clock terminal and a data terminal; and
A second slave device having the same structure as the first slave device;
Wherein the method comprises the steps of
The clock and data terminals of the first slave device are connected to the clock and data terminals of the master device respectively,
The clock and data terminals of the second slave device are connected to the data and clock terminals of the master device respectively,
Each slave device of the first slave device and the second slave device is configured to:
when the clock terminal and the data terminal of each slave device are connected to the clock terminal and the data terminal of the master device, respectively, the first address is used as the address of each slave device, and
When the clock terminal and the data terminal of each slave device are connected to the data terminal and the clock terminal of the master device, respectively, the second address is used as the address of each slave device.
2. The master-slave communication system apparatus of claim 1, wherein,
The master-slave communication system device is an I 2 C system device supporting I 2 C communication,
The clock terminal of the first slave device is the SCL terminal of the first slave device,
The data terminal of the first slave device is the SDA terminal of the first slave device,
The clock terminal of the second slave device is the SCL terminal of the second slave device, and
The data terminal of the second slave device is an SDA terminal of the second slave device.
3. The master-slave communication system apparatus according to claim 1, wherein
Wherein said each slave device comprises a control unit comprising a first terminal connected to said data terminal of said each slave device and a second terminal connected to said clock terminal of said each slave device;
the control unit is configured to:
(1) When the terminal receiving the clock signal is the clock terminal, using the first terminal as a data terminal, using the second terminal as a clock terminal, and using a first address as an address of each slave device, and
(2) When the terminal receiving the clock signal is the data terminal, the second terminal is used as a data terminal, and the first terminal is used as a clock terminal, and a second address is used as an address of each slave device.
4. The master-slave communication system apparatus according to claim 1, wherein
Each slave device includes:
A control unit including a first terminal serving as data and a second terminal serving as a clock; and
A switching unit selectively connecting the data terminal and the clock terminal of each slave device to the first terminal and the second terminal;
Wherein the method comprises the steps of
The switching unit is configured to: (1) Connecting the first and second terminals to the data and clock terminals of each slave device, respectively, when a terminal receiving a clock signal is the clock terminal of the each slave device, (2) connecting the first and second terminals to the clock and data terminals of the each slave device, respectively, when a terminal receiving the clock signal is the data terminal of the each slave device;
The control unit is configured to: (1) When the terminal receiving the clock signal is the clock terminal of the each slave device, a first address is used as the address of the each slave device, and (2) when the terminal receiving the clock signal is the data terminal of the each slave device, a second address is used as the address of the each slave device.
CN201910663602.8A 2019-05-08 2019-07-19 Method for automatically allocating mutually different addresses to a plurality of slave devices using a master-slave communication protocol and device therefor Active CN111913904B (en)

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