CN111769048A - Display screen and manufacturing method thereof - Google Patents

Display screen and manufacturing method thereof Download PDF

Info

Publication number
CN111769048A
CN111769048A CN202010661811.1A CN202010661811A CN111769048A CN 111769048 A CN111769048 A CN 111769048A CN 202010661811 A CN202010661811 A CN 202010661811A CN 111769048 A CN111769048 A CN 111769048A
Authority
CN
China
Prior art keywords
substrate
mini
layer
display screen
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202010661811.1A
Other languages
Chinese (zh)
Other versions
CN111769048B (en
Inventor
孙德瑞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Shuangyu Shengtai Technology Co.,Ltd.
Original Assignee
Shandong Aosheng Intelligent Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong Aosheng Intelligent Technology Co ltd filed Critical Shandong Aosheng Intelligent Technology Co ltd
Priority to CN202010661811.1A priority Critical patent/CN111769048B/en
Publication of CN111769048A publication Critical patent/CN111769048A/en
Application granted granted Critical
Publication of CN111769048B publication Critical patent/CN111769048B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Theoretical Computer Science (AREA)

Abstract

The invention provides a display screen and a manufacturing method thereof, wherein a first substrate and a second substrate are respectively integrated with a mini-LED and a TFT, and then are assembled to form a display device which can be respectively manufactured and tested; and a test end is formed on the first substrate, the test end is not only a test terminal but also a connecting part for electrically connecting the first substrate and the second substrate circuit, and the test position is close to the connecting position, so that the test accuracy is ensured, and the light-emitting element which has defects and cannot normally operate is convenient to repair.

Description

Display screen and manufacturing method thereof
Technical Field
The invention relates to the technical field of luminous display, in particular to a display screen and a manufacturing method thereof.
Background
Currently, the manufacturing process of the display device often uses a mass transfer technology, which is used to transfer a large number of light emitting elements (e.g., light emitting diodes) onto a circuit substrate, and then electrically connect the light emitting elements with pixel circuits on the circuit substrate. However, in the prior art, since there is a concern that the circuit substrate will be damaged in the repairing process, it is difficult to repair the defective light emitting device that cannot operate normally after a large number of light emitting devices are transferred on the circuit substrate, and the defective device must be discarded, resulting in insufficient production yield.
Disclosure of Invention
Based on solving the problems, the invention provides a method for manufacturing a mini-LED display screen, which comprises the following steps:
(1) providing a first substrate, wherein a plurality of bonding pads are formed on the upper surface of the first substrate, and a first wiring layer is formed on the lower surface of the first substrate;
(2) flip-chip mounting a plurality of mini-LEDs on the lower surface of the first substrate, and sealing the plurality of mini-LEDs by using a plastic sealing layer, wherein the sealing layer comprises a plurality of sealing blocks in an inverted trapezoid shape, and each sealing block comprises a first inclined side face;
(3) forming a plurality of vias in the first substrate, the plurality of vias penetrating the plurality of pads and the first wiring layer;
(4) providing a second substrate, and sequentially forming a plurality of TFT layers and an adhesive layer on the upper surface of the second substrate, wherein a second wiring layer is arranged between the adhesive layer and the TFT layers, a plurality of openings are formed in the adhesive layer, the second wiring layer is exposed out of the openings, and the openings are in one-to-one correspondence with the through holes;
(5) forming a plurality of windows of an inverted trapezoid in the plurality of TFT layers and the adhesion layer, the plurality of windows each including a second inclined side;
(6) pressing the lower surface of the first substrate and the bonding layer to enable the plurality of sealing blocks to respectively slide into the plurality of windows, wherein the first inclined side face is tightly attached to the second inclined side face;
(7) a plurality of solder components are formed by filling solder through the plurality of through holes, the plurality of solder components filling the plurality of openings.
Wherein the plurality of TFT layers include a plurality of TFTs having sources or drains electrically connected to the second wiring layer.
In step (6), the first inclined side surfaces of the plurality of sealing blocks are attached to the second inclined side surfaces of the plurality of windows, and then the plurality of sealing blocks are gradually slid into the plurality of windows until the first wiring layer is attached to the adhesive layer.
In the step (1), a dielectric layer is formed on the lower surface of the first substrate, the first wiring layer is formed in the dielectric layer, and the first wiring layer and the dielectric layer have a flush surface.
The bottom surfaces of the plurality of windows are exposed out of the second substrate, and a certain gap is reserved between the plurality of sealing blocks and the second substrate.
The first substrate is a test substrate, and the test substrate comprises a heat dissipation substrate.
Wherein the second substrate is a transparent substrate.
Wherein the sealing layer comprises fluorescent materials of different colors.
Wherein the bonding layer is a thermosetting material.
The invention also provides a display screen according to the manufacturing method.
According to the invention, a first substrate and a second substrate are respectively integrated with a mini-LED and a TFT, and then are assembled to form a display device, which can be respectively manufactured and tested; and a test end is formed on the first substrate, the test end is not only a test terminal but also a connecting part for electrically connecting the first substrate and the second substrate circuit, and the test position is close to the connecting position, so that the test accuracy is ensured, and the light-emitting element which has defects and cannot normally operate is convenient to repair.
Drawings
FIGS. 1-3 are schematic diagrams of fabrication of a light emitting cell;
FIGS. 4-5 are schematic diagrams of the manufacture of the control unit;
fig. 6-8 are schematic diagrams illustrating the manufacture of the display screen combined by the light emitting unit and the control unit.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be described clearly and completely with reference to the drawings of the embodiments of the present disclosure. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without any inventive step, are within the scope of protection of the disclosure.
Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
The invention integrates a mini-LED and a TFT respectively by utilizing a first substrate and a second substrate, and then the mini-LED and the TFT are assembled to form the display device. A display panel and a method of manufacturing the same according to the disclosed embodiments of the invention will be described in detail with reference to the accompanying drawings.
First, please refer to fig. 1, fig. 2, and fig. 3, which are schematic diagrams illustrating a manufacturing process of a light emitting unit. Referring to fig. 1, a first substrate 200 is provided, the first substrate 200 preferably being a heat dissipating substrate, such as a ceramic substrate, LTCC substrate, etc., which can enable rapid heat dissipation from a mini-LED chip integrated on the first substrate 200.
The first substrate 200 has conductive patterns on both its upper surface having a plurality of pads 204 thereon and its lower surface having a first wiring layer. The pads 204 are vertically arranged corresponding to the first wiring layer, and the pads 204 are arranged in an array manner. The material of the plurality of pads 204 is preferably copper.
The first wiring layer comprises a first conductive end 201 and a second conductive end 202, and the first conductive end 201 and the second conductive end 202 are respectively formed to be electrically connected with the positive electrode and the negative electrode of the subsequent mini-LED chip. The first wiring layer is formed in a dielectric layer 203, and the dielectric layer 203 may be an inorganic material such as silicon nitride or silicon oxide. The surface of the dielectric layer 203 is flush with the surface of the first wiring layer, and the arrangement is to ensure the tightness of subsequent lamination.
Referring to fig. 2, a plurality of mini-LEDs 206 are flip-chip mounted on the lower surface of the first substrate 200, and the mini-LEDs 206 are arranged in an array with a certain interval. The mini-LEDs 206 are respectively flip-chip mounted on the first wiring layer of the first substrate 200 and electrically connected to the first and second conductive terminals 201 and 202.
Next, the sealing layer 207 is formed by injection molding, laminating, or the like, and the sealing layer 207 includes fluorescent materials of different colors. The sealing layer 207 includes a plurality of discrete sealing blocks, the sealing blocks respectively correspond to the plurality of mini-LEDs 206 one by one, and are in an inverted quadrangular prism shape, the cross section of the sealing block has an inverted trapezoidal structure, and the sealing block has first inclined side surfaces 208 with the same inclination angle. The angle of inclination of the first inclined side 208 may be 45-75 degrees.
Referring to fig. 3, a plurality of vias 209 are formed in the first substrate 200, the plurality of vias 209 penetrating the plurality of pads 204 and the first wiring layer. The plurality of vias 209 are vertical cylindrical vias that pass through the pad 204, the first substrate 200, and the first or second conductive terminal 201 or 202, respectively, from top to bottom. The sidewalls of the vias 209 are made of the material of the pad 204, the first substrate 200, and the first conductive terminal 201 or the second conductive terminal 202. Therefore, the test signal is shorter, the material is saved, and the test accuracy is ensured.
To this end, the light emitting unit has been manufactured, which may be finally seen in fig. 3.
Next, please refer to fig. 4 and 5, which are schematic diagrams illustrating a manufacturing process of the control unit. Referring to fig. 4, a second substrate 100 is provided, the second substrate 100 may be flexible, and the second substrate 100 may be formed of any suitable insulating material having flexibility. For example, the resin composition may be formed of a polymer material such as Polyimide (PI), Polycarbonate (PC), Polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), Polyarylate (PAR), or glass Fiber Reinforced Plastic (FRP). The second substrate 100 may also be rigid, such as glass. The second substrate 100 should be a transparent material so that the light emitted from the mini-LED can be projected.
The active layer 101 may be an amorphous silicon material, a polysilicon material, a metal oxide material, or the like. When the active layer 101 is made of a polysilicon material, a low-temperature amorphous silicon technology may be used, that is, the amorphous silicon material is melted by the laser to form a polysilicon material. In addition, various methods such as a Rapid Thermal Annealing (RTA) method, a Solid Phase Crystallization (SPC) method, an Excimer Laser Annealing (ELA) method, a Metal Induced Crystallization (MIC) method, a Metal Induced Lateral Crystallization (MILC) method, or a Sequential Lateral Solidification (SLS) method may also be used. The active layer 101 further includes source and drain regions formed by doping N-type impurity ions or P-type impurity ions, and a channel region is formed between the source and drain regions.
The first insulating layer 102 on the active layer 101 includes an inorganic layer such as silicon oxide, silicon nitride, and may include a single layer or a plurality of layers.
The gate line 103 on the first insulating layer 102 may include a single layer or a plurality of layers of gold (Au), silver (Ag), copper (Cu), nickel (Ni), platinum (Pt), palladium (Pd), aluminum (Al), Molybdenum (MO), or chromium (Cr), or a material such as aluminum (Al): neodymium (Nd) alloy and Molybdenum (MO) alloy, tungsten (W) alloy.
The second insulating layer 104 on the gate line 103 may be formed of an inorganic layer of silicon oxide, silicon nitride, or the like. Of course, in other alternative embodiments of the present invention, the second insulating layer 104 may be formed of an organic insulating material.
The source- drain electrodes 105, 106 located in the second insulating layer 104 of the first insulating layer 102 are electrically connected (or bonded) to the source and drain regions through contact holes.
A plurality of TFT layers and an adhesive layer 108 are sequentially formed on the upper surface of the second substrate 100. The TFT layer includes a first insulating layer 102 and a second insulating layer 104 and a plurality of thin film transistors. The thin film transistor includes an active layer 101 on a second substrate 100, a gate line 103 on a first insulating layer 102, and source and drain electrodes 105, 106 in the first and second insulating layers 102, 104.
A second wiring layer 107 is included between the adhesive layer 108 and the plurality of TFT layers, wherein the source- drain electrodes 105 and 106 are electrically connected to the second wiring layer 107. The adhesive layer 108 has a plurality of openings therein, which expose the second wiring layer and correspond to the plurality of through holes 209 on the first substrate 200 one to one.
Referring to fig. 5, a plurality of windows 109 of an inverted trapezoid shape are formed in the plurality of TFT layers and the adhesive layer 108, and the bottom of the windows 109 exposes the second substrate 100. The plurality of windows 109 are provided in one-to-one correspondence with the shape and position of the plurality of seal blocks, and the plurality of windows 109 are located between the thin film transistors.
Wherein, the plurality of windows 109 each include a second inclined side 110, and the angle of inclination of the second inclined side 110 is the same as the angle of inclination of the first inclined side 208, so as to facilitate alignment and faster sliding into the press-fit. Preferably, the depth of the plurality of fenestrations 109 may be greater than the thickness of the plurality of sealing blocks, which is advantageous as will be described later.
The control unit has been manufactured to completion so far, which can finally be seen in fig. 5.
And finally, carrying out a pressing step of the two substrates. Fig. 6-8 are schematic diagrams illustrating the manufacture of the display screen combined by the light emitting unit and the control unit.
Referring to fig. 6, the lower surface of the first substrate 200 is aligned with the upper surface of the second substrate 100 such that the bottom ends of the plurality of sealing blocks are embedded in the plurality of windows 109, and at this time, the lower surface of the first substrate 200 is not attached to the upper surface of the adhesive layer 108.
Referring to fig. 7, the bonding process is continued, the first inclined side surfaces 208 of the plurality of sealing blocks are attached to the second inclined side surfaces 110 of the plurality of windows 109, and then the plurality of sealing blocks are gradually slid into the plurality of windows 109 until the first wiring layer is attached to the adhesive layer 108, and the plurality of sealing blocks are respectively slid into the plurality of windows 109. At this time, the first inclined side 208 and the second inclined side 110 are closely attached. At this time, the plurality of through holes 209 correspond to the plurality of openings in the adhesive layer 108, respectively.
Preferably, the depth of the plurality of windowed blocks 109 may be greater than the thickness of the plurality of sealing blocks, so that a certain gap 301 is left between the plurality of sealing blocks and the second substrate 100. The gap 301 prevents heat of the mini-LED from being conducted into the second substrate 100, so that the light-emitting surface is uneven and severe delamination is caused.
Finally, referring to fig. 8, a plurality of solder assemblies 300 are formed by filling solder through the plurality of vias 209, the plurality of solder assemblies 300 filling the plurality of openings and the plurality of vias 209. The plurality of solder assemblies 300 not only enable the first wiring layer to be electrically connected to the second wiring layer 107, namely the mini-LED is controlled by the TFT unit, but also can provide a test terminal for the backlight surface of the display screen, and can accurately position the mini-LED for detection.
According to the manufacturing method of the display screen, the invention also provides the display screen, which at least comprises the first substrate 200, the second substrate 100, and the plurality of TFTs and the plurality of mini-LEDs which are arranged at intervals between the first substrate 200 and the second substrate 100. The plurality of TFTs and the plurality of mini-LEDs are electrically connected through the plurality of solder assemblies 300 in the method, so that the mini-LED arrays controlled by the TFTs respectively are realized.
The expressions "exemplary embodiment," "example," and the like, as used herein, do not refer to the same embodiment, but are provided to emphasize different particular features. However, the above examples and exemplary embodiments do not preclude their implementation in combination with features of other examples. For example, even in a case where a description of a specific example is not provided in another example, unless otherwise stated or contrary to the description in the other example, the description may be understood as an explanation relating to the other example.
The terminology used in the present invention is for the purpose of illustrating examples only and is not intended to be limiting of the invention. Unless the context clearly dictates otherwise, singular expressions include plural expressions.
While example embodiments have been shown and described, it will be apparent to those skilled in the art that modifications and changes may be made without departing from the scope of the invention as defined by the claims.

Claims (10)

1. A manufacturing method of a mini-LED display screen comprises the following steps:
(1) providing a first substrate, wherein a plurality of bonding pads are formed on the upper surface of the first substrate, and a first wiring layer is formed on the lower surface of the first substrate;
(2) flip-chip mounting a plurality of mini-LEDs on the lower surface of the first substrate, and sealing the plurality of mini-LEDs by using a plastic sealing layer, wherein the sealing layer comprises a plurality of sealing blocks in an inverted trapezoid shape, and each sealing block comprises a first inclined side face;
(3) forming a plurality of vias in the first substrate, the plurality of vias penetrating the plurality of pads and the first wiring layer;
(4) providing a second substrate, and sequentially forming a plurality of TFT layers and an adhesive layer on the upper surface of the second substrate, wherein a second wiring layer is arranged between the adhesive layer and the TFT layers, a plurality of openings are formed in the adhesive layer, the second wiring layer is exposed out of the openings, and the openings are in one-to-one correspondence with the through holes;
(5) forming a plurality of windows of an inverted trapezoid in the plurality of TFT layers and the adhesion layer, the plurality of windows each including a second inclined side;
(6) pressing the lower surface of the first substrate and the bonding layer to enable the plurality of sealing blocks to respectively slide into the plurality of windows, wherein the first inclined side face is tightly attached to the second inclined side face;
(7) a plurality of solder components are formed by filling solder through the plurality of through holes, the plurality of solder components filling the plurality of openings.
2. The method of manufacturing a mini-LED display screen according to claim 1, wherein a plurality of TFTs are included in the plurality of TFT layers, and source electrodes or drain electrodes of the plurality of TFTs are electrically connected to the second wiring layer.
3. The method of manufacturing a mini-LED display screen according to claim 1 or 2, wherein in the step (6), the first inclined side surfaces of the plurality of sealing blocks are attached to the second inclined side surfaces of the plurality of windows, and then the plurality of sealing blocks are gradually slid into the plurality of windows until the first wiring layer is attached to the adhesive layer.
4. The method for manufacturing a mini-LED display screen according to any one of claims 1 to 3, wherein in the step (1), a dielectric layer is formed on the lower surface of the first substrate, the first wiring layer is formed in the dielectric layer, and the first wiring layer and the dielectric layer have flush surfaces.
5. The method of claim 1, wherein the second substrate is exposed from the bottom surfaces of the plurality of windows, and a gap is left between the plurality of sealing blocks and the second substrate.
6. The method of manufacturing a mini-LED display screen according to claim 1, wherein the first substrate is a test substrate, the test substrate including a heat dissipation substrate.
7. The method of manufacturing a mini-LED display screen according to claim 6, wherein the second substrate is a transparent substrate.
8. The method of manufacturing a mini-LED display screen according to claim 1, wherein the sealing layer includes fluorescent materials of different colors.
9. The method of manufacturing a mini-LED display screen according to claim 1, wherein the adhesive layer is a thermosetting material.
10. A mini-LED display screen formed by the method for manufacturing a mini-LED display screen according to any one of claims 1 to 9.
CN202010661811.1A 2020-07-10 2020-07-10 Display screen and manufacturing method thereof Active CN111769048B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010661811.1A CN111769048B (en) 2020-07-10 2020-07-10 Display screen and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010661811.1A CN111769048B (en) 2020-07-10 2020-07-10 Display screen and manufacturing method thereof

Publications (2)

Publication Number Publication Date
CN111769048A true CN111769048A (en) 2020-10-13
CN111769048B CN111769048B (en) 2022-01-04

Family

ID=72726293

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010661811.1A Active CN111769048B (en) 2020-07-10 2020-07-10 Display screen and manufacturing method thereof

Country Status (1)

Country Link
CN (1) CN111769048B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014059601A1 (en) * 2012-10-16 2014-04-24 深圳市柔宇科技有限公司 Oled mosaic display screen and manufacturing method thereof
CN107393940A (en) * 2017-09-06 2017-11-24 严光能 LED display device and its manufacture method
CN109004078A (en) * 2018-07-27 2018-12-14 上海天马微电子有限公司 Miniature L ED display panel, manufacturing method thereof and display device
CN109300932A (en) * 2018-11-12 2019-02-01 严光能 Light-emitting diode display and preparation method thereof
WO2019220246A1 (en) * 2018-05-18 2019-11-21 株式会社半導体エネルギー研究所 Display device, display module, electronic apparatus, and display device manufacturing method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014059601A1 (en) * 2012-10-16 2014-04-24 深圳市柔宇科技有限公司 Oled mosaic display screen and manufacturing method thereof
CN107393940A (en) * 2017-09-06 2017-11-24 严光能 LED display device and its manufacture method
WO2019220246A1 (en) * 2018-05-18 2019-11-21 株式会社半導体エネルギー研究所 Display device, display module, electronic apparatus, and display device manufacturing method
CN109004078A (en) * 2018-07-27 2018-12-14 上海天马微电子有限公司 Miniature L ED display panel, manufacturing method thereof and display device
CN109300932A (en) * 2018-11-12 2019-02-01 严光能 Light-emitting diode display and preparation method thereof

Also Published As

Publication number Publication date
CN111769048B (en) 2022-01-04

Similar Documents

Publication Publication Date Title
US11488987B2 (en) Display substrate, splicing screen and manufacturing method thereof
CN107302011B (en) Display device
KR101789145B1 (en) LED electro-optic panel for transparent display and manufacturing method therefor
US8044426B2 (en) Light emitting device capable of removing height difference between contact region and pixel region and method for fabricating the same
US12046591B2 (en) Light-emitting substrate, method of manufacturing light-emitting substrate, and display device
TWI748166B (en) Electronic device and manufacturing method of the same
CN110071068B (en) Display device and method for manufacturing the same
CN111489992B (en) Manufacturing method of display substrate, display substrate and display device
US10748884B2 (en) Electronic device with common electrode
US20200185483A1 (en) Organic light emitting diode array substrate and electronic device
KR101830300B1 (en) Organic light emitting diode display and manufacturing method thereof
CN111584507B (en) Display panel, manufacturing method thereof and display terminal
CN113380849A (en) Display panel and manufacturing method thereof
CN112599537A (en) Display substrate and preparation method thereof
CN112291923A (en) Circuit board, lamp panel, backlight module and display device
US10573597B1 (en) Electronic device and manufacturing method thereof
CN111769048B (en) Display screen and manufacturing method thereof
CN108831892B (en) Display back plate, manufacturing method thereof, display panel and display device
CN110660824A (en) Electronic device and method for manufacturing the same
US20240122000A1 (en) Display panel and display terminal
US11497123B2 (en) Display device
KR100731547B1 (en) Integration method of organic field effect transistor and organic light emitting diodes
CN110047990B (en) Conductive film, photoelectric semiconductor device and manufacturing method thereof
CN110226229B (en) Display device structure
US11948928B2 (en) Display apparatus and manufacturing method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right

Effective date of registration: 20211210

Address after: 518100-02-12, floor 2, block B, No. 196, Tangtou Avenue, Shixin community, Shiyan street, Bao'an District, Shenzhen, Guangdong

Applicant after: Shenzhen Shuangyu Shengtai Technology Co.,Ltd.

Address before: 1506, Huiyuan Building, 38 Huaneng Road, Lixia District, Jinan City, Shandong Province

Applicant before: Shandong Aosheng Intelligent Technology Co.,Ltd.

TA01 Transfer of patent application right
GR01 Patent grant
GR01 Patent grant