CN111739838A - 一种抗辐射的soi材料的制备方法 - Google Patents

一种抗辐射的soi材料的制备方法 Download PDF

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CN111739838A
CN111739838A CN202010578947.6A CN202010578947A CN111739838A CN 111739838 A CN111739838 A CN 111739838A CN 202010578947 A CN202010578947 A CN 202010578947A CN 111739838 A CN111739838 A CN 111739838A
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silicon
soi material
radiation
buried oxide
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毕大炜
胡志远
张正选
邹世昌
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Shanghai Institute of Microsystem and Information Technology of CAS
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    • H—ELECTRICITY
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Abstract

本发明涉及一种抗辐射的SOI材料的制备方法，包括：采用局域性离子注入的方式制备抗辐射的SOI材料。本发明顶层硅离子注入损伤小，局域性离子注入，其它部分不被注入，顶层硅晶格结构完整，成为后续退火修复的籽晶区域，退火后顶层硅晶格质量完整，均匀性好。

Description

一种抗辐射的SOI材料的制备方法
技术领域
本发明属于SOI材料的制备领域，特别涉及一种抗辐射的SOI材料的制备方法。
背景技术
SOI(Silicon On Insulator)材料是一种具有“顶层硅/埋氧层/衬底”独特三层结构的半导体材料，顶层单晶硅薄膜用来制造半导体器件，器件与衬底之间由一层埋氧层隔开。SOI技术作为一种全介质隔离技术，与体硅技术相比，具有低功耗、抗辐射能力强、集成密度高、速度快、工艺简单、抗干扰能力强、消除了闩锁效应等优点。但也由于埋氧层的存在，SOI器件的抗总剂量辐射能力很差。当SOI器件遭受电离辐射时，会导致埋氧层中产生净的正电离累积，导致SOI NMOS器件的背栅阈值电压降低和器件关态漏电流增加，影响SOI电路的可靠性甚至导致失效。
目前，提高SOI器件抗总剂量辐射能力的方法主要是通过对SOI材料进行加固，主要有两种方式。一是将硅离子直接注入到已制备完成的SOI材料的埋氧层中并退火，该方法能够在埋氧层中产生硅纳米晶体，引入电子陷阱来俘获辐射产生的电子，补偿埋氧层中累积的空穴。二是在SOI材料的制备过程当中，先在埋氧层通过离子注入或CVD的方法产生硅纳米晶体，再键合制成SOI材料。
但上述两种方法都存在着一些固有问题：方法一对SOI材料进行全局的离子注入，会导致顶层硅产生全局性注入损伤，注入后顶层硅内缺乏完整的籽晶区域，因此注入损伤难以通过后续的高温退火完全修复。方法二是在SOI材料制备的过程中引入硅纳米晶形成工艺，此种方法增加了SOI材料制造的工艺步骤和工艺难度，会影响材料顶层硅薄膜的均匀性和晶格质量。并且上述两种方法都是对SOI材料进行全局性加固，后续无论SOI NMOS器件还是SOI PMOS器件的埋氧层中均有硅纳米晶，但实际上只有NMOS器件才对总剂量辐射严重敏感，PMOS器件实际上是不需加固的。
发明内容
本发明所要解决的技术问题是提供一种抗辐射的SOI材料的制备方法，克服现有技术产生无法完全恢复的顶层硅晶格注入损伤或降低顶层硅薄膜均匀性和晶格质量的技术缺陷，本发明中采用局域性离子注入的方式制备抗辐射的SOI材料、器件。
本发明的一种抗辐射SOI材料的制备方法，包括：
提供依次设有衬底硅、埋氧层、顶层硅的SOI材料，硅离子注入到SOI材料的埋氧层中，高温退火，所述硅离子注入前进行光刻。
所述硅离子注入工艺具体为：
1)采用各类离子注入机，包括并不限于中束流、大束流、高能离子注入机，将硅离子注入到光刻后未去胶前的SOI材料的埋氧层中。
2)注入离子种类为硅离子。包括Si28和Si29同位素，包括并不限于1价或2价等不同电荷态的硅离子。
3)注入能量根据目标SOI材料的顶层硅和埋氧层厚度决定。通常在5～300Kev范围内。
4)注入剂量。根据SOI材料不同等级的抗辐射性能要求，通常在1×1013/cm2-1×1018/cm2间。
所述高温退火具体为：高温退火的温度范围为800℃至1300℃，退火的气氛为氮气、氩气、氧气中任意一种或几种混合物，退火的时间范围为0.5小时至10小时。
所述光刻工艺具体为：
1)涂胶：在SOI材料全局表面涂布光刻胶；
2)光刻：采用一层光刻掩膜版，定义出后续流片的所有SOI NMOS晶体管的有源区，并去除该有源区上方的光刻胶；
3)离子注入：对SOI材料进行全局硅离子注入，由于光刻胶的阻挡层作用，只有SOINMOS晶体管的有源区下方的埋氧层中才被注入硅离子；
4)去胶：去除SOI材料顶层的剩余光刻胶。
本发明提供一种所述方法制备的抗辐射SOI材料。
本发明提供一种基于所述材料的SOI器件，所述器件包括PMOS器件和NMOS器件。
所述器件中只有SOI NMOS晶体管的有源区下方的埋氧层中含有硅纳米晶，而PMOS晶体管和其他种类的器件有源区均不含有硅纳米晶。
本发明提供一种所述SOI器件的应用。
有益效果
(1)本发明顶层硅离子注入损伤小，局域性离子注入，其它不被注入部分的顶层硅晶格结构完整，成为后续退火修复的籽晶区域，退火后顶层硅晶格质量完整，均匀性好。对顶层硅晶格结构进行TEM图观察，如图3所示，本发明局域化离子注入的SOI材料顶层硅的衍射光斑更明亮，原子排列更有序且晶向明显可见，顶层硅/BOX层界面更为清晰陡峭，样品的顶层硅晶格质量更优。
(2)本发明能承受更大能量和剂量的离子注入工艺，从而制备抗辐射性能更强的SOI晶体管。
(3)本发明的局域性选择性加固，只针对SOI NMOS晶体管区域进行抗辐射加固，PMOS晶体管区域无需加固，因此也屏蔽了加固工艺对PMOS管和其它类型器件的电学特性的影响。
(4)本发明方法采用硅离子注入到SOI材料的埋氧层中并结合后续高温退火产生硅纳米晶体。但与如图2所述方法的主要不同之处在于，硅离子的注入是局域化的，在注入前加入一道光刻工艺，使得硅离子只注入到SOI NMOS晶体管的有源区下方的埋氧层中，而PMOS晶体管和其他种类的器件有源区均不会被注入硅离子。
附图说明
图1为本发明的局域化离子注入制备抗辐射SOI材料的流程图；
图2为现有全局离子注入制备抗辐射SOI材料的流程图；
图3为同样较大剂量和能量条件下(a)对比例1全局离子注入的SOI材料顶层硅TEM图(b)实施例1局域化离子注入的SOI材料顶层硅TEM图；
图4为(a)普通样品与(b)加固样品(指实施例1制备的MOS器件)的NMOS(W/L＝10μm/0.35μm)器件在不同总剂量辐照后的前栅转移特性曲线；
图5为(a)普通样品与(b)加固样品的NMOS(W/L＝10μm/0.35μm)器件在不同总剂量辐照后的背栅转移特性曲线；
图6为普通样品与加固样品背栅主晶体管在不同总剂量辐照后的阈值电压漂移量。
其中上述普通样品，均是指采购自日本SEH公司的SOI材料(ShinEtsu-200mm-
Figure BDA0002551708830000031
)，该材料采用Smart-cut技术制备而成，材料的顶层硅和埋氧层厚度为100nm/400nm，在该SOI材料上直接采用SOI工艺流片制备的SOI MOS晶体管；加固样品均为实施例1获得的样品。
具体实施方式
下面结合具体实施例，进一步阐述本发明。应理解，这些实施例仅用于说明本发明而不用于限制本发明的范围。此外应理解，在阅读了本发明讲授的内容之后，本领域技术人员可以对本发明作各种改动或修改，这些等价形式同样落于本申请所附权利要求书所限定的范围。
实施例1
SOI材料采购自日本SEH公司的成熟商业化产品，该材料采用Smart-cut技术制备而成，材料的顶层硅和埋氧层厚度为100nm/400nm，对该SOI材料先进行涂胶光刻，再进行局部离子注入，注入离子种类为28Si+，注入能量200KeV，注入剂量1.5×1017/cm2，注入后进行去胶清洗，然后在氩气环境下，1100℃高温退火2小时。之后采用SOI工艺流片制备SOI MOS晶体管，并进行晶体管的电学性能测试和辐射性能测试。
其中上述对该SOI材料进行涂胶光刻，再进行局部离子注入具体步骤为：在SOI材料全局表面涂布光刻胶，然后采用一层光刻掩膜版，定义出后续流片的所有SOI NMOS晶体管的有源区，并去除该有源区上方的光刻胶；然后对SOI材料进行全局硅离子注入，由于光刻胶的阻挡层作用，只有SOI NMOS晶体管的有源区下方的埋氧层中才被注入硅离子，注入后去除剩余光刻胶。
对比例1
SOI材料采购自日本SEH公司的成熟商业化产品，该材料采用Smart-cut技术制备而成，材料的顶层硅和埋氧层厚度为100nm/400nm，对该SOI材料进行全局离子注入，注入离子种类为28Si+，注入能量200KeV，注入剂量1.5×1017/cm2，注入后在氩气环境下，1100℃高温退火2小时。之后采用SOI工艺流片制备SOI MOS晶体管，并进行晶体管的电学性能测试。
如图3所示为同样较大剂量和能量条件下(a)全局离子注入的SOI材料顶层硅TEM图(b)局域化离子注入的SOI材料顶层硅TEM图，其中(b)图的衍射光斑更明亮，原子排列更有序且晶向明显可见，顶层硅/BOX层界面更为清晰陡峭，说明(b)样品的顶层硅晶格质量更优。
如图4所示，其中(a)和(b)分别给出了普通SOI材料制备的SOI NMOS晶体管与局域化抗辐射SOI材料制备的SOI晶体管NMOS器件在不同总剂量辐照前后的前栅转移特性曲线。如图4(a)所示，普通样品在受到500krad(Si)总剂量辐照后已出现量级为100pA的关态泄漏电流，750krad(Si)后漏电流更大，器件已无法正常关断。而如图4(b)所示，加固样品在总剂量辐照前后前栅的I-V曲线基本重合，1Mrad(Si)辐照后器件仍没有出现关态泄漏电流增大的现象。
普通样品与加固样品对应的背栅转移特性曲线在不同总剂量辐照后的变化如图5所示。由图5(a)可知，普通样品在受到500krad(Si)辐照后背栅曲线的亚阈值区已越过0V，这使得前栅晶体管出现明显的关态泄漏电流；而由图5(b)可知，加固样品的背栅I-V曲线在受到1Mrad(Si)辐照后仍处于0V右边，因此不会引起前栅晶体管的漏电。
如图6所示给出了普通NMOS晶体管样品与采用该技术制备的加固NMOS晶体管样品背栅主晶体管在不同总剂量辐照后的阈值电压漂移量。从图6中可以看出，加固样品与普通样品背栅阈值电压漂移量均随着辐照总剂量的增加而增加，但加固样品很快趋于饱和，而且相同总剂量辐照后加固样品阈值电压漂移量比普通样品更小。300krad(Si)与750krad(Si)辐照后，普通样品与加固样品背栅阈值电压漂移量分别为-15.2V，-8V以及-18.4V，-10.0V。实验结果表明，采用该技术制备的局域化SOI晶圆具有很好的抗辐射性能，其BOX层中引入的深电子陷阱能够在辐照过程中有效捕获电子而中和界面附近的固定正电荷，以抑制背栅阈值电压的负向漂移。
如表1为局域化抗辐射SOI材料制备的NMOS器件和全局化抗辐射SOI材料制备的NMOS器件的关键电学参数的片内差异性(3sigma)对比：
Figure BDA0002551708830000051
上表对比可以看出，局域化抗辐射SOI材料制备的NMOS器件的关键电学参数的片内差异性优于全局化抗辐射SOI材料制备的NMOS器件，且与普通SOI材料(未有注入损伤)的NMOS器件参数更为接近，说明局域化抗辐射SOI材料的顶层硅晶格质量比全局化抗辐射SOI材料的更好，与普通SOI材料接近。

Claims (9)

1.一种抗辐射SOI材料的制备方法，包括：
提供依次设有衬底硅、埋氧层、顶层硅的SOI材料，然后硅离子注入到SOI材料的埋氧层中，高温退火，其特征在于，所述硅离子注入前进行光刻。
2.根据权利要求1所述制备方法，其特征在于，所述光刻工艺具体为：
(1)在SOI材料全局表面涂布光刻胶；
(2)采用一层光刻掩膜版，定义出后续流片的所有SOINMOS晶体管的有源区，并去除该有源区上方的光刻胶；
(3)离子注入：对SOI材料进行全局硅离子注入，由于光刻胶的阻挡层作用，只有SOINMOS晶体管的有源区下方的埋氧层中才被注入硅离子；
(4)去除SOI材料顶层的剩余光刻胶。
3.根据权利要求1所述制备方法，其特征在于，所述硅离子注入工艺参数为：
采用离子注入机，将硅离子注入到光刻后未去胶前的SOI材料的埋氧层中；其中注入离子种类为硅离子；注入能量在5～300Kev；注入剂量在1×1013/cm2-1×1018/cm2。
4.根据权利要求3所述制备方法，其特征在于，所述硅离子为Si28和/或Si29同位素。
5.根据权利要1所述制备方法，其特征在于，所述高温退火的温度为800℃-1300℃，退火的气氛为氮气、氩气、氧气中的一种或几种，退火的时间为0.5小时-10小时。
6.一种权利要求1所述方法制备的抗辐射SOI材料。
7.一种基于权利要求6所述材料的SOI器件，其特征在于，所述器件包括PMOS器件和NMOS器件。
8.根据权利要求7所述SOI器件，其特征在于，所述器件中只有NMOS晶体管的有源区下方的埋氧层中含有硅纳米晶。
9.一种权利要求7所述SOI器件的应用。
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