CN111431394A - Novel step-down single-phase three-level bridgeless PFC converter system - Google Patents

Abstract

The invention discloses a novel step-down single-phase three-level bridgeless PFC converter system, which utilizes Buck topology circuit structure, IGBT without anti-parallel diode and corresponding circuit control to realize continuous inductor current mode (CCM) The single-phase bridgeless three-level power factor correction function achieves the effect of low total harmonic distortion, high power factor and efficient and stable operation.

Description

A Novel Buck Single-Phase Three-Level Bridgeless PFC Converter System

technical field

The invention relates to the technical field of AC/DC power factor correction technology, in particular to a novel step-down single-phase three-level bridgeless PFC converter system.

Background technique

With the rapid development of power electronic technology, all kinds of electrical equipment have been popularized. However, the power electronic switching power supply equipment connected to the grid has become the main source of current harmonics injected into the grid. High-order current harmonics have seriously affected the power quality, transmission efficiency and safe operation of other equipment in the power grid. Therefore, relevant organizations at home and abroad have formulated relevant safety standards to limit the current harmonics of power systems. As an effective method to suppress high-order harmonic current and improve power factor, power factor correction has become an indispensable part of medium and high power electronic equipment.

Power factor correction circuits are divided into passive power factor correction (PPFC) and active power factor correction (APFC). APFC is widely used due to its small size and high PF value. The traditional power factor correction circuit is represented by the boost active power factor correction converter (Boost APFC), which is widely used because of its simple structure, safety and stability. However, under the condition of a wide range of input voltage, the traditional Boost APFC converter has lower efficiency at low voltage input than at high voltage input, and the output voltage is higher, which requires higher voltage stress on the power devices of the later stage equipment. Due to the existence of the front-stage rectifier bridge, excessive energy loss is caused, especially at low voltage and high power, the on-state loss of the diode is more obvious, which greatly limits the improvement of the overall efficiency of the converter.

In order to solve the problems caused by the traditional Boost APFC converter, some scholars have proposed a bridgeless Buck PFC converter. The bridgeless Buck scheme replaces the bridge arm diode with a switch tube, reduces the loss of the switching device in the conduction path, and realizes the step-down For the purpose of output, the voltage stress requirement of the power device of the post-stage circuit is reduced, thereby reducing the cost and improving the work efficiency. However, when the bridgeless Buck PFC converter has a low voltage input, since the output voltage is higher than the input voltage, there is a certain dead angle of the input current, which will deteriorate the harmonic and power factor values of the input current.

SUMMARY OF THE INVENTION

The purpose of the present invention is to overcome the deficiencies of the prior art, and to provide a new type of step-down single-phase three-level bridgeless PFC converter system, which utilizes Buck topology circuit structure, IGBT without anti-parallel diode, and control by corresponding circuit. , to achieve the function of inductor current continuous mode (CCM) single-phase bridgeless three-level power factor correction (Power FactorCorrection, PFC), to achieve the effect of low total harmonic distortion, high power factor and efficient and stable work.

For achieving the above object, the technical scheme provided by the present invention is:

A novel step-down single-phase three-level bridgeless PFC converter system, comprising a single-phase three-level bridgeless PFC converter circuit and a control circuit;

The control circuit is connected with the single-phase three-level bridgeless PFC converter circuit, and obtains its input voltage V _in , output voltage V _out , and inductor current _IL sampling data from the single-phase three-level bridgeless PFC converter circuit;

Wherein, the single-phase three-level bridgeless PFC converter circuit includes a power inductor L, power MOSFETs S ₁ , S ₂ , IGBTs S ₃ and S ₄ without anti-parallel diodes, output filter capacitors C _o1 , C _o2 and load R;

_The S pole of the power MOSFET S1 is connected with the S pole _of the power MOSFET S2, and the G pole of the power MOSFET _S1 is connected with the G pole of the power MOSFET S2 _;

_The D pole of the power MOSFET S2, the _S pole of the IGBT S3 without the anti _- parallel diode, and the D pole of the IGBT S4 without the anti-parallel diode are all connected to one end of the power inductor L, and the other end of the power inductor L is connected. Connect to one end of the output filter capacitors C _o1 and C _o2 respectively;

The input current passes through the power MOSFETs S ₁ , S ₂ and the power inductor L, and then forms a loop through the neutral line;

The other end of the output filter capacitor C _o2 is connected to the D pole of the IGBT S ₃ without an anti-parallel diode, and the power inductor L, the output filter capacitor C _o2 , and the IGBT S ₃ without an anti-parallel diode form a loop;

The other end of the output filter capacitor C _o1 is connected to the S pole of the IGBT S ₄ without the anti-parallel diode, and the power inductor L, the output filter capacitor C _o1 , and the IGBT S ₄ without the anti-parallel diode form a loop;

The load R is connected in series with the output filter capacitors C _o1 and C _o2 .

Further, the control circuit is generated by an auxiliary power supply module, an input voltage detection module, an output voltage sampling module, an inductor current sampling module, a first drive circuit module, a second drive circuit module, a third drive circuit module, and a PWM drive signal. Circuit module, comparator, adder, integrator, error amplifier;

Wherein, the input voltage detection module and the output voltage sampling module are respectively connected with the corresponding voltage input terminal and voltage output terminal in the single-phase three-level bridgeless PFC converter circuit;

The first driving circuit module is connected with the PWM driving signal generating circuit module, and is used for driving the opening and closing _of the power MOSFETs S1 and S2 _;

The second drive circuit module and the third drive circuit module are respectively connected between the input voltage detection module and the PWM drive signal generation circuit module, and are respectively used to drive the opening and closing of the IGBTs S3 and S4 without anti _- parallel diodes _;

The output voltage sampling module, error amplifier, adder, comparator, and PWM drive signal generating circuit module are connected in sequence;

the integrator is connected between the error amplifier and the comparator;

The inductor current sampling module is connected between one end of each power inductor and the adder.

Further, the input voltage detection module includes a conversion circuit, a bidirectional zener diode and an operational amplifier; wherein, the bidirectional zener diode is connected between the conversion circuit and the operational amplifier;

The conversion circuit is composed of first, second, third and fourth voltage dividing resistors R _1a , R _2a , R _3a and R _4a ;

One end of the first voltage dividing resistor _R1a is connected to the current input, and the other end is connected to the second voltage dividing resistor _R2a ;

One end of the fourth voltage dividing resistor R _4a is connected to the current input, and the other end is connected to the third voltage dividing resistor R _3a ;

The other end of the second voltage dividing resistor R _2a and the other end of the third voltage dividing resistor R _3a are grounded.

Compared with the prior art, the principle and advantages of this scheme are as follows:

This scheme utilizes Buck topology circuit structure, IGBT without anti-parallel diode and corresponding circuit control to realize the function of inductive current continuous mode (CCM) single-phase bridgeless three-level power factor correction to achieve low total harmonic distortion, The effect of high power factor and efficient and stable work.

Description of drawings

In order to illustrate the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the services required in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only For some embodiments of the present invention, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.

1 is a structural block diagram of a novel step-down single-phase three-level bridgeless PFC converter system of the present invention;

2 is a schematic diagram of a single-phase three-level bridgeless PFC converter in a novel step-down single-phase three-level bridgeless PFC converter system of the present invention;

Fig. 3 is one of the working modes of Fig. 2 during the positive half cycle of AC input;

Fig. 4 is the second working mode of Fig. 2 when the alternating current is input in the positive half cycle;

Fig. 5 is one of the working modes of Fig. 2 in the negative half cycle of AC input;

FIG. 6 is the second working mode of FIG. 2 when the alternating current is input in the negative half cycle;

7 is a schematic structural diagram of an input voltage detection module;

Fig. 8 is the waveform diagram of each key signal of the input voltage detection module;

Fig. 9 is the output voltage waveform diagram after simulation;

Figure 10 is the input voltage and input current waveform diagram after simulation;

Fig. 11 is the circuit diagram of the output voltage sampling module;

Fig. 12 is the circuit diagram of the inductor current sampling module;

13 is a circuit diagram of the first, second and third drive circuit modules;

FIG. 14 is a circuit diagram of a PWM drive signal generating circuit module.

Detailed ways

Below in conjunction with specific embodiment, the present invention will be further described:

As shown in FIG. 1 , a novel step-down single-phase three-level bridgeless PFC converter system described in this embodiment includes a single-phase three-level bridgeless PFC converter circuit 1 and a control circuit 2 two parts.

Further, as shown in FIG. 2 , in the first part, the single-phase three-level bridgeless PFC converter circuit 1 includes a power inductor L, power MOSFETs S ₁ and S ₂ , IGBTs S ₃ and S ₄ without anti-parallel diodes, Output filter capacitors C _o1 , C _o2 and load R.

_The S pole of the power MOSFET S1 is connected to the S _{pole of} the power MOSFET S2, and the G pole of the power MOSFET _S1 is connected to the G pole of the power MOSFET S2.

_The D pole of the power MOSFET S2, the _S pole of the IGBT S3 without the anti _- parallel diode, and the D pole of the IGBT S4 without the anti-parallel diode are all connected to one end of the power inductor L, and the other end of the power inductor L is respectively connected to the One ends of the output filter capacitors C _o1 and C _o2 are connected.

The input current passes through the power MOSFETs S ₁ , S ₂ , and the power inductor L, and then forms a loop through the neutral line.

The other end of the output filter capacitor C _o2 is connected to the D pole of the IGBT S ₃ without an anti-parallel diode, and the power inductor L, the output filter capacitor C _o2 , and the IGBT S ₃ without an anti-parallel diode form a loop.

The other end of the output filter capacitor C _o1 is connected to the S pole of the IGBT S ₄ without an anti-parallel diode, and the power inductor L, the output filter capacitor C _o1 , and the IGBT S ₄ without an anti-parallel diode form a loop.

The load R is connected in series with the output filter capacitors C _o1 and C _o2 .

In the second part, the control circuit 2 is connected to the single-phase three-level bridgeless PFC converter circuit 1, and the input voltage V _in , the output voltage V _out and the inductor current I are obtained from the single-phase three-level bridgeless PFC converter circuit 1. _L sampling data, specifically by the auxiliary power supply module 2-1, the input voltage detection module 2-2, the output voltage sampling module 2-3, the inductor current sampling module 2-4, the first driving circuit module 2-5, the second driving A circuit module 2-11, a third driving circuit module 2-12, a PWM driving signal generating circuit module 2-6, a comparator 2-7, an adder 2-8, an integrator 2-9, and an error amplifier 2-10 are composed.

The input voltage detection module 2-2 and the output voltage sampling module 2-3 are respectively connected to the corresponding voltage input terminals and voltage output terminals in the single-phase three-level bridgeless PFC converter circuit 1 .

The first driving circuit module 2-5 is connected with the PWM driving signal generating circuit module _2-6 , and is used for driving the opening and closing _of the power MOSFETs S1 and S2;

The second driving circuit module 2-11 and the third driving circuit module 2-12 are respectively connected between the input voltage detecting module 2-2 and the PWM driving signal generating circuit module 2-6, and are respectively used for driving the anti-parallel diodes without anti-parallel diodes. _The opening and closing _of IGBTs S3 and S4;

The output voltage sampling module 2-3, the error amplifier 2-10, the adder 2-8, the comparator 2-7, and the PWM drive signal generating circuit module 2-6 are connected in sequence.

The integrator 2-9 is connected between the error amplifier 2-10 and the comparator 2-7.

The inductor current sampling module 2-4 is connected between one end of each power inductor and the adder 2-8.

Specifically, as shown in FIG. 7 , the input voltage detection module 2-2 includes a conversion circuit, a bidirectional zener diode and an operational amplifier; the bidirectional zener diode is connected between the conversion circuit and the operational amplifier; the conversion circuit consists of the first, second, Three, four divider resistors R _1a , R _2a , R _3a , R _4a are composed; one end of the first divider resistor R _1a is connected to the current input, and the other end is connected to the second divider resistor R _2a ; the fourth divider resistor R One end of _4a is connected to the current input, and the other end is connected to the third voltage dividing resistor _R3a ; the other end of the second voltage dividing resistor _R2a and the other end of the third voltage dividing resistor _R3a are grounded.

The output voltage sampling module 2-3 is shown in Figure 11.

The inductor current sampling module 2-4 is shown in Figure 12.

The first, second, and third drive circuit modules 2-5, 2-11, and 2-12 are shown in FIG. 13 .

The PWM drive signal generating circuit module 2-6 is shown in Figure 14.

The working principle of control circuit 2 is as follows:

First, the output voltage sampling value is collected by the output voltage sampling module 2-3, and the output voltage sampling value v ₀ and the reference voltage v _ref are passed through the error amplifier 2-10 to obtain the error voltage value _vm , and the _vm value is sent all the way to the addition The _summation of the inductor 2-8 and the inductor current sampling value im to obtain the value of V ₁ , which is sent to the integrator 2-9 for integration to obtain the value of V ₂ , and finally V ₁ and V ₂ are sent to the comparator 2-7 to obtain the PWM The driving signals P ₁ and P ₂ , and the driving signals P ₁ and P ₂ are two complementary PWM signals.

Then, the input voltage V _in is sent to the input voltage detection module 2-2 to judge the polarity of the input voltage. If it is judged that V _in > 0, the second drive circuit module 2-11 outputs the drive signal P _S3 , and the first The third driving circuit module 2-12 does not output the driving signal; if it is determined that V _in <0, the third driving circuit module 2-12 outputs the driving signal S ₄ , and the second driving circuit module 2-11 does not output the driving signal at this time; In this way, the corresponding IGBTs S ₃ and S ₄ without anti-parallel diodes are turned on or off. The single-phase three-level bridgeless PFC converter circuit 1 can achieve the purpose of power factor correction through the precise control of the control circuit 2 .

In this embodiment, the detailed analysis of each working mode of the topology structure of the single-phase three-level bridgeless PFC converter circuit 1 is as follows:

1. In the positive half cycle of AC input, this stage can be divided into two working modes:

(1) Working mode one

When the AC input is a positive half cycle, the _first driving circuit module _2-5 drives the power MOSFETs S1 and S2 to be turned _on at the same time, and the IGBTs S3 and S4 without anti _- parallel diodes are turned off. The input current passes through the power MOSFETs S ₁ , S ₂ , the power inductor L, and then forms a loop through the neutral line to store the power inductor L. At the same time, the output filter capacitors C _o1 and C _o2 supply energy to the load R, and the working state of the circuit during this period is shown in Figure 3 .

(2) Working mode 2

When the power MOSFETs S ₁ and S ₂ are turned off at the same time, the input voltage detection module 2-2 detects that the AC input is a positive half cycle and V _in >0, and the second drive circuit module 2-11 outputs a PWM drive signal to the The IGBT S ₃ with the anti-parallel diode turns on the IGBT S ₃ without the anti-parallel diode. At this time, the power MOSFETs S ₁ and S ₂ and the IGBT S ₄ without the anti-parallel diode are turned off. The power inductor L releases energy, the inductor current decreases linearly, the current passes through the output filter capacitor C _o2 , and the IGBT S ₃ without the anti-parallel diode forms a loop to charge the filter capacitor C _o2 . At the same time, the output filter capacitors C _o1 and C _o2 supply energy to the load R, and the circuit operating state during this period is shown in Figure 4 .

2. In the negative half cycle of AC input, this stage can be divided into two working modes:

(1) Working mode three

When the AC input is a negative half cycle, the first driving circuit module 2-5 drives the power MOSFETs S ₁ and S ₂ to be turned on at the same time, and the IGBTs S ₃ and S ₄ without anti-parallel diodes are turned off. The input current passes through the power MOSFETs S ₁ , S ₂ , the power inductor L, and then forms a loop through the neutral line to store the power inductor L. At the same time, the output filter capacitors C _o1 and C _o2 supply energy to the load R, and the circuit operating state during this period is shown in Figure 5 .

(2) Working mode four

When the power MOSFETs S ₁ and S ₂ are turned off at the same time, the input voltage detection module 2-2 detects that the AC input is a negative half cycle and V _in <0, and the third drive circuit module 2-12 outputs a PWM drive signal to the The IGBT S ₄ with the anti-parallel diode turns on the IGBT S ₄ without the anti-parallel diode. At this time, the power MOSFETs S ₁ and S ₂ and the IGBT S ₃ without the anti-parallel diode are turned off. The power inductor L releases energy, the inductor current decreases linearly, the current passes through the output filter capacitor C _o1 , and the IGBT S ₄ without the anti-parallel diode forms a loop to charge the filter capacitor C _o1 . At the same time, the output filter capacitors C _o1 and C _o2 supply energy to the load R, and the circuit operating state during this period is shown in Figure 6 .

Because in the single-phase three-level bridgeless PFC converter circuit 1 topology in the embodiment, there are two common-source series-connected power MOSFETs S ₁ , S ₂ and two IGBTs S ₃ , S ₄ without anti-parallel diodes Therefore, it is necessary to judge the polarity of the input voltage, so as to determine that the corresponding IGBTs without anti-parallel diodes can be selected to work when the input voltages are of different polarities.

First, the alternating current V _in converts the input alternating voltage into a small-signal alternating current through the first and second voltage dividing resistors R _1a , R _2a , and the third voltage dividing resistor R _3a and the fourth voltage dividing resistor R _4a . At the same time, a bidirectional Zener diode (TVS) is added to protect the operational amplifier (OPAMP) when the circuit is abnormal. By comparing the two input terminals of OPAMP, it can be obtained whether the output signal u _in is high level or low level. When the AC voltage input is a positive half cycle, the potential of the non-inverting input terminal of OPAMP is positive, the potential of the input terminal of the reverse terminal is negative, and the OPAMP output High level; on the contrary, when the AC voltage input is a negative half cycle, OPAMP outputs a low level. In this way, the corresponding driving circuit is selected. The key signal waveforms of the input voltage detection module 2-2 are shown in Figure 8.

In order to prove the validity of this embodiment, the simulation software PSIM is used to simulate the example of the present invention, and the output voltage waveform shown in FIG. 9 and the input voltage and input current waveforms shown in FIG. 10 are obtained.

The above-mentioned embodiments are only preferred embodiments of the present invention, and are not intended to limit the scope of implementation of the present invention. Therefore, any changes made according to the shape and principle of the present invention should be included within the protection scope of the present invention.

Claims (3)

1. a novel step-down single-phase three-level bridgeless PFC converter system, is characterized in that, comprises single-phase three-level bridgeless PFC converter circuit (1) and control circuit (2); The control circuit (2) is connected to the single-phase three-level bridgeless PFC converter circuit (1), and the input voltage V _in and the output voltage V _out are obtained from the single-phase three-level bridgeless PFC converter circuit (1). , the sampling data of the inductor current _IL ; Wherein, the single-phase three-level bridgeless PFC converter circuit (1) includes a power inductor L, power MOSFETs S ₁ , S ₂ , IGBTs S ₃ and S ₄ without anti-parallel diodes, an output filter capacitor C _o1 , C _o2 and load R; _The S pole of the power MOSFET S1 is connected with the S pole _of the power MOSFET S2, and the G pole of the power MOSFET _S1 is connected with the G pole of the power MOSFET S2 _{; The} D pole of the power MOSFET S2, the _S pole of the IGBT S3 without the anti _- parallel diode, and the D pole of the IGBT S4 without the anti-parallel diode are all connected to one end of the power inductor L, and the other end of the power inductor L is connected. Connect to one end of the output filter capacitors C _o1 and C _o2 respectively; The input current passes through the power MOSFETs S ₁ , S ₂ and the power inductor L, and then forms a loop through the neutral line; The other end of the output filter capacitor C _o2 is connected to the D pole of the IGBT S ₃ without an anti-parallel diode, and the power inductor L, the output filter capacitor C _o2 , and the IGBT S ₃ without an anti-parallel diode form a loop; The other end of the output filter capacitor C _o1 is connected to the S pole of the IGBT S ₄ without the anti-parallel diode, and the power inductor L, the output filter capacitor C _o1 , and the IGBT S ₄ without the anti-parallel diode form a loop; The load R is connected in series with the output filter capacitors C _o1 and C _o2 . 2. A novel step-down single-phase three-level bridgeless PFC converter system according to claim 1, wherein the control circuit (2) is composed of an auxiliary power supply module (2-1), an input Voltage detection module (2-2), output voltage sampling module (2-3), inductor current sampling module (2-4), first drive circuit module (2-5), second drive circuit module (2-11) , a third drive circuit module (2-12), a PWM drive signal generation circuit module (2-6), a comparator (2-7), an adder (2-8), an integrator (2-9), an error amplifier (2-10) Composition; Wherein, the input voltage detection module (2-2) and the output voltage sampling module (2-3) are respectively connected to the corresponding voltage input terminal and voltage output terminal in the single-phase three-level bridgeless PFC converter circuit (1). ; The first driving circuit module (2-5) is connected with the PWM driving signal generating circuit module ( _2-6 ), and is used for driving the opening and closing _of the power MOSFETs S1 and S2; The second drive circuit module (2-11) and the third drive circuit module (2-12) are respectively connected between the input voltage detection module (2-2) and the PWM drive signal generation circuit module (2-6), They are used to drive the switching of IGBTs S3 and S4 without anti _- parallel diodes, respectively _; The output voltage sampling module (2-3), the error amplifier (2-10), the adder (2-8), the comparator (2-7), and the PWM drive signal generating circuit module (2-6) are connected in sequence; The integrator (2-9) is connected between the error amplifier (2-10) and the comparator (2-7); The inductor current sampling module (2-4) is connected between one end of each power inductor and the adder (2-8). 3. A new type of step-down single-phase three-level bridgeless PFC converter system according to claim 2, wherein the input voltage detection module (2-2) comprises a conversion circuit, a bidirectional Zener diode and an operational amplifier; wherein, the bidirectional zener diode is connected between the conversion circuit and the operational amplifier; The conversion circuit is composed of first, second, third and fourth voltage dividing resistors R _1a , R _2a , R _3a and R _4a ; One end of the first voltage dividing resistor _R1a is connected to the current input, and the other end is connected to the second voltage dividing resistor _R2a ; One end of the fourth voltage dividing resistor R _4a is connected to the current input, and the other end is connected to the third voltage dividing resistor R _3a ; The other end of the second voltage dividing resistor R _2a and the other end of the third voltage dividing resistor R _3a are grounded.

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