CN111244073A - 包括支撑衬底和堆叠的电子芯片的电子设备 - Google Patents

包括支撑衬底和堆叠的电子芯片的电子设备 Download PDF

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CN111244073A
CN111244073A CN201911181761.0A CN201911181761A CN111244073A CN 111244073 A CN111244073 A CN 111244073A CN 201911181761 A CN201911181761 A CN 201911181761A CN 111244073 A CN111244073 A CN 111244073A
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electronic chip
electrical connection
support substrate
chip
electronic
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D·加尼
J-M·里维雷
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STMicroelectronics SA
STMicroelectronics Grenoble 2 SAS
STMicroelectronics Asia Pacific Pte Ltd
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STMicroelectronics SA
STMicroelectronics Grenoble 2 SAS
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Abstract

本公开的实施例涉及包括支撑衬底和堆叠的电子芯片的电子设备。一种电子设备，包括支撑衬底，第一电子芯片和第二电子芯片以一个位于另一个顶部上的位置被安装到支撑衬底。第一电连接元件被插入在第一电子芯片和支撑衬底之间。第二电连接元件被插入在第二电子芯片和支撑衬底之间，并且位于距第一电子芯片的外围一定距离处。第三电连接元件被插入在第一电子芯片和第二电子芯片之间。

Description

包括支撑衬底和堆叠的电子芯片的电子设备
相关申请的交叉引用
本申请要求在2018年11月28日提交的编号为1872005的法国专利申请的优先权权益。内，其内容在法律允许的最大程度上以整体通过引用并入于此。
技术背景
实施例涉及包括堆叠的电子芯片的电子设备。
背景技术
已知电子设备包括电子芯片，电子芯片以一个在另一个顶部上而被粘合地接合，并且进一步被接合在支撑衬底的顶部上。芯片彼此偏置，并且通过电连接导线被电连接到支撑衬底。这样的布局在线被安装时呈现困难，并且特别地由于导线的长度而呈现缺陷，这样的布局会发生电损耗，并且其对相互和周围电磁效应敏感。
发明内容
根据一个实施例，所提出的是一种电子设备，该电子设备包括：支撑衬底，具有正面；至少一个第一电子芯片，位于支撑衬底顶部上，并且具有背面，该背面至少部分面向支撑衬底的正面；至少一个第二电子芯片，位于第一芯片顶部上并且具有背面，其背面的一部分面向第一芯片的正面延伸，并且其背面的一部分延伸超出第一芯片外围的至少一个边缘、且至少部分地面向支撑衬底的正面；第一电连接元件，被插入在第一芯片和支撑衬底之间；以及第二电连接元件，被插入在第一芯片和支撑衬底之间，且位于距第一芯片的外围一定距离处。
因此，在支撑衬底、第一芯片和第二芯片之间的电链路能够是短的且是机械稳定的，并且电链接的数目能够被增加。
该电子设备可以包括第三电连接元件，其被插入在第一芯片和第二芯片之间。
第二芯片的背面可以包括凹部，并且第一芯片可以被至少部分地保持在该凹部中并且面向该凹部的底部。
该电子设备可以包括第三电连接元件，其被插入在第一芯片和第二芯片的凹部的底部之间。
第一芯片可以包括基础层，以及在该基础层的一侧的衬底层，衬底层包括电连接的阵列。
第一芯片的电连接的阵列可以通过第一电连接元件被连接到支撑衬底。
第一芯片的电连接的阵列可以被连接到被插入在第一芯片和第二芯片之间的第三电连接元件。
第一芯片的基础层可以被提供有多个电连接贯穿过孔。
第一芯片的电连接贯穿过孔可以通过第一电连接元件被连接到支撑衬底。
第一芯片的电连接贯穿过孔可以被连接到被插入在第一芯片和第二芯片之间的第三电连接元件。
支撑衬底可以包括电连接的阵列，其被连接到第一电连接元件和第二电连接元件。
所述电连接元件可以包括球、柱或焊点。
附图说明
现将通过非限制示例性的实施例的方式来描述电子设备，该实施例由附图来图示，其中：
图1示出电子设备的横截面；
图2示出图1的电子设备的放大的局部横截面；
图3示出另一个电子设备的横截面；
图4示出另一个电子设备的横截面；
图5示出另一个电子设备的横截面；
图6示出图1的电子设备的一个变型实施例的横截面；
图7示出图6的电子设备的放大的局部横截面；
图8示出图3的电子设备的一个变型实施例的横截面；
图9示出图4的电子设备的一个变型实施例的横截面；以及
图10示出图5的电子设备的一个变型实施例的横截面。
具体实施方式
图1和图2中图示的电子设备1，包括以片(sheet)的形式的支撑衬底2，支撑衬底2具有正面(front face)3；第一电子芯片4，位于支撑衬底2的顶部上，并且第一电子芯片4具有面向支撑衬底2的正面3的背面(rear face)5，以及正面6。
电子设备1包括第二电子芯片7，其位于第一芯片4的顶部上，并且第二电子芯片7具有背面8，其背面的一部分面向第一芯片4的正面6延伸，并且其背面的另一部分延伸超出第一芯片4的外围的至少部分、并且面向支撑衬底2的正面3，从而形成特定的堆叠。
电子设备1还包括第一电连接元件9，其被插入在支撑衬底2和第一芯片4之间(也就是说，位于支撑衬底2和第一芯片4之间)；以及第二电连接元件10，其被插入在支撑衬底2和第二芯片7之间(也就是说，位于支撑衬底2和第二芯片7之间)，并且位于距第一芯片4的外围一定距离处。
例如，电连接元件9可以通过球、焊柱来形成，并且电连接元件10可以通过球、焊柱、或焊点来形成，从而形成刚性的直接电连接。
如在图2中更明确地图示的，支撑衬底2被提供有电连接的阵列12，该电连接的阵列12具有正焊盘，第一电连接元件9和第二电连接元件10电连接到该正焊盘。
第一芯片4包括例如由硅制成的基础板(衬底)13，其具有在其上形成电子部件(未示出)的面14，以及包括电连接的阵列16的互连层15，互连层15在面14之上形成。
例如且有利地，互连层15位于支撑衬底2的一侧。
第一芯片4的电连接的阵列16具有焊盘，第一电连接元件9来电连接到该焊盘。
第二芯片7包括例如由硅制成的基础板(衬底)18，其具有在其上形成电子部件(未示出)的面19，以及包括互连层20，互连层20在面19之上形成，并且包括电连接的阵列21。例如，基础板18位于与支撑衬底2相对的一侧。例如，层19位于具有其一部分面向衬底2、并且其一部分面向第一芯片4的一侧。
电连接的阵列21具有背焊盘，第二电连接元件10电连接到该背焊盘。
第一电连接元件9和第二电连接元件10被尺寸化，使得芯片4的正面6和芯片7的背面8是接触的或是彼此分离一小距离。由热导材料制成的膏或粘合剂可以可选地被嵌入在芯片4的正面6和芯片7的背面8之间。
借助于上述组件，芯片4和芯片7分别通过第一电连接元件9和第二电连接元件10而被电连接到支撑衬底2的电连接的阵列12，并且通过该电连接的阵列12能够被连接到彼此。
图3中图示的电子设备22与参照图1和图2所描述的电子设备1的区别在于，例如，电子设备22包括了多个第一电子芯片4，该多个第一电子芯片4位于支撑衬底2和第二芯片7之间、且位于距彼此一定距离处。
第一芯片4以上述电子设备1的第一芯片4等效的安装方式，通过第一电连接元件9和第二电连接元件10被电连接到支撑衬底2。
例如，在这种情况下，连接了支撑衬底2和第二芯片7的第二电连接元件10中的一些可以有利地位于在第一芯片4之间的空间中。
图4中图示的电子设备23包括参照图1和图2所描述的电子设备1，并且电子设备23进一步包括第三电子芯片24，该第三电子芯片24位于第二芯片7的顶部上并且具有背面25，其背面的一部分面向第二芯片7的正面26延伸，并且其背面的另一部分延伸超出第一芯片4和第二芯片7的外围的至少一部分，且面向支撑衬底2的正面3，从而形成另一个特定的堆叠。
而且，电子设备22包括附加电连接元件27，该电连接元件27被插入在支撑衬底2和第三芯片7之间(也就是说，位于支撑衬底2和第三芯片7之间)，并且该电连接元件27位于距第一芯片4和第二芯片7一定距离处。电连接元件27连接支撑衬底2的电连接阵列和第三芯片24的电连接阵列。
图5中图示的电子设备29与参照图1和图2所描述的电子设备1的区别在于，第二电子芯片7的背面8包括凹部30，在其中第一芯片4至少部分地被保持。
有利地，凹部30在第二芯片7的层20中形成。
芯片4的正面6可以是与凹部30的底部31相接触的，或可以距凹部30的底部31一小距离。由导热材料制成的层可以可选地被插入在芯片4的正面6和凹部30的底部31之间。
因此，由芯片4和芯片7形成的堆叠的厚度能够被减少。
当然，多个第一芯片可以被安装在第二芯片的凹部中，并且第二芯片的多个凹部可以被提供，以便容纳至少一个第一芯片。
图6至图7的电子设备101与参照图1和图2所描述的电子设备1和电子设备2的区别在于，电子设备101还包括第三电连接元件11，第三电连接元件11被插入在第一芯片4和第二芯片7之间(也就是说，位于第一芯片4和第二芯片7之间)。
第三电连接元件11可以通过球、柱、或焊点来形成。
如在图7中图示的，芯片4相对于其在图2中的布局被翻转，使得基础板13位于支撑衬底2的一侧，并且包括电连接阵列16的互连层15位于第二芯片7的一侧。
而且，第一芯片4的基础板13以通孔的形式被提供有电连接过孔17(TSV)，在一方面，电连接过孔17被连接到第一芯片4的电子部件和/或到电连接的阵列16，并且在另一方面，电连接过孔17具有背焊盘，第一电连接元件9被电连接到该背焊盘。
此外，在一方面，第一芯片4的电连接的阵列16具有正焊盘，第三电连接元件11被电连接到该正焊盘，并且在另一方面，电连接的阵列21具有背焊盘，第二电连接元件11被电连接到该背焊盘。
因此，除了上述通过第一电连接元件9和第二电连接元件10的方式的电链路，芯片4和芯片7还通过第三电连接元件11而彼此被直接连接。
图8中图示的电子设备122与在上文中参照图3所描述的电子设备22的区别在于，电子设备122还包括第三电连接元件11，第三电连接元件11以与刚才参照图7被描述过的等效方式，被插入在第一芯片4和第二芯片7之间，并且被电连接到第一芯片4以及到第二芯片7。
图9中图示的电子设备123与在上文中参照图4所描述的电子设备23的区别在于，电子设备123还包括被插入在第一芯片4和第二芯片7之间的第三电连接元件11，以及被插入在第二芯片7和第三芯片24之间的附加电连接元件28。
第三电连接元件11以与刚才参照图7被描述过的等效方式而被电连接到第一芯片4和第二芯片7。
此外，第二芯片7以与芯片4同样的方式被提供有具有电连接的阵列和电连接过孔的阵列，从而形成在第二芯片7和第三芯片24之间的直接电连接。
图10中图示的电子设备129与在上文中参照图5所描述的电子设备29的区别在于，电子设备129还包括第三电连接元件11，被插入在第一芯片4和凹部30的底部31之间。
被包含在第二芯片7的层20中的电连接的阵列21具有被布置在凹部30的底部31的焊盘，并且电连接元件11被电连接至该焊盘，从而形成在第一芯片4和第二芯片7之间的直接链路。

Claims (14)

1.一种电子设备，包括：
支撑衬底，具有支撑面；
第一电子芯片，位于所述支撑衬底的顶部上，并且具有第一面和第二面，其中所述第一面被安装到所述支撑衬底的所述支撑面；
第二电子芯片，位于所述第一电子芯片的顶部上，所述第二电子芯片包括半导体衬底和互连层，所述半导体衬底具有第一面和第二面，并且所述互连层具有第一面和第二面，其中所述互连层的所述第二面被安装到所述半导体衬底的所述第一面，并且其中所述互连层的所述第一面被安装到所述支撑衬底的所述支撑面；
所述互连层的所述第一面还包括凹部，并且其中所述第一电子芯片至少部分地被置于所述凹部内，所述第一电子芯片的所述第二面面向所述凹部的底面；
第一电连接元件，被插入在所述第一电子芯片的所述第一面和所述支撑衬底的所述支撑面之间；以及
第二电连接元件，被插入在针对所述第二电子芯片的所述互连层的所述第一面和所述支撑衬底的所述支撑面之间。
2.根据权利要求1所述的设备，还包括第三电连接元件，被插入在所述第一电子芯片的所述第二面和所述凹部的所述底面之间。
3.根据权利要求1所述的设备，其中所述支撑衬底包括在所述支撑面处的电连接的阵列，所述电连接的阵列被连接到所述第一电连接元件和所述第二电连接元件。
4.根据权利要求1所述的设备，其中所述第一电连接元件和第二电连接元件均包括从由球、柱和焊点组成的组中选择的结构。
5.根据权利要求1所述的设备，其中所述互连层包括电连接的阵列。
6.根据权利要求5所述的设备，其中所述电连接的阵列通过所述第二电连接元件而被电连接到所述支撑衬底。
7.根据权利要求5所述的设备，其中所述电连接的阵列被电连接到所述第一电子芯片的所述第二面。
8.根据权利要求7所述的设备，其中所述第一电子芯片包括多个电连接贯穿过孔，所述多个电连接贯穿过孔与所述电连接的阵列电接触。
9.一种电子设备，包括：
支撑衬底，具有正面；
第一电子芯片，被定位在所述支撑衬底的所述正面之上，所述第一电子芯片包括具有第一电子电路的第一衬底、以及具有第一互连网络的第一互连层，所述第一互连网络被连接到所述第一电子电路；
其中所述第一互连层面向所述支撑衬底的所述正面；
第一电连接元件，被插入在所述第一互连层的所述第一互连网络和所述支撑衬底的所述正面之间；
第二电子芯片，被定位在所述支撑衬底的所述正面之上，所述第二电子芯片包括具有第二电子电路的第二衬底、以及具有第二互连网络的第二互连层，所述第二互连网络被连接到所述第二电子电路；
其中所述第二互连层的第一部分包括凹部，所述第一电子芯片的一部分被定位在所述凹部内，并且其中所述第二互连层的第二部分延伸超出所述第一电子芯片的外围边缘，且面向所述支撑衬底的所述正面；以及
第二电连接元件，被插入在所述第二互连层的所述第二互连网络和所述支撑衬底的所述正面之间，所述第二电连接元件位于距所述第一电子芯片的所述外围边缘一定距离处。
10.根据权利要求9所述的设备，还包括第三电连接元件，被插入在所述第一电子芯片的所述第一衬底和所述第二互连层的所述第二部分之间。
11.根据权利要求10所述的设备，其中所述第一电子芯片的所述第一衬底包括贯穿硅过孔，所述贯穿硅过孔被电连接到所述第三电连接元件。
12.一种电子设备，包括：
支撑衬底，具有正面；
第一电子芯片，被定位所述支撑衬底的所述正面之上，所述第一电子芯片包括具有第一电子电路的第一衬底、以及具有第一互连网络的第一互连层，所述第一互连网络被连接到所述第一电子电路；
其中所述第一衬底面向所述支撑衬底的所述正面；
第一电连接元件，被插入在所述第一衬底和所述支撑衬底的所述正面之间；
第二电子芯片，被定位所述支撑衬底的所述正面之上，所述第二电子芯片包括具有第二电子电路的第二衬底、以及具有第二互连网络的第二互连层，所述第二互连网络被连接到所述第二电子电路；
其中所述第二互连层的第一部分包括凹部，所述第一电子芯片的一部分被定位在所述凹部内，并且其中所述第二互连层的第二部分延伸超出所述第一电子芯片的外围边缘，且面向所述支撑衬底的所述正面；以及
第二电子连接元件，被插入在所述第二互连层的所述第二互连网络和所述支撑衬底的所述正面之间，所述第二电连接元件位于与所述第一电子芯片的所述外围边缘有一定距离处。
13.根据权利要求12所述的设备，还包括第三电连接元件，被插入在所述第一电子芯片的所述第一互连层和所述第二互连层的所述第二部分之间。
14.根据权利要求13所述的设备，其中所述第一电子芯片的所述第一衬底包括贯穿硅过孔，所述贯穿硅过孔被电连接到所述第一电连接元件。
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US11527511B2 (en) 2022-12-13

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