CN111181513A - Data security transmission circuit - Google Patents
Data security transmission circuit Download PDFInfo
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- CN111181513A CN111181513A CN202010132340.5A CN202010132340A CN111181513A CN 111181513 A CN111181513 A CN 111181513A CN 202010132340 A CN202010132340 A CN 202010132340A CN 111181513 A CN111181513 A CN 111181513A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
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Abstract
The invention discloses a data safety transmission circuit, which comprises a frequency acquisition module 1, a frequency acquisition module 2 and a differential regulation module, wherein the frequency acquisition module 1 and the frequency acquisition module 2 adopt a frequency collector J1 and a frequency collector J2 of SJ-ADC to acquire carrier signal frequencies of adjacent data channels, the differential regulation module adopts an operational amplifier AR1, an operational amplifier AR2 and an operational amplifier AR3 to form a differential operational amplifier circuit to carry out differential-amplification regulation on output signals of the frequency acquisition module 1 and the frequency acquisition module 2, simultaneously adopts a frequency selection circuit consisting of a capacitor C3 and a capacitor C5 to screen out signals of single frequency, simultaneously adopts a fine tuning circuit consisting of a triode Q1 and a triode Q2 to carry out potential detection regulation on the signals, and finally adopts an operational amplifier AR5, a diode D3 and a diode D4 to screen out a peak value circuit to screen out peak value signal triggering signal emitter E1, the frequency of the carrier signal of the adjacent data channel can be compared and adjusted and converted into an error correction signal of the data control terminal.
Description
Technical Field
The invention relates to the technical field of data security, in particular to a data security transmission circuit.
Background
The increasing amount of data transmission has led to continuous efforts to increase the data throughput, and on the basis of the increased data throughput, data security is further ensured, meanwhile, along with the continuous increase of data transmission capacity, the difficulty of data security protection is more and more high, the data security transmission needs to be upgraded and optimized simultaneously, the data transmission capacity is increased through a multi-channel synchronous transmission or bandwidth increasing mode, a plurality of channels need to be detected synchronously aiming at the multi-channel synchronous transmission, and the method can play a safety role by being different from the traditional single-channel detection, the prior art only detects the encryption security of each channel on the basis of multi-channel transmission, synchronous multi-channel detection cannot be realized, and time errors among channels are easily increased, so that data transmission safety error signals are caused, and signal transmission false alarms are caused.
Disclosure of Invention
In view of the above, it is an object of the present invention to provide a data security transmission circuit, which can compare and adjust the frequency of the carrier signal of the adjacent data channel and convert the carrier signal into an error correction signal of the data control terminal.
The technical scheme includes that the data safety transmission circuit comprises a frequency acquisition module 1, a frequency acquisition module 2 and a differential adjustment module, wherein the frequency acquisition module 1 and the frequency acquisition module 2 adopt a frequency collector J1 and a frequency collector J2 of an SJ-ADC (standard short-analog converter) to acquire carrier signal frequencies of adjacent data channels, the differential adjustment module adopts an operational amplifier AR1, an operational amplifier AR2 and an operational amplifier AR3 to form a differential operational amplifier circuit to perform differential-amplification adjustment on signals output by the frequency acquisition module 1 and the frequency acquisition module 2, simultaneously adopts a capacitor C3-a capacitor C5 to form a single-frequency signal of a frequency selection circuit, simultaneously adopts a triode Q1 and a triode Q2 to form a fine adjustment circuit to perform potential detection adjustment on the signals, and finally adopts the operational amplifier AR5, a diode D3 and a diode D4 to form a peak circuit to screen a peak value signal trigger signal transmitter E1 to work, and sending the data to a data control terminal.
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages;
1. the difference-amplification adjustment of output signals of the frequency acquisition module 1 and the frequency acquisition module 2 is performed by using a differential operational amplifier circuit composed of an operational amplifier AR1, an operational amplifier AR2 and an operational amplifier AR3, so that a static working point is effectively stabilized, a differential mode signal is amplified to inhibit a common mode signal, more importantly, a difference value of two paths of signals can be calculated in a differential mode, the difference value signal of carrier signal frequencies of adjacent data channels is amplified, namely, a time error between the channels is amplified, and meanwhile, a frequency selection circuit composed of a capacitor C3 and a capacitor C5 is used for screening out a signal with a single frequency, so that the stability of the difference value signal is ensured;
2. the signal is detected and adjusted by a fine adjustment circuit formed by a triode Q1 and a triode Q2, the fine adjustment circuit detects the potential difference of an output signal of an operational amplifier AR3 and an output signal of a frequency selection circuit, clutter is prevented from being generated in the process of adjusting the signal by the frequency selection circuit, the operational amplifier AR4 plays a role of synchronous buffer signals, finally, the operational amplifier AR5, a diode D3 and a diode D4 are used for forming a peak circuit to screen out a peak signal trigger signal emitter E1 to work and send the peak signal trigger signal emitter E1 into a data control terminal, the peak signal is convenient for directly starting the signal emitter E1 to work, and meanwhile, the received signal of the data control terminal can.
Drawings
Fig. 1 is a diagram of a frequency acquisition module 1 of a data security transmission circuit according to the present invention.
Fig. 2 is a diagram of a frequency acquisition module 2 of a data security transmission circuit according to the present invention.
Fig. 3 is a block diagram of a differential adjustment circuit of a data security transmission circuit according to the present invention.
Detailed Description
The foregoing and other aspects, features and advantages of the invention will be apparent from the following more particular description of embodiments of the invention, as illustrated in the accompanying drawings in which reference is made to figures 1 to 3. The structural contents mentioned in the following embodiments are all referred to the attached drawings of the specification.
In the first embodiment, a data security transmission circuit includes a frequency acquisition module 1, a frequency acquisition module 2, and a differential adjustment module, where the frequency acquisition module 1 and the frequency acquisition module 2 use a frequency collector J1 and a frequency collector J2 of SJ-ADC to acquire carrier signal frequencies of adjacent data channels, the differential adjustment module uses an operational amplifier AR1, an operational amplifier AR2 and an operational amplifier AR3 to form a differential operational amplifier circuit to perform differential-amplification adjustment on output signals of the frequency acquisition module 1 and the frequency acquisition module 2, and uses a capacitor C3-a capacitor C5 to form a frequency selection circuit to screen out signals of single frequency, and uses a triode Q1 and a triode Q2 to form a fine adjustment circuit to perform potential detection adjustment on the signals, and finally uses an operational amplifier AR5, a diode D3 and a diode D4 to screen out a peak value circuit to form a peak value signal trigger signal transmitter E1, sending the data to a data control terminal;
the difference adjusting module utilizes a difference operational amplifier circuit composed of an operational amplifier AR1, an operational amplifier AR2 and an operational amplifier AR3 to perform difference-amplification adjustment on output signals of the frequency acquisition module 1 and the frequency acquisition module 2, effectively stabilizes a static working point, amplifies differential mode signals to inhibit common mode signals, more importantly, can perform difference calculation on two paths of signals, calculates the difference between the two paths of signals, amplifies the difference signal of carrier signal frequencies of adjacent data channels, namely time error between the two paths of signals, simultaneously utilizes a frequency selecting circuit composed of a capacitor C3 and a capacitor C5 to select a signal with single frequency, ensures the stability of the difference signal, simultaneously utilizes a triode Q1 and a triode Q2 to perform potential detection adjustment on the signal, the fine adjusting circuit detects the potential difference between the output signal of the operational amplifier AR3 and the output signal of the frequency selecting circuit, and prevents the frequency selecting circuit from generating noise in the signal adjusting process, the operational amplifier AR4 plays a role in synchronous signal buffering, and finally a peak circuit consisting of the operational amplifier AR5, the diode D3 and the diode D4 is used for screening out a peak signal to trigger the signal transmitter E1 to work and sending the signal to the data control terminal, the peak signal is convenient for directly starting the signal transmitter E1 to work, and meanwhile, the data control terminal can receive signals and correct errors in time;
the differential regulation module has a specific structure that a non-inverting input end of an operational amplifier AR1 is connected with one end of a resistor R3, an inverting input end of an operational amplifier AR1 is connected with an inverting input end of an operational amplifier AR2 and one ends of a resistor R7 and a resistor R8, a non-inverting input end of an operational amplifier AR2 is connected with one end of a resistor R4, an output end of an operational amplifier AR1 is connected with the other end of a resistor R7 and one end of a resistor R7, the other end of the resistor R7 is connected with a non-inverting input end of the operational amplifier AR 7 and one end of a resistor R7, the other end of the resistor R7 is connected with the other end of the operational amplifier AR 7, the non-inverting input end of the operational amplifier AR 7 and one end of the resistor R7, the non-inverting input end of the resistor R7 is connected with the output end of the operational amplifier AR 7, the non-inverting input end of the operational amplifier R7 is connected with one end of a triode 7, and one end of a collector of the operational amplifier AR 7, The collector of the triode Q2 and the other end of the resistor R11, the other end of the resistor R12 is connected with one end of the resistor R13 and one end of the capacitor C4, the other end of the capacitor C3 is connected with one end of the resistor R14 and one end of the capacitor C5, the other ends of the resistor R14 and the capacitor C4 are grounded, the other end of the resistor R13 is connected with the other end of the capacitor C5, the base of the triode Q1, the anode of the diode D4 and the non-inverting input end of the operational amplifier AR5, the emitter of the triode Q1 is connected with the base of the triode Q2, the cathode of the diode D4, the cathode of the diode D3 and the output end of the operational amplifier AR5, the inverting input end of the operational amplifier AR5 is grounded, the emitter of the triode Q2 is connected with one end of.
In a second embodiment, on the basis of the first embodiment, the frequency acquisition module 1 and the frequency acquisition module 2 of the frequency acquisition module 1 use a frequency collector J1 and a frequency collector J2 of a model SJ-ADC to acquire carrier signal frequencies of adjacent data channels, a power supply terminal of the frequency collector J1 is connected to +5V, a ground terminal of the frequency collector J1 is grounded, an output terminal of the frequency collector J1 is connected to one end of a resistor R1 and a cathode of a voltage regulator tube D1, an anode of the voltage regulator tube D1 is grounded, the other end of the resistor R1 is connected to one end of a capacitor C1 and the other end of the resistor R3, and the other end of the capacitor C1 is grounded; the power supply end of the frequency collector J2 is connected with +5V of a power supply, the grounding end of the frequency collector J2 is grounded, the output end of the frequency collector J2 is connected with one end of a resistor R2 and the negative electrode of a voltage regulator tube D2, the positive electrode of the voltage regulator tube D2 is grounded, the other end of the resistor R2 is connected with one end of a capacitor C2 and the other end of the resistor R4, and the other end of the capacitor C2 is grounded.
When the invention is used in particular, the invention relates to a data safety transmission circuit, which comprises a frequency acquisition module 1, a frequency acquisition module 2 and a differential regulation module, wherein the frequency acquisition module 1 and the frequency acquisition module 2 adopt a frequency collector J1 and a frequency collector J2 of a model SJ-ADC to acquire carrier signal frequencies of adjacent data channels, the differential regulation module adopts an operational amplifier AR1, an operational amplifier AR2 and an operational amplifier AR3 to form a differential operational amplifier circuit to carry out differential-amplification regulation on output signals of the frequency acquisition module 1 and the frequency acquisition module 2, effectively stabilize a static working point, inhibit common-mode signals by amplifying the differential-mode signals, more importantly, the difference between the two signals can be calculated, the difference signal of the carrier signal frequencies of the adjacent data channels is amplified, namely, the time error between the channels is amplified, and simultaneously, a frequency selection circuit consisting of a capacitor C3-capacitor C5 is used to screen out signals of single frequency, the stability of difference signal is guaranteed, meanwhile, triode Q1 and triode Q2 are used for forming a fine tuning circuit to carry out potential detection and adjustment on signals, the fine tuning circuit detects the potential difference of output signals of the operational amplifier AR3 and output signals of the frequency selection circuit, clutter generated in the process of adjusting signals of the frequency selection circuit is prevented, the operational amplifier AR4 plays a role of synchronous buffer signals, finally, the operational amplifier AR5, diode D3 and diode D4 are used for forming a peak circuit to screen out a peak signal trigger signal emitter E1 to work, the peak signal trigger signal emitter E1 is sent to a data control terminal, the peak signal is convenient for directly starting the signal emitter E1 to work, and meanwhile, error correction can be carried out in time when signals.
While the invention has been described in further detail with reference to specific embodiments thereof, it is not intended that the invention be limited to the specific embodiments thereof; for those skilled in the art to which the present invention pertains and related technologies, the extension, operation method and data replacement should fall within the protection scope of the present invention based on the technical solution of the present invention.
Claims (3)
1. A data security transmission circuit comprises a frequency acquisition module 1, a frequency acquisition module 2 and a differential regulation module, and is characterized in that the frequency acquisition module 1 and the frequency acquisition module 2 collect carrier signal frequencies of adjacent data channels by using a frequency collector J1 and a frequency collector J2 of a SJ-ADC model, the differential regulation module uses an operational amplifier AR1, an operational amplifier AR2 and an operational amplifier AR3 to form a differential operational amplifier circuit to carry out differential-amplification regulation on output signals of the frequency acquisition module 1 and the frequency acquisition module 2, simultaneously uses a capacitor C3-a capacitor C5 to form a frequency selection circuit to screen out signals of single frequency, uses a triode Q1 and a triode Q2 to form a fine regulation circuit to carry out potential detection regulation on the signals, and finally uses the operational amplifier AR5, a diode D3 and a diode D4 to screen out a peak value circuit to screen out a peak value signal trigger signal transmitter E1, and sending the data to a data control terminal.
2. The data security transmission circuit according to claim 1, wherein the differential adjustment module comprises an operational amplifier AR1, a non-inverting input terminal of the operational amplifier AR1 is connected to one terminal of a resistor R3, an inverting input terminal of the operational amplifier AR1 is connected to an inverting input terminal of the operational amplifier AR2 and one terminal of a resistor R7 and a resistor R8, a non-inverting input terminal of the operational amplifier AR2 is connected to one terminal of a resistor R4, an output terminal of the operational amplifier AR1 is connected to the other terminal of a resistor R7 and one terminal of a resistor R5, the other terminal of a resistor R5 is connected to a non-inverting input terminal of the operational amplifier AR3 and one terminal of a resistor R6, the other terminal of a resistor R6 is grounded, an output terminal of the operational amplifier AR2 is connected to the other terminal of a resistor R8 and one terminal of a resistor R9, the other terminal of a resistor R9 is connected to an inverting input terminal of the operational amplifier AR 9 and one terminal of a resistor R9 and a capacitor C9, the inverting input end of the operational amplifier AR4 is connected with one end of a resistor R11, the output end of the operational amplifier AR4 is connected with the collector of a triode Q1, the collector of a triode Q2 and the other end of a resistor R11, the other end of a resistor R12 is connected with one end of a resistor R13 and one end of a capacitor C4, the other end of a capacitor C3 is connected with one end of a resistor R14 and one end of a capacitor C5, the other ends of a resistor R14 and a capacitor C14 are grounded, the other end of a resistor R14 is connected with the other end of the capacitor C14 and the base of the transistor Q14, the anode of the diode D14 and the non-inverting input end of the operational amplifier AR 14, the emitter of the transistor Q14 is connected with the base of the transistor Q14 and the cathode of the diode D14, the cathode of the diode D14 and the output end of the operational amplifier AR 14, the inverting input end of the operational amplifier AR 14 is grounded.
3. The data security transmission circuit according to claim 1, wherein the frequency acquisition module 1 comprises a frequency collector J1 with model number SJ-ADC, a power supply end of the frequency collector J1 is connected with +5V, a ground end of the frequency collector J1 is grounded, an output end of the frequency collector J1 is connected with one end of a resistor R1 and a cathode of a voltage regulator D1, an anode of the voltage regulator D1 is grounded, the other end of the resistor R1 is connected with one end of a capacitor C1 and the other end of a resistor R3, and the other end of the capacitor C1 is grounded;
the frequency acquisition module 2 comprises a frequency collector J2 with the model of SJ-ADC, a power supply end of the frequency collector J2 is connected with +5V, a grounding end of the frequency collector J2 is grounded, an output end of the frequency collector J2 is connected with one end of a resistor R2 and the negative electrode of a voltage regulator tube D2, the positive electrode of the voltage regulator tube D2 is grounded, the other end of the resistor R2 is connected with one end of a capacitor C2 and the other end of a resistor R4, and the other end of the capacitor C2 is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010132340.5A CN111181513B (en) | 2020-02-29 | 2020-02-29 | Data security transmission circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010132340.5A CN111181513B (en) | 2020-02-29 | 2020-02-29 | Data security transmission circuit |
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| CN111181513A true CN111181513A (en) | 2020-05-19 |
| CN111181513B CN111181513B (en) | 2023-02-21 |
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| CN202010132340.5A Active CN111181513B (en) | 2020-02-29 | 2020-02-29 | Data security transmission circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113242095A (en) * | 2021-06-29 | 2021-08-10 | 岁兰 | Computer electronic communication system |
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| Publication number | Publication date |
|---|---|
| CN111181513B (en) | 2023-02-21 |
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