CN111141804A - Semiconductor device and method of manufacture - Google Patents

Semiconductor device and method of manufacture Download PDF

Info

Publication number
CN111141804A
CN111141804A CN201811314954.4A CN201811314954A CN111141804A CN 111141804 A CN111141804 A CN 111141804A CN 201811314954 A CN201811314954 A CN 201811314954A CN 111141804 A CN111141804 A CN 111141804A
Authority
CN
China
Prior art keywords
insulating layer
layer
semiconductor device
electrode
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201811314954.4A
Other languages
Chinese (zh)
Other versions
CN111141804B (en
Inventor
尚海平
曹治
王英辉
王玮冰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Institute of Microelectronics of CAS
Original Assignee
Institute of Microelectronics of CAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Institute of Microelectronics of CAS filed Critical Institute of Microelectronics of CAS
Priority to CN201811314954.4A priority Critical patent/CN111141804B/en
Publication of CN111141804A publication Critical patent/CN111141804A/en
Application granted granted Critical
Publication of CN111141804B publication Critical patent/CN111141804B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/403Cells and electrode assemblies
    • G01N27/414Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Biochemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Analytical Chemistry (AREA)
  • Molecular Biology (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)

Abstract

The application provides a semiconductor device and a manufacturing method. The semiconductor device includes: a substrate; a first insulating layer on a surface of the substrate; the electrode layer is positioned on the surface, far away from the substrate, of the first insulating layer; and the second insulating layer is positioned on the surface of the electrode layer far away from the first insulating layer, the second insulating layer is provided with a plurality of through holes arranged at intervals, each through hole exposes part of the surface of the electrode layer, and the material of the second insulating layer and/or the material of the first insulating layer comprises amorphous silicon carbide. The material of the first insulating layer and/or the material of the second insulating layer in the semiconductor device is amorphous silicon carbide, the material can effectively prevent the problem of device failure caused by seawater corrosion, and the service life of the semiconductor device is greatly prolonged. In addition, the silicon carbide has good corrosion resistance to strong corrosive solutions such as strong acid, strong alkali and the like, and can better meet the application of seawater in-situ detection.

Description

Semiconductor device and method of manufacture
Technical Field
The present application relates to the field of semiconductors, and more particularly, to a semiconductor device and a method of manufacturing the same.
Background
Trace metals are one of the important components of the geochemical cycle of marine organisms and have an indispensable effect on marine organisms. The research on the concentration and the morphology of trace metals is a necessary method for the subjects of ancient oceanology, biological chemistry, plate theory and the like. Meanwhile, the research on trace metals is beneficial to controlling the marine heavy metal pollution, and the ambitious goal of sustainable development is realized.
Since only a small fraction of the morphological metals (trace metals) in marine metals are bioavailable, the total amount of metals detected by physical methods is not of much reference. The concentration of metals detected by the electrochemical stripping voltammetry is consistent with that of metals (trace metals) which can be utilized biologically, however, the original balance of the metal form is broken by the traditional detection method based on land analysis after sampling, and further, the detection result is still inaccurate.
The micro electrochemical sensor is combined with stripping voltammetry, and can be used for realizing in-situ detection of marine trace metals. The working electrode formed by the microelectrode array is one of three-electrode systems of stripping voltammetry, and therefore, the design and the manufacture of the microelectrode array are key to the problem.
In the fabrication of microelectrode arrays using microelectronics processes, silicon is typically used as the substrate on which insulating and metallic layers are deposited. Differences in the etching material, etching process, and insulating layer all affect electrode performance. Since the insulation layer was developed for insulation rather than corrosion protection, sensor failure is often too rapid due to inadequate barrier properties of the insulation layer in view of the strong corrosiveness of seawater, especially deep sea.
In the patent document with application number 201310062478.2, gold nanoparticles are used as the metal electrode layer, the lower insulating layer is silicon oxide formed by thermal oxidation, and the upper insulating layer is silicon nitride grown by PECVD. PECVD grown silicon nitride and silicon oxide in a solution of 1mol/L NaCl (pH 7) at 25 ℃ fail within a few hours.
In patent document No. 201610534964.3, gold is used as a metal electrode layer, and polyimide is used as upper and lower insulating layers. In a solution of NaCl (pH 7) at 25 ℃ in an amount of 1mol/L, an organic polymer material such as polyimide exhibits a barrier effect only for a short period of time
Therefore, a semiconductor device having an insulating layer with better corrosion resistance is needed to improve the service life of the semiconductor device in seawater.
The above information disclosed in this background section is only for enhancement of understanding of the background of the technology described herein and, therefore, certain information may be included in the background that does not form the prior art that is already known in this country to a person of ordinary skill in the art.
Disclosure of Invention
The present application is directed to a semiconductor device and a method for manufacturing the same, so as to solve the problem of poor corrosion resistance of the semiconductor device for measuring the content of trace metals in the ocean in the prior art.
In order to achieve the above object, according to one aspect of the present application, there is provided a semiconductor device including: a substrate; a first insulating layer on a surface of the substrate; an electrode layer located on the surface of the first insulating layer away from the substrate; and a second insulating layer located on a surface of the electrode layer away from the first insulating layer, the second insulating layer having a plurality of through holes arranged at intervals, each of the through holes exposing a portion of the surface of the electrode layer, the material of the second insulating layer and/or the material of the first insulating layer including amorphous silicon carbide.
Further, a material of the second insulating layer and a material of the first insulating layer include amorphous silicon carbide.
Further, the plurality of through holes are arranged at equal intervals.
Further, a surface of the first insulating layer, which is away from the substrate, includes a central region and a peripheral region, the peripheral region is surrounded outside the central region, the electrode layer is located on the central region, and the second insulating layer is also located on the peripheral region.
Further, the semiconductor device further includes: and the adhesive layer is positioned between the first insulating layer and the electrode layer and comprises a viscous and conductive material.
Further, the thickness of the first insulating layer is greater than or equal to
Figure BDA0001856015680000021
The thickness of the second insulating layer is smaller than the maximum width of a cross section of the through hole parallel to a first plane, and the first plane is perpendicular to the thickness direction of the second insulating layer.
According to another aspect of the present application, there is provided a method of manufacturing a semiconductor device, the method comprising: step S1, providing a substrate; a step S2 of providing a first insulating layer over the substrate; a step S3 of providing at least an electrode layer on a surface of the first insulating layer remote from the substrate; step S4, disposing a second insulating material on the exposed surface of the electrode layer and the exposed surface of the first insulating layer to form a second pre-insulating layer, wherein the material of the second pre-insulating layer and/or the material of the first insulating layer includes amorphous silicon carbide; step S5, etching the second pre-insulating layer to form a second insulating layer having a plurality of spaced through holes, where each through hole exposes a part of the surface of the electrode layer, and a part of the electrode layer corresponding to the exposed surface is one of the electrodes.
Further, the surface of the first insulating layer away from the substrate includes a central region and a peripheral region, and the step S3 includes: step S31, disposing a first photoresist portion on the peripheral region; step S33, disposing an electrode material on the central region and the exposed surface of the first photoresist portion; step S34 is to remove the first photoresist portion and the electrode material on the surface of the first photoresist portion, and form an electrode layer with the remaining electrode material in the central region.
Further, between the step S31 and the step S33, the step S3 further includes: step S32, disposing an adhesive material on the central region and the exposed surface of the first photoresist portion, wherein the adhesive material is a conductive material, the electrode material is disposed on the exposed surface of the adhesive material in step S33, the adhesive material on the surface of the first photoresist portion and the first photoresist portion is further removed in step S34, and the remaining adhesive material in the central region forms an adhesive layer.
Further, the plurality of through holes are arranged at equal intervals.
By applying the technical scheme of the application, the material of the first insulating layer and/or the material of the second insulating layer in the semiconductor device is/are amorphous silicon carbide, and the material can effectively prevent the problem of device failure caused by seawater corrosion. In a solution of 1mol/L NaCl (pH 7) at 25 ℃, the silicon carbide can be ensured not to lose efficacy within 700 hours, and the service life of the semiconductor device is greatly prolonged. In addition, the silicon carbide has good corrosion resistance to strong corrosive solutions such as strong acid, strong alkali and the like, and can better meet the application of seawater in-situ detection.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the application and, together with the description, serve to explain the application and are not intended to limit the application. In the drawings:
fig. 1 to 8 are schematic views illustrating a manufacturing process of a semiconductor device according to the present application;
fig. 9 shows a schematic top view of fig. 8.
Wherein the figures include the following reference numerals:
10. a substrate; 20. a first insulating layer; 30. a first photoresist portion; 40. an adhesive layer; 41. an adhesive material; 50. an electrode layer; 51. an electrode material; 52. an electrode; 60. a second insulating layer; 61. a second pre-insulating layer; 62. a through hole; 70. a second photoresist portion.
Detailed Description
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. Also, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element or "connected" to the other element through a third element.
As described in the background, the semiconductor device of the prior art for measuring the content of trace metals in the sea has poor corrosion resistance and is easily deteriorated in the sea, and in order to solve the above problems, the present application proposes a semiconductor device and a method for manufacturing the same.
In an exemplary embodiment of the present application, there is provided a semiconductor device, as shown in fig. 8 and 9, including a substrate 10, a first insulating layer 20, an electrode layer 50, and a second insulating layer 60, the first insulating layer 20 being located on a surface of the substrate 10; the electrode layer 50 is located on the surface of the first insulating layer 20 away from the substrate 10; the second insulating layer 60 is located on the surface of the electrode layer 50 away from the first insulating layer 20, the second insulating layer 60 has a plurality of through holes 62 arranged at intervals, each through hole 62 exposes a portion of the surface of the electrode layer 50, the portion of the electrode layer 50 corresponding to the exposed portion of the surface is one electrode 52, and the plurality of through holes 62 form a plurality of electrodes 52. The second insulating material and/or the first insulating layer 20 may be made of amorphous silicon carbide.
The material of the first insulating layer 20 and/or the material of the second insulating layer 60 in the semiconductor device includes amorphous silicon carbide, which can effectively prevent the problem of device failure due to seawater corrosion. In a solution of 1mol/L NaCl (pH 7) at 25 ℃, the silicon carbide can be ensured not to lose efficacy within 700 hours, and the service life of the semiconductor device is greatly prolonged. In addition, the silicon carbide has good corrosion resistance to strong corrosive solutions such as strong acid, strong alkali and the like, and can better meet the application of seawater in-situ detection.
In a specific embodiment of the present application, the semiconductor device is an electrochemical sensor.
In order to further improve the corrosion resistance of the semiconductor device, in an embodiment of the present application, the material of the second insulating material and the first insulating layer 20 includes amorphous silicon carbide.
In one embodiment of the present application, as shown in fig. 9, a plurality of the through holes 62 are provided at equal intervals. The plurality of electrodes 52 thus formed are also provided at equal intervals. In a specific embodiment, the plurality of electrodes 52 form an array of electrodes 52, as shown in FIG. 9.
In order to further protect the electrode layer 50 and further prevent device failure, in an embodiment of the present invention, as shown in fig. 8, a surface of the first insulating layer 20 away from the substrate 10 includes a central region and a peripheral region, the peripheral region is surrounded on an outer side of the central region, the electrode layer 50 is located on the central region, and the second insulating layer 60 is further located on the peripheral region.
In another embodiment of the present application, as shown in fig. 8, the semiconductor device further includes an adhesive layer 40, the adhesive layer 40 is located between the first insulating layer 20 and the electrode layer 50, and the adhesive layer 40 includes a material having adhesiveness and being electrically conductive. The first insulating layer 20 and the second insulating layer 60 are more firmly bonded together by the adhesive layer 40, and the stability and reliability of the device are further improved, so that the device has a longer life.
In order to further ensure that the first insulating layer 20 and/or the second insulating layer 60 can have a good insulating effect and further improve the corrosion resistance of the first insulating layer 20 and/or the second insulating layer 60, the application provides a practical solutionIn one embodiment, the first insulating layer 20 is greater than or equal to
Figure BDA0001856015680000041
The thickness of the second insulating layer 60 is smaller than the maximum width of a cross section of the via hole parallel to a first plane perpendicular to the thickness direction of the second insulating layer. When the section of the through hole parallel to the first plane is circular, the thickness of the second insulating layer is smaller than the diameter of the circle, actually, the width-depth ratio of the through hole is larger than 1, so that the depth of the through hole is smaller, and the induction sensitivity of the semiconductor device is further improved.
In another exemplary embodiment of the present application, there is provided a method of manufacturing a semiconductor device, the method including: step S1, as shown in fig. 1, providing a substrate 10; step S2, disposing a first insulating layer 20 on the substrate 10 to form the structure shown in fig. 2; step S3, forming a structure as shown in fig. 5 by providing at least an electrode layer 50 on a surface of the first insulating layer 20 away from the substrate 10; step S4, disposing a second insulating material on the exposed surface of the electrode layer 50 and the exposed surface of the first insulating layer 20 to form a second pre-insulating layer 61, as shown in fig. 6, wherein the material of the second pre-insulating layer and/or the material of the first insulating layer 20 includes amorphous silicon carbide; step S5, etching the second pre-insulating layer 61 to form a second insulating layer 60 having a plurality of spaced through holes 62, as shown in fig. 8 and 9, each of the through holes 62 exposes a portion of the surface of the electrode layer 50, and a portion of the electrode layer 50 corresponding to the exposed surface is one of the electrodes 52.
In the above manufacturing method, the first insulating layer 20 and the second insulating layer 60 are disposed on the surface of the substrate 10, and the material of the first insulating layer 20 and/or the material of the second insulating layer 60 includes amorphous silicon carbide, which can effectively prevent the problem of device failure caused by seawater corrosion. In a solution of 1mol/L NaCl (pH 7) at 25 ℃, the silicon carbide can be ensured not to lose efficacy within 700 hours, and the service life of the semiconductor device is greatly prolonged. In addition, the silicon carbide has good corrosion resistance to strong corrosive solutions such as strong acid, strong alkali and the like, and can better meet the application of seawater in-situ detection.
In a specific embodiment of the present application, a surface of the first insulating layer 20 away from the substrate 10 includes a central region and a peripheral region, and the step S3 includes: step S31, disposing a first photoresist portion 30 on the peripheral region to form the structure shown in fig. 3; step S33, disposing an electrode material 51 on the central region and the exposed surface of the first photoresist portion 30, as shown in fig. 4; step S34 is to remove the first photoresist portion 30 and the electrode material 51 on the surface of the first photoresist portion 30, and form an electrode layer 50 by the remaining electrode material 51 located in the central region, as shown in fig. 5. Thus, the electrode material 51 is not arranged on the peripheral region of the first insulating layer 20, so that the second insulating layer 60 is conveniently arranged on the peripheral region subsequently, the side wall of the electrode layer 50 is protected conveniently, the corrosion resistance of the device is further improved, and the device is ensured to have a longer service life in seawater.
The first photoresist portion 30 can be formed in any feasible manner in the prior art, and in a specific embodiment of the present application, the first photoresist layer is first disposed, and then the first photoresist portion 30 shown in fig. 3 is obtained by exposure and development.
In step S34, the first photoresist and the electrode material 51 on the surface of the first photoresist portion 30 are removed by a lift-off method, and specifically, the first photoresist portion 30 and other materials above the first photoresist portion 30 may be removed by immersing the structure of fig. 4 in a solvent such as acetone, which can remove the first photoresist portion 30.
In order to make the first insulating layer 20 and the second insulating layer 60 adhere together more firmly, and further improve the stability and reliability of the device, so that the device has a longer lifetime, in an embodiment of the present application, between the step S31 and the step S33, the step S3 further includes: step S32, disposing an adhesive material 41 on the central region and the exposed surface of the first photoresist portion 30, as shown in fig. 4, wherein the adhesive material 41 is a conductive material, the electrode material 51 is disposed on the exposed surface of the adhesive material 41 in step S33, the adhesive material 41 on the surfaces of the first photoresist portion 30 and the first photoresist portion 30 is further removed in step S34, and the adhesive layer 40 is formed on the remaining adhesive material 41 in the central region, thereby forming the structure shown in fig. 5.
In another embodiment of the present application, the plurality of through holes 62 are disposed at equal intervals, and the plurality of electrodes 52 formed in this way are also disposed at equal intervals. In a specific embodiment, the plurality of electrodes 52 form an array of electrodes 52, as shown in FIG. 9.
It should be noted that the material of the substrate 10 in the present application may be any material that can be used as the substrate 10 in the prior art and is suitable for use in seawater, and those skilled in the art can select a suitable material to form the substrate 10 according to practical situations, such as silicon, germanium, or sapphire, etc. The material of the adhesion layer 40 in the present application may be any material having adhesive property and being conductive, such as titanium (Ti) or chromium (Cr), etc., and those skilled in the art can select a suitable material having adhesive property and being conductive to form the adhesion layer 40 in the present application according to the actual situation. The material of the electrode layer 50 in the present application may be any electrode material 51 available in the prior art and capable of being applied in seawater, for example, platinum (Pt), gold (Au), iridium (Ir), etc., and those skilled in the art can select a suitable electrode material 51 to form the electrode layer 50 in the present application according to practical situations.
The first insulating material and the second insulating material in the present application may be disposed in any feasible manner in the prior art, for example, PECVD or PVD, and those skilled in the art may select a suitable method to dispose the first insulating material and the second insulating material in the present application according to actual circumstances (for example, according to corresponding materials) to form corresponding structural layers.
The electrode material 51 and the adhesion material 41 of the present application can be disposed in any feasible manner in the prior art, such as magnetron sputtering or vacuum evaporation, and the skilled person can select a suitable method to dispose the adhesion material 41 and the electrode material 51 of the present application according to the actual situation (e.g. according to the corresponding material).
Step S5 of the present application specifically includes: a second photoresist layer is provided on the surface of the second pre-insulating layer 61, and then a second photoresist portion 70 shown in fig. 7 is obtained by exposure and development (photolithography process); next, the second pre-insulating layer 61 is etched under the mask of the second photoresist portion 70, and a portion of the second pre-insulating layer 61 is removed, so as to form a second insulating layer 60 having a plurality of through holes 62, thereby forming the structure shown in fig. 8, where fig. 9 is a top view structural view of fig. 8.
It should be noted that the shape of the through hole 62 in the present application may be any shape as long as part of the surface of the electrode layer 50 can be exposed, and a person skilled in the art may etch and form the through hole 62 with a suitable shape according to practical situations, for example, the through hole 62 with a cross section perpendicular to the thickness direction having a square, circular, triangular or other irregular shape.
In order to make the technical solutions and technical effects of the present application more clearly understood by those skilled in the art, the technical solutions of the present application will be described below with reference to specific embodiments.
Examples
The manufacturing process of the semiconductor device comprises the following steps:
step S1, as shown in fig. 1, a substrate 10 is provided, and the substrate 10 is a 500 μm thick silicon wafer with a crystal orientation of (10 inches of 4 inches;
step S2, depositing on the substrate 10 by PECVD
Figure BDA0001856015680000063
A thick first insulating layer 20 forming the structure shown in fig. 2;
step S3, providing an electrode layer 50 on the surface of the first insulating layer 20 away from the substrate 10 to form the structure shown in fig. 5, specifically including:
providing a first photoresist layer on a surface of the first insulating layer 20, and then forming a first photoresist portion 30 on the peripheral region as shown in fig. 3 through a photolithography step; on the central region and the exposed surface of the first photoresist portion 30 in this orderSputtering of
Figure BDA0001856015680000061
Thick adhesive material 41 and
Figure BDA0001856015680000062
a thick electrode material 51, wherein the adhesion material 41 is chromium, and the electrode material 51 is iridium; the adhesive material 41 and the electrode material 51 on the surfaces of the first photoresist portion 30 and the first photoresist portion 30 are removed by a lift-off method, the electrode material 51 remaining in the central region forms an electrode layer 50, and the adhesive material 41 remaining in the central region forms an adhesive layer 40.
Step S4, depositing PECVD on the exposed surface of the electrode layer 50 and the exposed surface of the first insulating layer 20
Figure BDA0001856015680000071
A thick second insulating material forming a second pre-insulating layer 61, the second insulating material and the first insulating layer 20 being made of amorphous silicon carbide;
step S5, providing a second photoresist layer on the surface of the second pre-insulating layer 61, and then obtaining a second photoresist portion 70 shown in fig. 7 by exposure and development (photolithography process); then, under the mask of the second photoresist portion 70, the second pre-insulating layer 61 is etched, a portion of the second pre-insulating layer 61 is removed, and a second insulating layer 60 having a plurality of through holes 62 arranged in an array is formed, wherein each through hole 62 exposes a portion of the surface of the electrode layer 50, and a portion of the electrode layer 50 corresponding to the exposed surface is one of the electrodes 52. The through holes 62 are through holes 62 having a circular cross-sectional shape, and as shown in fig. 9, the diameter of the through holes 62 is 5 μm or 10 μm, and the pitch of the through holes 62 is 150 μm or 200 μm, and since the through holes 62 correspond to the electrodes 52 one by one, the diameter of the electrodes 52 is 5 μm or 10 μm, and the pitch of the electrodes 52 is 150 μm or 200 μm, thereby forming the structure shown in fig. 8.
The semiconductor device formed by the method can effectively prevent the problem of device failure caused by seawater corrosion, and can better meet the application of seawater in-situ detection.
From the above description, it can be seen that the above-described embodiments of the present application achieve the following technical effects:
1) the material of the first insulating layer and/or the material of the second insulating layer in the semiconductor device are/is amorphous silicon carbide, and the material can effectively prevent the problem of device failure caused by seawater corrosion. In a solution of 1mol/L NaCl (pH 7) at 25 ℃, the silicon carbide can be ensured not to lose efficacy within 700 hours, and the service life of the semiconductor device is greatly prolonged. In addition, the silicon carbide has good corrosion resistance to strong corrosive solutions such as strong acid, strong alkali and the like, and can better meet the application of seawater in-situ detection.
2) In the manufacturing method, the first insulating layer and the second insulating layer are arranged on the surface of the substrate, and the material of the first insulating layer and/or the material of the second insulating layer comprise amorphous silicon carbide, so that the problem of device failure caused by seawater corrosion can be effectively solved. In a solution of 1mol/L NaCl (pH 7) at 25 ℃, the silicon carbide can be ensured not to lose efficacy within 700 hours, and the service life of the semiconductor device is greatly prolonged. In addition, the silicon carbide has good corrosion resistance to strong corrosive solutions such as strong acid, strong alkali and the like, and can better meet the application of seawater in-situ detection.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (10)

1. A semiconductor device, characterized in that the semiconductor device comprises:
a substrate;
a first insulating layer on a surface of the substrate;
an electrode layer located on the surface of the first insulating layer far from the substrate;
the second insulating layer is positioned on the surface of the electrode layer far away from the first insulating layer, the second insulating layer is provided with a plurality of through holes which are arranged at intervals, each through hole enables a part of the surface of the electrode layer to be exposed, and the material of the second insulating layer and/or the material of the first insulating layer comprise amorphous silicon carbide.
2. The semiconductor device according to claim 1, wherein a material of the second insulating layer and a material of the first insulating layer comprise amorphous silicon carbide.
3. The semiconductor device according to claim 1, wherein a plurality of the through holes are provided at equal intervals.
4. The semiconductor device according to any one of claims 1 to 3, wherein a surface of the first insulating layer remote from the substrate includes a central region and a peripheral region, the peripheral region being surrounded outside the central region, the electrode layer being located on the central region, and the second insulating layer being further located on the peripheral region.
5. The semiconductor device according to claim 1, further comprising:
an adhesive layer between the first insulating layer and the electrode layer, the adhesive layer comprising a material that is adhesive and electrically conductive.
6. The semiconductor device according to claim 1, wherein a thickness of the first insulating layer is greater than or equal to
Figure FDA0001856015670000011
Figure FDA0001856015670000012
The thickness of the second insulating layer is smaller than the maximum width of the cross section of the through hole parallel to a first plane, the first planeThe surface is perpendicular to the thickness direction of the second insulating layer.
7. A method for manufacturing a semiconductor device, the method comprising:
step S1, providing a substrate;
a step S2 of providing a first insulating layer over the substrate;
a step S3 of providing at least an electrode layer on a surface of the first insulating layer remote from the substrate;
step S4, arranging a second insulating material on the exposed surface of the electrode layer and the exposed surface of the first insulating layer to form a second pre-insulating layer, wherein the material of the second pre-insulating layer and/or the material of the first insulating layer comprises amorphous silicon carbide;
step S5, etching the second pre-insulating layer to form a second insulating layer having a plurality of spaced through holes, where each through hole exposes a part of the surface of the electrode layer, and a part of the electrode layer corresponding to the exposed surface is one electrode.
8. The method according to claim 7, wherein a surface of the first insulating layer remote from the substrate includes a central region and a peripheral region, and the step S3 includes:
step S31, disposing a first photoresist portion on the peripheral region;
step S33 of disposing an electrode material on the central region and the exposed surface of the first photoresist portion;
step S34, removing the first photoresist portion and the electrode material on the surface of the first photoresist portion, and forming an electrode layer by the remaining electrode material in the central region.
9. The method of manufacturing according to claim 8, wherein, between the step S31 and the step S33, the step S3 further includes:
step S32, an adhesive material is arranged on the central area and the exposed surface of the first photoresist part, the adhesive material is a conductive material,
in step S33, the electrode material is disposed on the exposed surface of the adhesive material, and in step S34, the first photoresist portion and the adhesive material on the surface of the first photoresist portion are also removed, and the remaining adhesive material in the central region forms an adhesive layer.
10. The method of manufacturing according to any one of claims 7 to 9, wherein a plurality of the through holes are provided at equal intervals.
CN201811314954.4A 2018-11-06 2018-11-06 Semiconductor device and manufacturing method Active CN111141804B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811314954.4A CN111141804B (en) 2018-11-06 2018-11-06 Semiconductor device and manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811314954.4A CN111141804B (en) 2018-11-06 2018-11-06 Semiconductor device and manufacturing method

Publications (2)

Publication Number Publication Date
CN111141804A true CN111141804A (en) 2020-05-12
CN111141804B CN111141804B (en) 2023-07-18

Family

ID=70515283

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811314954.4A Active CN111141804B (en) 2018-11-06 2018-11-06 Semiconductor device and manufacturing method

Country Status (1)

Country Link
CN (1) CN111141804B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0635871A2 (en) * 1985-11-06 1995-01-25 Kanegafuchi Kagaku Kogyo Kabushiki Kaisha High heat conductive insulated substrate and method of manufacturing the same
US6171931B1 (en) * 1994-12-15 2001-01-09 Sgs-Thomson Microelectronics S.R.L. Wafer of semiconductor material for fabricating integrated devices, and process for its fabrication
US20140360571A1 (en) * 2013-06-05 2014-12-11 Lg Electronics Inc Solar cell and manufacturing method thereof
US20160343894A1 (en) * 2015-05-20 2016-11-24 Lg Electronics Inc. Solar cell and solar cell module

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0635871A2 (en) * 1985-11-06 1995-01-25 Kanegafuchi Kagaku Kogyo Kabushiki Kaisha High heat conductive insulated substrate and method of manufacturing the same
US6171931B1 (en) * 1994-12-15 2001-01-09 Sgs-Thomson Microelectronics S.R.L. Wafer of semiconductor material for fabricating integrated devices, and process for its fabrication
US20140360571A1 (en) * 2013-06-05 2014-12-11 Lg Electronics Inc Solar cell and manufacturing method thereof
US20160343894A1 (en) * 2015-05-20 2016-11-24 Lg Electronics Inc. Solar cell and solar cell module

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ZHI CAO ET AL: "Mercury-plated iridium-based microelectrode arrays for trace metal detection", 《2018 19TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY》 *

Also Published As

Publication number Publication date
CN111141804B (en) 2023-07-18

Similar Documents

Publication Publication Date Title
US10395928B2 (en) Depositing a passivation layer on a graphene sheet
US20110308942A1 (en) Microelectrode array sensor for detection of heavy metals in aqueous solutions
US7517465B2 (en) Ultra lightweight photovoltaic device and method for its manufacture
US5378343A (en) Electrode assembly including iridium based mercury ultramicroelectrode array
CN105609587B (en) The fine line metallization that optoelectronic device is partially stripped to realize by optical coating
US9291543B1 (en) PC board mount corrosion sensitive sensor
WO2017218835A1 (en) Providing a temporary protective layer on a graphene street
US8192788B1 (en) Single step current collector deposition process for energy storage devices
US9506891B2 (en) Making imprinted thin-film electronic sensor structure
EP2073275A3 (en) Metallization Contact Structures and Methods for Forming Multiple-Layer Electrode Structures for Silicon Solar Cells
CN101375155A (en) An interdigitated microelectrode and a process for producing the interdigitated microelectrode
CN105185674A (en) Preparation method for TEM (transmission electron microscope) micro-grid
WO2022252317A1 (en) Humidity-sensitive capacitor, manufacturing method therefor, and humidity measuring device
CN110690171A (en) Manufacturing method of array substrate, array substrate and display panel
CN105185679A (en) TEM (transmission electron microscope) micro-grid
CN111141804B (en) Semiconductor device and manufacturing method
WO2014053855A1 (en) Microelectrode for molten salts
JP2970534B2 (en) Manufacturing method of reference electrode
JP2004525389A (en) Electrode system for electrochemical sensor
US20080257720A1 (en) Electrode System for an Electrochemical Sensor
US20210255136A1 (en) Microfabricated Electrochemical Gas Sensor
JP4841316B2 (en) Diamond electrode
CN111403502A (en) Method for preparing contact electrode of infrared detector chip
CN111122978A (en) Conductivity sensor and preparation method thereof
JP5824012B2 (en) Electrochemical sensor

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant