CN110993724A - Texturing and cleaning method for heterojunction solar cell - Google Patents
Texturing and cleaning method for heterojunction solar cell Download PDFInfo
- Publication number
- CN110993724A CN110993724A CN201910990052.0A CN201910990052A CN110993724A CN 110993724 A CN110993724 A CN 110993724A CN 201910990052 A CN201910990052 A CN 201910990052A CN 110993724 A CN110993724 A CN 110993724A
- Authority
- CN
- China
- Prior art keywords
- cleaning
- silicon wafer
- texturing
- solution
- alkali
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02082—Cleaning product to be cleaned
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/072—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
- H01L31/0747—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer or HIT® solar cells; solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a texturing and cleaning method of a heterojunction solar cell, which sequentially comprises the following steps: pre-cleaning, rough polishing and texturing, smooth treatment of a suede, alkali cleaning, acid cleaning, DHF cleaning and drying are carried out on the silicon wafer. The cleaning method adjusts the alkali cleaning to the smooth treatment, and the acid cleaning is used in the smooth treatment, so that the alkali cleaning is added after the acid cleaning, the residual liquid of the acid cleaning before the cleaning can be neutralized, and the marks formed in the previous step can be removed in a slight corrosion mode. By optimizing the texturing process, the optimal cleaning effect can be achieved, the EL reject ratio is effectively reduced, and the Voc and FF of the heterojunction battery are improved.
Description
Technical Field
The invention belongs to the field of photovoltaic solar cell manufacturing, and relates to a texturing and cleaning method for a heterojunction solar cell.
Background
Solar photovoltaic power generation has great application prospect, and the high-efficiency crystalline silicon battery becomes the mainstream of market research and development at present. The heterojunction cell adopts an amorphous silicon/crystalline silicon heterojunction structure, and is a high-efficiency crystalline silicon solar cell which can be realized at low cost. The texturing and cleaning process is a crucial step in the manufacturing process of the heterojunction solar cell and has a great influence on the electrical property of the finished cell. Therefore, optimizing the wet chemical treatment technology of the silicon wafer surface, reducing the defects and impurities introduced by the unclean silicon wafer surface, and reducing the carrier recombination loss of the heterojunction interface is a prerequisite for obtaining a high-performance battery.
Clean silicon wafer surface means that impurity particles, metals, organic matters, moisture molecules and natural oxidation films do not exist on the silicon surface. The general wool making and cleaning of the heterojunction battery firstly removes organic matters, then dissolves an oxide layer, and then removes particles and metals. However, in the existing general texturing and cleaning process flow of the heterojunction battery, marks are left at clamping teeth, pressure bars and the like of the flower basket due to insufficient reaction and incomplete cleaning. And the PL diagram after CVD and the EL diagram of the finished cell are clearly visible, which affect the electrical performance of the cell and cause a lot of rework and degradation of the cell.
In order to solve the problems, the invention provides a texturing cleaning method for a heterojunction solar cell, which can achieve the best cleaning effect, effectively reduce the EL reject ratio and improve the Voc and FF of the heterojunction solar cell.
Disclosure of Invention
In view of the above, the cleaning method for etching a heterojunction solar cell according to the present invention adjusts the alkali cleaning to the smoothing treatment, and the smoothing treatment uses the acid cleaning, and the alkali cleaning is added after the acid cleaning, so that the residual liquid of the acid cleaning before the cleaning can be neutralized, and the mark formed before the cleaning can be removed by slightly corroding. By optimizing the texturing process, the optimal cleaning effect can be achieved, the EL reject ratio is effectively reduced, and the Voc and FF of the heterojunction battery are improved.
A texturing and cleaning method for a heterojunction solar cell sequentially comprises the following steps:
(1) pre-cleaning a silicon wafer;
(2) roughly polishing and texturing the silicon wafer;
(3) performing suede smoothing treatment on the silicon wafer;
(4) carrying out alkali cleaning on the silicon wafer;
(5) acid cleaning is carried out on the silicon chip;
(6) DHF cleaning is carried out on the silicon wafer;
(7) and (5) drying.
Preferably, the specific operation steps are as follows:
(1) pre-cleaning a silicon wafer: using ammonia water and H for silicon wafer2O2The mixed solution is cleaned for 180 seconds and 400 seconds at the temperature of 70-90 ℃;
(2) rough polishing: washing the silicon wafer washed in the step (1) for 60-240s at 80-90 ℃ by using an alkali solution;
(3) texturing: treating the silicon wafer after the rough polishing in the step (2) for 600-900s at 70-90 ℃ by using an alkali solution and an alcohol additive;
(4) smooth treatment of the suede: using HF and HNO to the silicon wafer subjected to the texturing in the step (3)3Treating the mixed solution at 5-25 deg.C for 60-180 s;
(5) alkali cleaning: using ammonia water and H to the silicon wafer subjected to the smoothing treatment in the step (4)2O2The mixed solution is cleaned for 180 seconds and 400 seconds at the temperature of 70-90 ℃;
(6) acid cleaning: using HCL and H to the silicon chip subjected to alkali cleaning in the step (5)2O2The mixed solution is cleaned for 180-400s at the temperature of 60-70 ℃;
(7) DHF cleaning: cleaning the silicon wafer subjected to acid cleaning in the step (6) for 60-300s by using an HF solution;
(8) drying: and (4) drying the silicon wafer cleaned in the step (7) at 70-90 ℃ for 180-300 s.
The invention firstly carries out suede smooth treatment, then carries out alkali cleaning and acid cleaning, because the smooth treatment uses acid cleaning, the alkali cleaning is added after the acid cleaning, can neutralize the residual liquid of the acid cleaning before the acid cleaning, and can remove the mark formed in the previous step by a slight corrosion mode. The cleaning sequence can significantly reduce poor EL and improve the electrical performance of the cell.
Preferably, the mass percent of ammonia water in the mixed solution of the step (1) and the step (5) is 2-5%, and H is2O2Is 4-7% (NH)3·H2O:H2O2:H2O=1:1:5-10)。
Preferably, the alkali solution in the step (2) is KOH or NaOH solution, and the mass percent of the KOH or the NaOH is 10-15%.
Preferably, the alkali solution in the step (3) is a KOH or NaOH solution, and the mass percent of the KOH or the NaOH is 5-10%.
Preferably, the mass percent of HF in the mixed solution in the step (4) is 0.9-2.1%, and HNO3Is 50-80 percent by mass.
Preferably, the step (6) mixes the HCL and the H in the solution2O2The mass percentage of the components is 5-20%.
Preferably, the mass percent of HF in the step (7) is 5-15%.
Compared with the prior art, the invention has the following beneficial effects: the texture pyramid tips and the bottom of the tower formed by the primary silicon wafer cleaned by the texturing cleaning method are more rounded, the EL reject ratio is effectively reduced, the Voc and FF of the heterojunction battery are improved, and the passivation effect of amorphous silicon is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a flow diagram of a felting cleaning method of the present invention;
FIG. 2 is a PL profile obtained by using an optical analysis instrument after CVD of a silicon wafer according to example 1 of the present invention;
FIG. 3 is a PL profile obtained using a light analysis instrument after CVD for a comparative silicon wafer in accordance with the present invention;
FIG. 4 is an EL chart of a battery obtained in example 1 of the present invention;
FIG. 5 is an EL plot of a cell made according to a comparative example of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
A texturing and cleaning method for a heterojunction solar cell comprises the following specific operation steps:
(1) pre-cleaning a silicon wafer: using ammonia water and H for silicon wafer2O2Cleaning the mixed solution at 70 ℃ for 180 s; the mass percent of ammonia water in the mixed solution is 2 percent, H2O2The mass percentage of (A) is 4%;
(2) rough polishing: cleaning the silicon wafer cleaned in the step (1) for 60s at 80 ℃ by using an alkali solution; the alkaline solution is KOH, the mass percent of KOH is 10 percent;
(3) texturing: treating the roughly polished silicon wafer in the step (2) for 600s at 70 ℃ by using an alkali solution and an alcohol additive; the alkaline solution is KOH, the mass percent of KOH is 5 percent;
(4) smooth treatment of the suede: using HF and HNO to the silicon wafer after the texturing in the step (3)3Treating the mixed solution at 5 ℃ for 60 s; the mass percent of HF in the mixed solution is 0.9 percent, and HNO3Is 50 percent;
(5) alkali cleaning: using ammonia water and H for the silicon wafer subjected to the smoothing treatment in the step (4)2O2Cleaning the mixed solution at 70 ℃ for 180 s; the mass percent of ammonia water in the mixed solution is 2 percent, H2O2The mass percentage of (A) is 4%;
(6) acid cleaning: using HCL and H for the silicon chip subjected to alkali cleaning in the step (5)2O2Cleaning the mixed solution at 60 ℃ for 180 s; HCL and H2O2The mass percentage of (A) is 5%.
(7) DHF cleaning: cleaning the silicon wafer subjected to acid cleaning in the step (6) for 60s by using an HF solution; the mass percent of the HF is 5%;
(8) drying: drying the silicon wafer cleaned in the step (7) for 180s at 70 ℃;
(9) and (4) preparing the silicon wafer obtained in the step (8) into a heterojunction battery according to a traditional battery preparation method. Using a light analysis instrument to obtain a PL profile of the silicon wafer after CVD (FIG. 2); after the cell was made, an EL plot was obtained using electroluminescent imaging techniques (FIG. 4), and the cell terminal electrical performance was characterized by an increase in Eta of 0.11%, mainly a 1.4mV increase in Voc and a 0.2% increase in FF.
Example 2
A texturing and cleaning method for a heterojunction solar cell comprises the following specific operation steps:
(1) pre-cleaning a silicon wafer: using ammonia water and H for silicon wafer2O2Cleaning the mixed solution at 80 ℃ for 300 s; the mass percent of ammonia water in the mixed solution is 3 percent, H2O2The mass percentage of (A) is 6%;
(2) rough polishing: cleaning the silicon wafer cleaned in the step (1) for 180s at 90 ℃ by using an alkali solution; NaOH solution, wherein the mass percent of NaOH is 13%;
(3) texturing: treating the roughly polished silicon wafer in the step (2) for 800s at 80 ℃ by using an alkali solution and an alcohol additive; the aqueous alkali is NaOH solution, and the mass percent of NaOH is 8%;
(4) smooth treatment of the suede: using HF and HNO to the silicon wafer after the texturing in the step (3)3Treating the mixed solution at 15 ℃ for 100 s; the mass percent of HF in the mixed solution is 1.5%, and HNO3The mass percentage of (A) is 70%;
(5) alkali cleaning: using ammonia water and H for the silicon wafer subjected to the smoothing treatment in the step (4)2O2Cleaning the mixed solution at 80 ℃ for 250 s; the mass percent of ammonia water in the mixed solution is 4 percent, H2O2The mass percentage of (A) is 6%;
(6) acid cleaning: using HCL and H for the silicon chip subjected to alkali cleaning in the step (5)2O2Cleaning the mixed solution at 70 ℃ for 350 s; HCL and H2O2The mass percentage of (A) is 15%.
(7) DHF cleaning: cleaning the silicon wafer subjected to acid cleaning in the step (6) for 200s by using an HF solution; the mass percent of HF is 10%;
(8) drying: drying the silicon wafer cleaned in the step (7) for 250s at 80 ℃;
(9) and (4) preparing the silicon wafer obtained in the step (8) into a heterojunction battery according to a traditional battery preparation method.
Example 3
A texturing and cleaning method for a heterojunction solar cell comprises the following specific operation steps:
(1) pre-cleaning a silicon wafer: using ammonia water and H for silicon wafer2O2Cleaning the mixed solution at 80 ℃ for 300 s; the mass percent of ammonia water in the mixed solution is 5 percent, H2O2The mass percentage of (A) is 7%;
(2) rough polishing: cleaning the silicon wafer cleaned in the step (1) for 180s at 90 ℃ by using an alkali solution; the alkali solution is a KOH solution, and the mass percent of KOH is 15 percent;
(3) texturing: treating the roughly polished silicon wafer in the step (2) for 700s at 80 ℃ by using an alkali solution and an alcohol additive; the alkali solution is KOH solution, and the mass percent of KOH is 6 percent;
(4) smooth treatment of the suede: using HF and HNO to the silicon wafer after the texturing in the step (3)3Treating the mixed solution at 20 ℃ for 180 s; the mass percent of HF in the mixed solution is 2.0 percent, and HNO3Is 80 percent;
(5) alkali cleaning: using ammonia water and H for the silicon wafer subjected to the smoothing treatment in the step (4)2O2Cleaning the mixed solution at 80 ℃ for 350 s; the mass percentage of ammonia water in the mixed solution is4%,H2O2The mass percentage of (A) is 7%;
(6) acid cleaning: using HCL and H for the silicon chip subjected to alkali cleaning in the step (5)2O2Washing the mixed solution at 70 ℃ for 300 s; HCL and H2O2The mass percentage of (A) is 10%.
(7) DHF cleaning: cleaning the silicon wafer subjected to acid cleaning in the step (6) for 150 seconds by using an HF solution; the mass percent of the HF is 8%;
(8) drying: drying the silicon wafer cleaned in the step (7) for 250s at 80 ℃;
(9) and (4) preparing the silicon wafer obtained in the step (8) into a heterojunction battery according to a traditional battery preparation method.
Example 4
A texturing and cleaning method for a heterojunction solar cell comprises the following specific operation steps:
(1) pre-cleaning a silicon wafer: using ammonia water and H for silicon wafer2O2Cleaning the mixed solution at 90 ℃ for 400 s; the mass percent of ammonia water in the mixed solution is 5 percent, H2O2The mass percentage of (A) is 7%;
(2) rough polishing: washing the silicon wafer washed in the step (1) for 240s at 90 ℃ by using an alkali solution; the aqueous alkali is NaOH solution, and the mass percent of NaOH is 15%;
(3) texturing: treating the roughly polished silicon wafer in the step (2) for 900s at 90 ℃ by using an alkali solution and an alcohol additive; the aqueous alkali is NaOH solution, and the mass percent of NaOH is 10%;
(4) smooth treatment of the suede: using HF and HNO to the silicon wafer after the texturing in the step (3)3Treating the mixed solution at 25 ℃ for 180 s; the mass percent of HF in the mixed solution is 2.1 percent, and HNO3Is 80 percent;
(5) alkali cleaning: using ammonia water and H for the silicon wafer subjected to the smoothing treatment in the step (4)2O2Cleaning the mixed solution at 90 ℃ for 400 s; the mass percent of ammonia water in the mixed solution is 5 percent, H2O2The mass percentage of (A) is 7%;
(6) acid cleaning: using HCL and H for the silicon chip subjected to alkali cleaning in the step (5)2O2In the mixing ofWashing with the solution at 70 deg.C for 400 s; HCL and H2O2The mass percentage of (A) is 20%.
(7) DHF cleaning: cleaning the silicon wafer subjected to acid cleaning in the step (6) for 300s by using an HF solution; the mass percent of the HF is 15 percent;
(8) drying: drying the silicon wafer cleaned in the step (7) for 300s at 70-90 ℃;
(9) and (4) preparing the silicon wafer obtained in the step (8) into a heterojunction battery according to a traditional battery preparation method.
Example 5
A texturing and cleaning method for a heterojunction solar cell comprises the following specific operation steps:
(1) pre-cleaning a silicon wafer: using ammonia water and H for silicon wafer2O2Cleaning the mixed solution at 90 ℃ for 180 s; the mass percent of ammonia water in the mixed solution is 2 percent, H2O2The mass percentage of (A) is 4%;
(2) rough polishing: cleaning the silicon wafer cleaned in the step (1) for 60s at 90 ℃ by using an alkali solution; the aqueous alkali is NaOH solution, and the mass percent of NaOH is 10-15%;
(3) texturing: treating the roughly polished silicon wafer in the step (2) for 600s at 90 ℃ by using an alkali solution and an alcohol additive; the alkali solution is KOH solution, and the mass percent of KOH is 10 percent;
(4) smooth treatment of the suede: using HF and HNO to the silicon wafer after the texturing in the step (3)3Treating the mixed solution at 25 ℃ for 60 s; the mass percent of HF in the mixed solution is 2.1 percent, and HNO3Is 80 percent;
(5) alkali cleaning: using ammonia water and H for the silicon wafer subjected to the smoothing treatment in the step (4)2O2Cleaning the mixed solution at 90 ℃ for 180 s; the mass percent of ammonia water in the mixed solution is 5 percent, H2O2The mass percentage of (A) is 7%;
(6) acid cleaning: using HCL and H for the silicon chip subjected to alkali cleaning in the step (5)2O2Cleaning the mixed solution at 70 ℃ for 400 s; HCL and H2O2The mass percentage of (A) is 20%.
(7) DHF cleaning: cleaning the silicon wafer subjected to acid cleaning in the step (6) for 300s by using an HF solution; the mass percent of the HF is 5%;
(8) drying: drying the silicon wafer cleaned in the step (7) for 180s at 70 ℃;
(9) and (4) preparing the silicon wafer obtained in the step (8) into a heterojunction battery according to a traditional battery preparation method.
Comparative example
The cleaning method after the traditional heterojunction battery is subjected to texturing comprises the following steps: alkali cleaning → suede smoothing → acid cleaning, and the rest are carried out according to the steps in the example 1, so as to obtain a PL (figure 3) graph, an EL (figure 5) graph, and the battery end electric performance is verified, and after the wool making cleaning is carried out by using a conventional method, the Voc and FF of the battery are slightly lower.
From the PL diagram and EL diagram of example 1 and comparative example, it can be seen that: the PL plot (fig. 3) after CVD of comparative example shows the presence of a clear black line at the location of the flower basket struts and also evident in the EL plot (fig. 5) after cell fabrication, resulting in poor EL. Whereas example 1 used an optimized texturing cleaning method, the black line marks of the flower basket strut positions were significantly removed as seen in the PL (fig. 2) and EL (fig. 4) plots.
Table 1 cell end electrical performance verification results
The data comparison in the table 1 shows that the patent technology can solve the problem of EL abnormity caused by poor etching and cleaning of the existing heterojunction battery, and can obviously improve the electrical property of the battery.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (8)
1. The texturing and cleaning method for the heterojunction solar cell is characterized by sequentially comprising the following steps of:
(1) pre-cleaning a silicon wafer;
(2) roughly polishing and texturing the silicon wafer;
(3) performing suede smoothing treatment on the silicon wafer;
(4) carrying out alkali cleaning on the silicon wafer;
(5) acid cleaning is carried out on the silicon chip;
(6) DHF cleaning is carried out on the silicon wafer;
(7) and (5) drying.
2. The solar cell texturing and cleaning method of claim 1, comprising the following specific steps:
(1) pre-cleaning a silicon wafer: using ammonia water and H for silicon wafer2O2The mixed solution is cleaned for 180 seconds and 400 seconds at the temperature of 70-90 ℃;
(2) rough polishing: washing the silicon wafer washed in the step (1) for 60-240s at 80-90 ℃ by using an alkali solution;
(3) texturing: treating the silicon wafer after the rough polishing in the step (2) for 600-900s at 70-90 ℃ by using an alkali solution and an alcohol additive;
(4) smooth treatment of the suede: using HF and HNO to the silicon wafer subjected to the texturing in the step (3)3Treating the mixed solution at 5-25 deg.C for 60-180 s;
(5) alkali cleaning: using ammonia water and H to the silicon wafer subjected to the smoothing treatment in the step (4)2O2The mixed solution is cleaned for 180 seconds and 400 seconds at the temperature of 70-90 ℃;
(6) acid cleaning: using HCL and H to the silicon chip subjected to alkali cleaning in the step (5)2O2The mixed solution is cleaned for 180-400s at the temperature of 60-70 ℃;
(7) DHF cleaning: cleaning the silicon wafer subjected to acid cleaning in the step (6) for 60-300s by using an HF solution;
(8) drying: and (4) drying the silicon wafer cleaned in the step (7) at 70-90 ℃ for 180-300 s.
3. The etching and cleaning method for the heterojunction solar cell of claim 2, wherein the mass percentage of the ammonia water in the mixed solution of the step (1) and the step (5) is 2-5%, and the concentration of H is 2-5%2O2The mass percentage of (B) is 4-7%.
4. The method for cleaning heterojunction solar cell as claimed in claim 2, wherein the alkali solution in step (2) is KOH or NaOH solution, and the mass percentage of KOH or NaOH is 10-15%.
5. The method for cleaning heterojunction solar cell as claimed in claim 2, wherein the alkali solution in step (3) is KOH or NaOH solution, and the mass percentage of KOH or NaOH is 5-10%.
6. The etching cleaning method for the heterojunction solar cell of claim 2, wherein the mixed solution of the step (4) contains 0.9-2.1% by mass of HF and HNO3Is 50-80 percent by mass.
7. The solar cell texturing and cleaning method of claim 2, wherein the step (6) of mixing HCl and H in solution2O2The mass percentage of the components is 5-20%.
8. The solar cell texturing and cleaning method of claim 2, wherein the mass percentage of HF in the step (7) is 5-15%.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910990052.0A CN110993724A (en) | 2019-10-17 | 2019-10-17 | Texturing and cleaning method for heterojunction solar cell |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910990052.0A CN110993724A (en) | 2019-10-17 | 2019-10-17 | Texturing and cleaning method for heterojunction solar cell |
Publications (1)
Publication Number | Publication Date |
---|---|
CN110993724A true CN110993724A (en) | 2020-04-10 |
Family
ID=70082098
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910990052.0A Pending CN110993724A (en) | 2019-10-17 | 2019-10-17 | Texturing and cleaning method for heterojunction solar cell |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110993724A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112466978A (en) * | 2020-11-12 | 2021-03-09 | 晋能光伏技术有限责任公司 | Battery structure of crystalline silicon/amorphous silicon heterojunction battery and preparation method thereof |
CN113078078A (en) * | 2021-03-19 | 2021-07-06 | 长鑫存储技术有限公司 | Wafer cleaning method and wafer cleaning device |
CN114823951A (en) * | 2022-06-28 | 2022-07-29 | 晶科能源(海宁)有限公司 | Solar cell and photovoltaic module |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102017176A (en) * | 2008-03-25 | 2011-04-13 | 应用材料股份有限公司 | Surface cleaning and texturing process for crystalline solar cells |
CN103346204A (en) * | 2013-06-07 | 2013-10-09 | 中利腾晖光伏科技有限公司 | Polycrystalline chained multi-step texturing technology |
CN103700733A (en) * | 2014-01-16 | 2014-04-02 | 常州天合光能有限公司 | Cleaning treatment method of N-type crystalline silicon substrate of solar cell |
CN105895714A (en) * | 2016-06-22 | 2016-08-24 | 苏州协鑫集成科技工业应用研究院有限公司 | Smooth modification liquid, smooth modification method, heterojunction solar cell silicon wafer and heterojunction solar cell |
CN106098840A (en) * | 2016-06-17 | 2016-11-09 | 湖洲三峰能源科技有限公司 | A kind of black silicon preparation method of wet method |
CN106449808A (en) * | 2016-10-25 | 2017-02-22 | 苏州阿特斯阳光电力科技有限公司 | Preparation method of suede structure of crystalline silicon solar cell |
CN107658221A (en) * | 2017-09-19 | 2018-02-02 | 南京纳鑫新材料有限公司 | A kind of etching method of Buddha's warrior attendant wire cutting polysilicon chip |
CN108411364A (en) * | 2018-04-03 | 2018-08-17 | 锦州华昌光伏科技有限公司 | A kind of process for etching of antiradar reflectivity monocrystalline silicon |
CN108447944A (en) * | 2018-03-26 | 2018-08-24 | 江苏顺风光电科技有限公司 | A kind of N-type PERT double-side cell preparation methods |
CN108611681A (en) * | 2018-04-19 | 2018-10-02 | 苏州协鑫光伏科技有限公司 | The re-treating process of the black silicon silicon chip defective products of wet method |
-
2019
- 2019-10-17 CN CN201910990052.0A patent/CN110993724A/en active Pending
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102017176A (en) * | 2008-03-25 | 2011-04-13 | 应用材料股份有限公司 | Surface cleaning and texturing process for crystalline solar cells |
CN103346204A (en) * | 2013-06-07 | 2013-10-09 | 中利腾晖光伏科技有限公司 | Polycrystalline chained multi-step texturing technology |
CN103700733A (en) * | 2014-01-16 | 2014-04-02 | 常州天合光能有限公司 | Cleaning treatment method of N-type crystalline silicon substrate of solar cell |
CN106098840A (en) * | 2016-06-17 | 2016-11-09 | 湖洲三峰能源科技有限公司 | A kind of black silicon preparation method of wet method |
CN105895714A (en) * | 2016-06-22 | 2016-08-24 | 苏州协鑫集成科技工业应用研究院有限公司 | Smooth modification liquid, smooth modification method, heterojunction solar cell silicon wafer and heterojunction solar cell |
CN106449808A (en) * | 2016-10-25 | 2017-02-22 | 苏州阿特斯阳光电力科技有限公司 | Preparation method of suede structure of crystalline silicon solar cell |
CN107658221A (en) * | 2017-09-19 | 2018-02-02 | 南京纳鑫新材料有限公司 | A kind of etching method of Buddha's warrior attendant wire cutting polysilicon chip |
CN108447944A (en) * | 2018-03-26 | 2018-08-24 | 江苏顺风光电科技有限公司 | A kind of N-type PERT double-side cell preparation methods |
CN108411364A (en) * | 2018-04-03 | 2018-08-17 | 锦州华昌光伏科技有限公司 | A kind of process for etching of antiradar reflectivity monocrystalline silicon |
CN108611681A (en) * | 2018-04-19 | 2018-10-02 | 苏州协鑫光伏科技有限公司 | The re-treating process of the black silicon silicon chip defective products of wet method |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112466978A (en) * | 2020-11-12 | 2021-03-09 | 晋能光伏技术有限责任公司 | Battery structure of crystalline silicon/amorphous silicon heterojunction battery and preparation method thereof |
CN113078078A (en) * | 2021-03-19 | 2021-07-06 | 长鑫存储技术有限公司 | Wafer cleaning method and wafer cleaning device |
CN114823951A (en) * | 2022-06-28 | 2022-07-29 | 晶科能源(海宁)有限公司 | Solar cell and photovoltaic module |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103151423B (en) | A kind of polycrystalline silicon texturing cleaning process | |
CN110993724A (en) | Texturing and cleaning method for heterojunction solar cell | |
CN102343352B (en) | Recovery method for solar silicon slice | |
CN105576080B (en) | The Buddha's warrior attendant wire cutting polysilicon chip and its etching method of a kind of one texture-etching side | |
CN102270702A (en) | Rework process for texturing white spot monocrystalline silicon wafer | |
CN109537058B (en) | Wet black silicon preparation process | |
CN113421946B (en) | Rework process of solar cell | |
CN110943144A (en) | Texturing and cleaning method for heterojunction battery | |
CN106409977B (en) | A kind of cleaning method of silicon chip of solar cell, the preparation method of solar cell | |
CN103480598A (en) | Silicon wafer cleaning method for preparing high-efficiency solar cell and cleaning equipment | |
CN103789839B (en) | A kind of etching method of weak oxide monocrystalline silicon piece | |
CN110165015A (en) | A kind of solar energy single crystal battery slice etching technique | |
US20130252427A1 (en) | Method for cleaning textured silicon wafers | |
CN110571309B (en) | Poly removal coil plating cleaning method | |
CN103606595A (en) | Reutilization method and grating line recovery method of defective monocrystalline silicon battery sheet after sintering | |
CN111403561A (en) | Silicon wafer texturing method | |
CN109148265A (en) | A kind of solar energy polycrystal RIE prepares the cleaning process before black silicon | |
CN114256382A (en) | Texturing and cleaning method for silicon wafer and preparation method for crystalline silicon solar cell | |
CN107393818A (en) | A kind of secondary etching method of the soda acid of polysilicon solar cell and its polysilicon | |
CN106449373A (en) | Heterojunction cell texturing and washing method | |
CN104393094B (en) | N-type silicon chip cleaning texturing method for HIT battery | |
CN110518080B (en) | Reworking method of acid texturing polycrystalline battery | |
CN103806108A (en) | Improved crystalline silicon battery slice cleaning process | |
CN107275423B (en) | A kind of processing method promoting black silion cell transfer efficiency | |
CN107482081B (en) | Solar cell, preparation method thereof and solar cell |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200410 |
|
RJ01 | Rejection of invention patent application after publication |