CN110967581A - Test system and method - Google Patents
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- CN110967581A CN110967581A CN201911184921.7A CN201911184921A CN110967581A CN 110967581 A CN110967581 A CN 110967581A CN 201911184921 A CN201911184921 A CN 201911184921A CN 110967581 A CN110967581 A CN 110967581A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/26—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured
- H02H7/268—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured for dc systems
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Abstract
The application provides a test system and a test method, wherein the test system comprises test equipment and an upper computer electrically connected with the test equipment, and the test equipment is electrically connected with a direct current control protection device. The testing device comprises a power supply module, a mainboard module, a current module, a voltage module and a digital module. When the direct current control module is tested, the main board module obtains the target type of the digital message, the upper computer obtains the target type, so that the digital compensation phase corresponding to the target type is obtained, and the digital compensation phase is issued to the main board module. The current module compensates according to a preset first compensation phase, the voltage module compensates according to a preset second compensation phase, and the digital module compensates according to a digital compensation phase, so that data signals keep synchronous when the data signals are output to the testing equipment, and the fact that the direct current control protection device receives analog quantity and digital quantity which are output synchronously is guaranteed.
Description
Technical Field
The application relates to the technical field of testing of control protection devices in direct current converter stations, in particular to a testing system and a testing method.
Background
In a dc transmission system, a converter station is usually set up to convert ac power into dc power or vice versa and to meet the requirements of a power system for safety, stability and power quality. The converter station is provided with a direct current control protection device which mainly protects an alternating current protection area, a converter protection area and a direct current protection area. An electromagnetic mutual inductor is generally adopted in an alternating current protection area, a protection voltage/current sampling signal is an analog quantity, and the analog quantity is divided into an analog voltage signal and an analog current signal. The valve side protection and the direct current protection of the converter protection area mainly adopt electronic mutual inductors, and protection voltage/current sampling signals are digital quantities, such as high-speed digital FT3 messages, and the digital quantities are generally called digital messages. The direct current control protection device receives the analog quantity and/or the digital quantity sent by each protection area, and calculates according to the received analog quantity and/or digital quantity to judge whether the protection areas can normally operate.
Since the normal operation of the protection zones is crucial, it is necessary for the dc control protection device to be able to test the status of each protection zone timely and accurately. In order to implement this function, it is necessary to ensure that the dc control protection device can normally operate, and usually, a test device is used to detect whether the dc control protection device can normally operate, and the specific method is as follows: the method comprises the steps of applying an analog quantity or a digital quantity to a direct current control protection device, and determining whether the direct current control protection device can work normally or not by testing the reflection of the direct current control protection device after receiving the analog quantity or the digital quantity.
However, when the loop differential protection is started, the dc control protection device needs to receive the analog quantity and the digital quantity at the same time and then perform differential calculation, and thus the test equipment needs to apply the analog quantity and the digital quantity to the dc control protection device at the same time. However, the conventional analog relay protection tester or digital relay protection tester can only apply analog quantity or digital quantity to the dc control protection device, so a test device capable of synchronously outputting analog quantity and digital quantity is needed to enable the dc control protection device to receive analog quantity and digital quantity at the same time.
Disclosure of Invention
The application provides a test system and a test method, which are used for solving the problem that the conventional test equipment cannot synchronously output analog quantity and digital quantity.
In a first aspect of the present application, a test system is provided, which includes: the test equipment is electrically connected with the direct current control protection device and is used for transmitting analog current signals, analog voltage signals and digital messages which are synchronously output to the direct current control protection device, wherein,
the upper computer is used for acquiring a first compensation phase corresponding to the analog current signal and a second compensation phase corresponding to the analog voltage signal, acquiring a target type of a preset digital message, and acquiring a digital compensation phase corresponding to the digital message according to the relation between the target type and the digital compensation phase; sending the first compensated phase, the second compensated phase and the digital compensated phase to the test equipment;
the test equipment comprises a power supply module, a mainboard module, a current module, a voltage module and a digital module, wherein the current module, the voltage module and the digital module are electrically connected with the mainboard module;
the power supply module is used for supplying power to the mainboard module, the current module, the voltage module and the digital module;
the main board module is electrically connected with the upper computer and is used for receiving a digital compensation phase, a first compensation phase and a second compensation phase sent by the upper computer and respectively sending data signals to the current module, the voltage module and the digital module, wherein the data signals comprise the analog current signal, the analog voltage signal and the digital message;
the current module is configured to obtain the analog current signal and the first compensation phase, and reset a first initial phase to a first replacement phase, where the first replacement phase is a sum of the first initial phase and the first compensation phase, and the first initial phase is an initial phase of the analog current signal received by the current module;
the voltage module is configured to obtain the analog voltage signal and the second compensation phase, and reset a second initial phase to a second replacement phase, where the second replacement phase is a sum of the second initial phase and the second compensation phase, and the second initial phase is an initial phase of the analog voltage signal received by the voltage module;
the digital module is configured to obtain the digital packet and the digital compensation phase, and reset a third initial phase to a third replacement phase, where the third replacement phase is a sum of the third initial phase and the digital compensation phase, and the third initial phase is an initial phase of the digital packet received by the digital module.
Alternatively to this, the first and second parts may,
the upper computer is used for establishing the relation between the type of the digital message and the digital compensation phase before acquiring the target type of the preset digital message.
Alternatively to this, the first and second parts may,
the upper computer is used for acquiring all types of digital messages before acquiring the target type of the preset digital message;
the upper computer is used for acquiring the length of each type of digital message according to the relationship between the type of the digital message and the length of the digital message;
the upper computer is used for calculating the transmission time t of each type of digital message according to the following formula:
wherein, l is the length of each type of digital message, and v is the transmission rate of each type of digital message;
the upper computer is used for calculating the compensation phase p of each type of digital message according to the following formula:
p＝t×a；
wherein a is a compensation phase within unit time under a preset frequency;
and the upper computer is used for establishing the corresponding relation between the digital messages of various types and the compensation phases of the digital messages.
In a second aspect of the present application, a testing method is provided, where the method is applied to a testing system provided in any one of possible implementation manners of the first aspect, and the testing system includes: the test equipment is electrically connected with the direct current control protection device and is used for transmitting analog current signals, analog voltage signals and digital messages which are synchronously output to the direct current control protection device, wherein the test equipment comprises a power module, a mainboard module, and a current module, a voltage module and a digital module which are electrically connected with the mainboard module, and the power module is used for supplying power to the mainboard module, the current module, the voltage module and the digital module; the method comprises the following steps:
the upper computer acquires a first compensation phase corresponding to the analog current signal and a second compensation phase corresponding to the analog voltage signal;
the upper computer acquires a target type of a preset digital message;
the upper computer acquires a digital compensation phase corresponding to the digital message according to the relation between the target type and the digital compensation phase;
the upper computer sends the first compensation phase, the second compensation phase and the digital compensation phase to the test equipment;
the main board module receives a digital compensation phase, a first compensation phase and a second compensation phase which are sent by the upper computer;
the main board module respectively sends data signals to the current module, the voltage module and the digital module, wherein the data signals comprise the analog current signal, the analog voltage signal and the digital message;
the current module acquires the analog current signal and the first compensation phase, and resets a first initial phase to a first replacement phase, wherein the first replacement phase is the sum of the first initial phase and the first compensation phase, and the first initial phase is the initial phase of the analog current signal received by the current module;
the voltage module acquires the analog voltage signal and the second compensation phase, and resets a second initial phase to a second replacement phase, wherein the second replacement phase is the sum of the second initial phase and the second compensation phase, and the second initial phase is the initial phase of the analog voltage signal received by the voltage module;
and the digital module acquires the digital message and the digital compensation phase, and resets a third initial phase to a third replacement phase, wherein the third replacement phase is the sum of the third initial phase and the digital compensation phase, and the third initial phase is the initial phase of the digital message received by the digital module.
Alternatively to this, the first and second parts may,
and before the upper computer acquires the target type of the preset digital message, establishing the relationship between the type of the digital message and the digital compensation phase.
Alternatively to this, the first and second parts may,
the upper computer acquires all types of digital messages before acquiring the target type of the preset digital message;
the upper computer acquires the length of each type of digital message according to the relationship between the type of the digital message and the length of the digital message;
the upper computer calculates the transmission time t of each type of digital message according to the following formula:
wherein, l is the length of each type of digital message, and v is the transmission rate of each type of digital message;
the upper computer calculates the compensation phase p of each type of digital message according to the following formula:
p＝t×a；
wherein a is a compensation phase within unit time under a preset frequency;
and the upper computer establishes the corresponding relation between the digital messages of various types and the compensation phases of the digital messages.
According to the technical scheme, the test system comprises test equipment and an upper computer electrically connected with the test equipment, wherein the test equipment is electrically connected with the direct current control protection device and is used for transmitting analog current signals, analog voltage signals and digital messages which are synchronously output to the direct current control protection device. The test equipment comprises a power module, a mainboard module, a current module, a voltage module and a digital module. When the direct current control module is tested, the main board module obtains the target type of the digital message, the upper computer obtains the target type, so that the digital compensation phase corresponding to the target type is obtained, and the digital compensation phase is issued to the main board module. The current module compensates according to a preset first compensation phase, the voltage module compensates according to a preset second compensation phase, and the digital module compensates according to a digital compensation phase, so that data signals keep synchronous when the data signals are output to the testing equipment, and the fact that the direct current control protection device receives analog quantity and digital quantity which are output synchronously is guaranteed.
Drawings
In order to more clearly explain the technical solution of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious to those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a test system according to an embodiment of the present disclosure;
fig. 2 is a testing method provided in an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to the schematic structural diagram shown in fig. 1, an embodiment of the present application provides a test system, including: the testing device 100 is electrically connected with the direct current control protection device and is used for transmitting analog current signals, analog voltage signals and digital messages which are synchronously output to the direct current control protection device.
The upper computer 200 is used for acquiring a first compensation phase corresponding to the analog current signal and a second compensation phase corresponding to the analog voltage signal, acquiring a target type of a preset digital message, and acquiring a digital compensation phase corresponding to the digital message according to a relation between the target type and the digital compensation phase; and sending the first compensation phase, the second compensation phase and the digital compensation phase to the test equipment.
In the embodiment of the present application, since the output of the analog voltage/current signal is subjected to an inherent delay generated by the power amplifier, the delay can be fixedly compensated by the signal control in the testing device, and therefore, the output of the analog voltage/current signal is considered to be a value after the phase compensation of the fixed delay. In the embodiment of the present application, it is assumed that there is an inherent delay a in the analog current signal, an inherent compensation phase of the analog current signal is a first compensation phase, the first compensation phase is a, there is an inherent delay B in the analog voltage signal, and an inherent compensation phase of the analog voltage signal is a second compensation phase, the second compensation phase is B.
Digital encoding of a digital message (e.g., FT3 message) uses manchester encoded serial data, with the most significant bit being transmitted first, and the manchester encoding transitions from low to high to a binary 1 and from high to low to a binary 0.
Digital messages commonly used in the converter station are transmitted at a sampling rate of 10K and a baud rate of 10Mbit/s, 10K complete FT3 messages are transmitted every second, and the transmission rate is 10 Mbit/s. However, the above transmission method is only one transmission rate of the digital message, and there are other cases such as 4k, 5k, 8k, 4Mbit/s, and 5 Mbit/s.
In the research process, the inventor of the application finds that in a converter station field, the FT3 message protocol of the dc control protection device of each project or each manufacturer is a proprietary protocol, and there are differences, but the overall format structure is similar. The initial message 0564H occupies 2 bytes, the corresponding information of temperature, LDName, rated value and the like respectively occupies 1 or 2 bytes, each data channel occupies 1 or 2 or 3 bytes, each manufacturer protocol deletes or increases the number of the channels according to the requirement of manufacturer equipment, the sampling counter occupies 2 bytes, and each 16 bytes following the initial character in the whole digital message are followed by a CRC check code and occupy 2 bytes, so that the digital message length of the FT3 protocol in the direct current station is mostly 18-50.
If the digital messages with different structures are used as different types, the digital messages have a plurality of fixed types, each type of digital message corresponds to different lengths, based on the fixed types, the relation between the type of the digital message and the digital compensation phase can be constructed, and the relation is stored in the upper computer. During actual test, the type of the digital message transmitted to the direct current control protection device by the test equipment is uniquely determined, the uniquely determined type is taken as a target type, and the digital compensation phase corresponding to the digital message of the target type can be determined according to the relationship between the type of the digital message and the digital compensation phase.
In the embodiment of the present application, the corresponding relationship between the digital messages of each type and the compensation phases of the digital messages may be established according to the following steps, and in addition, the relationship between the digital messages of each type and the compensation phases may be established according to the digital messages of each type and the preset compensation phases, which is not specifically limited in the present application, and the following steps are one of the establishment modes, and include:
the upper computer acquires all types of digital messages before acquiring the target type of the preset digital message;
the upper computer acquires the length of each type of digital message according to the relationship between the type of the digital message and the length of the digital message;
the upper computer calculates the transmission time t of each type of digital message according to the following formula:
wherein, l is the length of each type of digital message, and v is the transmission rate of each type of digital message;
the upper computer calculates the compensation phase p of each type of digital message according to the following formula:
p＝t×a；
wherein a is a compensation phase within unit time under a preset frequency;
and the upper computer establishes the corresponding relation between the digital messages of all types and the compensation phases of the digital messages.
In the following, the phase compensation calculation method is described by taking 30 bytes as an example, and the baud rate is 10 Mbit/s. At a frequency of 50Hz, 20ms is a full cycle, 1us for 0.018 deg.. 30B equals 30X 8-240 bit, FT3 message has a total length of 240bit, is transmitted at a speed of 10Mbit/s, i.e. 10bit/us, 24us is required from the header to the end of the entire message transmission, in the case of 50Hz, 24us corresponds to 24X 0.018-1.92 °, i.e. the compensation phase is 1.92 °. Because the lengths of different types of digital messages are different, the compensation phase during transmission can be different even under the same frequency.
In the embodiment of the present application, the testing apparatus 100 includes a power module 101, a motherboard module 102, and a current module 103, a voltage module 104, and a digital module 105 electrically connected to the motherboard module 102; the power module 101 is configured to supply power to the motherboard module 102, the current module 103, the voltage module 104, and the digital module 105.
The main board module 102 is electrically connected to the upper computer 200, and is configured to receive a digital compensation phase, a first compensation phase, and a second compensation phase sent by the upper computer, and issue data signals to the current module, the voltage module, and the digital module, respectively, where the data signals include the analog current signal, the analog voltage signal, and the digital message.
The mainboard module comprises a time setting function, a switching value function and a logic control function, the ARM module mainly comprises an ARM circuit and an FPGA circuit, the ARM circuit is responsible for logic calculation, the FPGA circuit is responsible for time sequence control and communicates with other modules, the digital module, the current module and the voltage module are respectively provided with 1 FPGA, the digital module, the current module and the voltage module are connected with the mainboard FPGA to receive communication data and receive clock signals of the mainboard FPGA, and each module and the mainboard have the same time reference.
The method for realizing synchronous output of the analog quantity and the digital quantity comprises the following steps that under the control of a mainboard FPGA, the same clock is adopted by the digital module FPGA and the voltage module FGPA, and the current module FPGA, the digital module is provided with a pulse signal for each second, the voltage module and the current module are respectively provided with a pulse signal, after the digital module FGPA, the current module FPGA and the voltage module FPGA receive the pulse signals, the phase position of a digital message corresponding to the digital quantity, the phase position of an analog quantity current signal and the phase position of an analog quantity voltage signal are reset to be the initial phase position set by the mainboard module, and the phase position drift of each module in long-time operation is prevented. In this application, the initial phase includes a first replacement phase, a second replacement phase, and a third replacement phase.
The current module 103 is configured to obtain the analog current signal and the first compensation phase, and reset a first initial phase to a first replacement phase, where the first replacement phase is a sum of the first initial phase and the first compensation phase, and the first initial phase is an initial phase of the analog current signal received by the current module.
The voltage module 104 is configured to obtain the analog voltage signal and the second compensation phase, and reset a second initial phase to a second replacement phase, where the second replacement phase is a sum of the second initial phase and the second compensation phase, and the second initial phase is an initial phase of the analog voltage signal received by the voltage module.
The digital module 105 is configured to obtain the digital packet and the digital compensation phase, and reset a third initial phase to a third replacement phase, where the third replacement phase is a sum of the third initial phase and the digital compensation phase, and the third initial phase is an initial phase of the digital packet received by the digital module.
Assuming that the first compensation phase is a, the second compensation phase is b, and the digital compensation phase is c, and the initial phases of the data signals received by the current module, the voltage module, and the digital module and issued by the motherboard module are all 0, the first replacement phase is 0+ a, the second replacement phase is 0+ b, and the third replacement phase is 0+ c. After the data signals are compensated, the phase of the data signals output from the test equipment is synchronous, and the direct current control protection device can obtain synchronous analog quantity and data quantity.
According to the technical scheme, the test system comprises the test equipment and the upper computer electrically connected with the test equipment, wherein the test equipment is electrically connected with the direct current control protection device and is used for transmitting the analog current signal, the analog voltage signal and the digital message which are synchronously output to the direct current control protection device. The test equipment comprises a power module, a mainboard module, a current module, a voltage module and a digital module. When the direct current control module is tested, the main board module obtains the target type of the digital message, the upper computer obtains the target type, so that the digital compensation phase corresponding to the target type is obtained, and the digital compensation phase is issued to the main board module. The current module compensates according to a preset first compensation phase, the voltage module compensates according to a preset second compensation phase, and the digital module compensates according to a digital compensation phase, so that data signals keep synchronous when the data signals are output to the testing equipment, and the fact that the direct current control protection device receives analog quantity and digital quantity which are output synchronously is guaranteed.
Referring to a work flow chart shown in fig. 2, an embodiment of the present application provides a testing method, which is applied to the testing system provided in fig. 1, where the testing system includes: the test equipment is electrically connected with the direct current control protection device and is used for transmitting analog current signals, analog voltage signals and digital messages which are synchronously output to the direct current control protection device, wherein the test equipment comprises a power module, a mainboard module, and a current module, a voltage module and a digital module which are electrically connected with the mainboard module, and the power module is used for supplying power to the mainboard module, the current module, the voltage module and the digital module; the method comprises the following steps:
step 2, the upper computer acquires a target type of a preset digital message;
step 4, the upper computer sends the first compensation phase, the second compensation phase and the digital compensation phase to the test equipment;
and 9, the digital module acquires the digital message and the digital compensation phase, and resets a third initial phase to a third replacement phase, wherein the third replacement phase is the sum of the third initial phase and the digital compensation phase, and the third initial phase is the initial phase of the digital message received by the digital module.
Alternatively to this, the first and second parts may,
and before the upper computer acquires the target type of the preset digital message, establishing the relationship between the type of the digital message and the digital compensation phase.
Alternatively to this, the first and second parts may,
the upper computer acquires all types of digital messages before acquiring the target type of the preset digital message;
the upper computer acquires the length of each type of digital message according to the relationship between the type of the digital message and the length of the digital message;
the upper computer calculates the transmission time t of each type of digital message according to the following formula:
wherein, l is the length of each type of digital message, and v is the transmission rate of each type of digital message;
the upper computer calculates the compensation phase p of each type of digital message according to the following formula:
p＝t×a；
wherein a is a compensation phase within unit time under a preset frequency;
and the upper computer establishes the corresponding relation between the digital messages of various types and the compensation phases of the digital messages.
The embodiment of the application provides a test method, which is applied to a test system, wherein the test system comprises test equipment and an upper computer electrically connected with the test equipment, and the test equipment is electrically connected with a direct current control protection device and used for transmitting analog current signals, analog voltage signals and digital messages which are synchronously output to the direct current control protection device. The test equipment comprises a power module, a mainboard module, a current module, a voltage module and a digital module. When the direct current control module is tested, the main board module obtains the target type of the digital message, the upper computer obtains the target type, so that the digital compensation phase corresponding to the target type is obtained, and the digital compensation phase is issued to the main board module. The current module compensates according to a preset first compensation phase, the voltage module compensates according to a preset second compensation phase, and the digital module compensates according to a digital compensation phase, so that data signals keep synchronous when the data signals are output to the testing equipment, and the fact that the direct current control protection device receives analog quantity and digital quantity which are output synchronously is guaranteed.
The present application has been described in detail with reference to specific embodiments and illustrative examples, but the description is not intended to limit the application. Those skilled in the art will appreciate that various equivalent substitutions, modifications or improvements may be made to the presently disclosed embodiments and implementations thereof without departing from the spirit and scope of the present disclosure, and these fall within the scope of the present disclosure. The protection scope of this application is subject to the appended claims.
Claims (6)
1. A test system, comprising: the test equipment is electrically connected with the direct current control protection device and is used for transmitting analog current signals, analog voltage signals and digital messages which are synchronously output to the direct current control protection device, wherein,
the upper computer is used for acquiring a first compensation phase corresponding to the analog current signal and a second compensation phase corresponding to the analog voltage signal, acquiring a target type of a preset digital message, and acquiring a digital compensation phase corresponding to the digital message according to the relation between the target type and the digital compensation phase; sending the first compensated phase, the second compensated phase and the digital compensated phase to the test equipment;
the test equipment comprises a power supply module, a mainboard module, a current module, a voltage module and a digital module, wherein the current module, the voltage module and the digital module are electrically connected with the mainboard module;
the power supply module is used for supplying power to the mainboard module, the current module, the voltage module and the digital module;
the main board module is electrically connected with the upper computer and is used for receiving a digital compensation phase, a first compensation phase and a second compensation phase sent by the upper computer and respectively sending data signals to the current module, the voltage module and the digital module, wherein the data signals comprise the analog current signal, the analog voltage signal and the digital message;
the current module is configured to obtain the analog current signal and the first compensation phase, and reset a first initial phase to a first replacement phase, where the first replacement phase is a sum of the first initial phase and the first compensation phase, and the first initial phase is an initial phase of the analog current signal received by the current module;
the voltage module is configured to obtain the analog voltage signal and the second compensation phase, and reset a second initial phase to a second replacement phase, where the second replacement phase is a sum of the second initial phase and the second compensation phase, and the second initial phase is an initial phase of the analog voltage signal received by the voltage module;
the digital module is configured to obtain the digital packet and the digital compensation phase, and reset a third initial phase to a third replacement phase, where the third replacement phase is a sum of the third initial phase and the digital compensation phase, and the third initial phase is an initial phase of the digital packet received by the digital module.
2. The test system of claim 1,
the upper computer is used for establishing the relation between the type of the digital message and the digital compensation phase before acquiring the target type of the preset digital message.
3. The test system of claim 1,
the upper computer is used for acquiring all types of digital messages before acquiring the target type of the preset digital message;
the upper computer is used for acquiring the length of each type of digital message according to the relationship between the type of the digital message and the length of the digital message;
the upper computer is used for calculating the transmission time t of each type of digital message according to the following formula:
wherein, l is the length of each type of digital message, and v is the transmission rate of each type of digital message;
the upper computer is used for calculating the compensation phase p of each type of digital message according to the following formula:
p＝t×a；
wherein a is a compensation phase within unit time under a preset frequency;
and the upper computer is used for establishing the corresponding relation between the digital messages of various types and the compensation phases of the digital messages.
4. A testing method applied to the testing system of any one of claims 1 to 3, the testing system comprising: the test equipment is electrically connected with the direct current control protection device and is used for transmitting analog current signals, analog voltage signals and digital messages which are synchronously output to the direct current control protection device, wherein the test equipment comprises a power module, a mainboard module, and a current module, a voltage module and a digital module which are electrically connected with the mainboard module, and the power module is used for supplying power to the mainboard module, the current module, the voltage module and the digital module; the method comprises the following steps:
the upper computer acquires a first compensation phase corresponding to the analog current signal and a second compensation phase corresponding to the analog voltage signal;
the upper computer acquires a target type of a preset digital message;
the upper computer acquires a digital compensation phase corresponding to the digital message according to the relation between the target type and the digital compensation phase;
the upper computer sends the first compensation phase, the second compensation phase and the digital compensation phase to the test equipment;
the main board module receives a digital compensation phase, a first compensation phase and a second compensation phase which are sent by the upper computer;
the main board module respectively sends data signals to the current module, the voltage module and the digital module, wherein the data signals comprise the analog current signal, the analog voltage signal and the digital message;
the current module acquires the analog current signal and the first compensation phase, and resets a first initial phase to a first replacement phase, wherein the first replacement phase is the sum of the first initial phase and the first compensation phase, and the first initial phase is the initial phase of the analog current signal received by the current module;
the voltage module acquires the analog voltage signal and the second compensation phase, and resets a second initial phase to a second replacement phase, wherein the second replacement phase is the sum of the second initial phase and the second compensation phase, and the second initial phase is the initial phase of the analog voltage signal received by the voltage module;
and the digital module acquires the digital message and the digital compensation phase, and resets a third initial phase to a third replacement phase, wherein the third replacement phase is the sum of the third initial phase and the digital compensation phase, and the third initial phase is the initial phase of the digital message received by the digital module.
5. The test method according to claim 4,
and before the upper computer acquires the target type of the preset digital message, establishing the relationship between the type of the digital message and the digital compensation phase.
6. The test method according to claim 4,
the upper computer acquires all types of digital messages before acquiring the target type of the preset digital message;
the upper computer acquires the length of each type of digital message according to the relationship between the type of the digital message and the length of the digital message;
the upper computer calculates the transmission time t of each type of digital message according to the following formula:
wherein, l is the length of each type of digital message, and v is the transmission rate of each type of digital message;
the upper computer calculates the compensation phase p of each type of digital message according to the following formula:
p＝t×a；
wherein a is a compensation phase within unit time under a preset frequency;
and the upper computer establishes the corresponding relation between the digital messages of various types and the compensation phases of the digital messages.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911184921.7A CN110967581A (en) | 2019-11-27 | 2019-11-27 | Test system and method |
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