CN110830754B - Heterogeneous video conference device based on network - Google Patents
Heterogeneous video conference device based on network Download PDFInfo
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- CN110830754B CN110830754B CN201911206384.1A CN201911206384A CN110830754B CN 110830754 B CN110830754 B CN 110830754B CN 201911206384 A CN201911206384 A CN 201911206384A CN 110830754 B CN110830754 B CN 110830754B
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- 238000004891 communication Methods 0.000 claims abstract description 267
- 238000012545 processing Methods 0.000 claims description 44
- 238000006243 chemical reaction Methods 0.000 claims description 25
- 230000005236 sound signal Effects 0.000 claims description 12
- 238000012546 transfer Methods 0.000 claims description 3
- 238000013461 design Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 12
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/14—Systems for two-way working
- H04N7/15—Conference systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
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- Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
Abstract
The invention belongs to the field of computer system design, and discloses a heterogeneous video conference device based on a network, which comprises a main board and a plurality of auxiliary boards, wherein a first control circuit of the main board generates a first network communication signal according to a first communication signal received from a wired communication link; the exchange circuit of the main board generates a plurality of second network communication signals according to the first network communication signals; the second control circuit of the auxiliary board generates a video signal according to the second network communication signal; the display component of the auxiliary board displays according to the video signal. Because the exchange circuit generates a plurality of second network communication signals according to the first network communication signals in the main board, when more video path number support needs to be added, the expansion capability of the heterogeneous video conference device based on the network is improved.
Description
Technical Field
The invention belongs to the field of computer system design, and particularly relates to a heterogeneous video conference device based on a network.
Background
With the development of video services, the number of video channels supported by video terminals is higher and higher, and a single video terminal is required to support high performance requirements such as multi-channel 4k video coding, multi-channel 4k decoding and the like. In order to meet the requirement of multiple paths of videos, a terminal of a single system cannot meet the requirement, and a heterogeneous system is required to be used, so that the video processing capacity is enhanced by digital signal processing. At present, the heterogeneous terminals are generally composed of 2 different systems and are mutually connected and communicated in a bus mode such as PCIE, so that the complexity of software development is increased, if more video path number support is needed, a digital signal processing system is needed to be added, and the heterogeneous terminals are not easy to expand in a PCIE mode.
Disclosure of Invention
The invention provides a heterogeneous video conference device based on a network, which aims to solve the problem that the heterogeneous video conference device based on the network in the traditional heterogeneous video conference device based on the network is connected and communicated in a bus mode such as PCIE and the like, and when more video path number support needs to be added, a second control circuit (a digital signal processing system) needs to be added, so that the problem that the ground is not easy to expand in the bus mode such as PCIE and the like.
The invention is realized in that a heterogeneous video conference device based on a network comprises a main board and a plurality of auxiliary boards connected with the main board;
The main board comprises:
a first control circuit configured to generate a first network communication signal from a first communication signal received from the wired communication link;
A switching circuit coupled to the serial signal conversion circuit and configured to generate a plurality of second network communication signals from the first network communication signals;
The sub-panel includes:
a second control circuit coupled to the switching circuit and configured to generate a video signal based on the second network communication signal;
and the display component is connected with the second control circuit and is configured to display according to the video signal.
In one embodiment, the motherboard further comprises:
a serial signal conversion circuit coupled to the first control circuit and configured to convert the first serial signal to a first network communication signal;
The first control circuit is specifically configured to generate a first serial signal from a first communication signal received from a wired communication link.
In one embodiment, the serial signal conversion circuit includes a USB to ethernet signal chip;
The USB-to-Ethernet signal chip comprises a first serial signal input end and a first network communication signal output end;
The first serial signal input end comprises a USB data positive electrode input end of the USB-to-Ethernet signal chip and a USB data negative electrode input end of the USB-to-Ethernet signal chip;
The first network communication signal output end comprises a first channel positive input/output end of the USB-to-Ethernet signal chip, a first channel negative input/output end of the USB-to-Ethernet signal chip, a second channel positive input/output end of the USB-to-Ethernet signal chip, a second channel negative input/output end of the USB-to-Ethernet signal chip, a third channel positive input/output end of the USB-to-Ethernet signal chip, a third channel negative input/output end of the USB-to-Ethernet signal chip, a fourth channel positive input/output end of the USB-to-Ethernet signal chip and a fourth channel negative input/output end of the USB-to-Ethernet signal chip.
In one embodiment, the secondary panel further comprises:
a video input component coupled to the second control circuit and configured to forward a local video signal;
the second control circuit is further configured to generate a third network communication signal from the local video signal;
the switching circuit is further configured to generate a fourth network communication signal from a plurality of the third network communication signals;
the first control circuit is further configured to generate a second communication signal from the fourth network communication signal and to transmit the second communication signal over a wired communication link.
In one embodiment, the motherboard further comprises:
A wireless communication circuit configured to generate a first wired communication signal from a first wireless communication signal received by the wireless communication link, and to generate a second wireless communication signal from a second wired communication signal and to transmit the second wireless communication signal from the wireless communication link;
The first control circuit is further configured to generate the first serial signal from the first wired communication signal and to generate the second wired communication signal from the second serial signal.
In one embodiment, the motherboard further comprises:
a network communication signal conversion circuit, coupled to the second control circuit, configured to generate the seventh network communication signal from the fifth network communication signal and to generate a sixth network communication signal from the eighth network communication signal;
the switching circuit is specifically configured to generate a plurality of the second network communication signals and a plurality of the fifth network communication signals from the first network communication signals, and to generate the fourth network communication signals from a plurality of the third network communication signals and a plurality of the sixth network communication signals;
the second control circuit is specifically configured to generate the video signal from the seventh network communication signal and to generate the eighth network communication signal from the local video signal.
In one embodiment, the network communication signal conversion circuit includes an ethernet transceiver;
The Ethernet transceiver comprises a plurality of groups of fifth network communication signal input ends, a plurality of groups of sixth network communication signal output ends, a plurality of groups of seventh network communication signal output ends and a plurality of groups of eighth network communication signal input ends;
Wherein a set of said fifth network communication signal inputs comprises a pair of differential signal inputs of said ethernet transceiver;
a set of said sixth network communication signal outputs comprising a pair of differential signal outputs of said ethernet transceiver;
a set of said seventh network communication signal outputs and a set of said eighth network communication signal inputs together comprise a media independent interface of a channel of said ethernet transceiver.
In one embodiment, the video input component includes an HDMI interface circuit, an SDI interface circuit, a VGA interface circuit, and a USB interface circuit.
In one embodiment, the motherboard further comprises:
The trigger component is connected with the first control circuit and used for generating a trigger signal;
The first control circuit is further configured to generate the first network communication signal in accordance with the trigger signal;
The second control circuit is further configured to generate the video signal from the local video signal and the second network communication signal.
In one embodiment, the secondary panel further comprises:
the serial communication circuit is connected with the second control circuit and is configured to convert an asynchronous communication signal into a cradle head control signal;
the second control circuit is further configured to generate the asynchronous communication signal from the second network communication signal.
In one embodiment, the motherboard further comprises:
an audio interface circuit connected to the first control circuit and configured to transfer an original audio signal;
An audio output circuit coupled to the first control circuit and configured to play in accordance with a target audio signal;
The first control circuit is further configured to generate the target audio signal from the original audio signal.
In one embodiment, the switching circuit comprises an ethernet switching chip;
The Ethernet switching chip comprises a group of first network communication signal input ends, a plurality of groups of second network communication signal output ends, a plurality of groups of fifth network communication signal output ends and a plurality of groups of sixth network communication signal input ends;
wherein a set of said first network communication signal inputs comprise a media independent interface of a channel of said ethernet switch chip;
a set of said second network communication signal outputs comprising a media independent interface of a channel of said ethernet switch chip;
The group of fifth network communication signal output ends comprise a pair of differential signal output ends of an Ethernet switching chip;
A set of the sixth network communication signal inputs includes a pair of differential signal inputs of an ethernet switch chip.
In one embodiment, the first control circuit includes a first microprocessor;
the USB data positive electrode output end of the first microprocessor and the USB data negative electrode output end of the first microprocessor jointly form a first serial signal output end of the first control circuit.
In one embodiment, the second control circuit includes a digital signal processing chip;
The first channel positive electrode input/output end of the digital signal processing chip, the first channel negative electrode input/output end of the digital signal processing chip, the second channel positive electrode input/output end of the digital signal processing chip, the third channel negative electrode input/output end of the digital signal processing chip, the fourth channel positive electrode input/output end of the digital signal processing chip and the fourth channel negative electrode input/output end of the digital signal processing chip jointly form a second network communication signal input end of the second control circuit.
The embodiment of the invention comprises a main board and a plurality of auxiliary boards, wherein a first control circuit of the main board generates a first network communication signal according to a first communication signal received from a wired communication link; the exchange circuit of the main board generates a plurality of second network communication signals according to the first network communication signals; the second control circuit of the auxiliary board generates a video signal according to the second network communication signal; the display component of the auxiliary board displays according to the video signal. Because the exchange circuit generates a plurality of second network communication signals according to the first network communication signals in the main board, when more video path number support needs to be added, the expansion capability of the heterogeneous video conference device based on the network is improved.
Drawings
In order to more clearly illustrate the technical invention in the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it will be apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort to those of ordinary skill in the art.
Fig. 1 is a block diagram of a heterogeneous network-based videoconferencing device according to an embodiment of the present invention;
Fig. 2 is a block diagram of another heterogeneous network-based videoconferencing device according to an embodiment of the present invention;
Fig. 3 is a block diagram of another heterogeneous network-based videoconferencing device according to an embodiment of the present invention;
Fig. 4 is a block diagram of another heterogeneous network-based videoconferencing device according to an embodiment of the present invention;
fig. 5 is a block diagram of another heterogeneous network-based videoconferencing device according to an embodiment of the present invention;
fig. 6 is a block diagram of another heterogeneous network-based videoconferencing device according to an embodiment of the present invention;
fig. 7 is a block diagram of another heterogeneous network-based videoconferencing device according to an embodiment of the present invention;
Fig. 8 is a block diagram of another heterogeneous network-based videoconferencing device according to an embodiment of the present invention;
Fig. 9 is a circuit diagram of an example of a first control circuit, a serial signal conversion circuit, and a switching circuit of a heterogeneous network-based video conference device according to an embodiment of the present invention;
fig. 10 is a circuit diagram illustrating an exemplary circuit configuration of a switching circuit, a network communication signal conversion circuit, and a second control circuit of a network-based heterogeneous videoconferencing device according to an embodiment of the present invention;
fig. 11 is a circuit configuration diagram of an example of a switching circuit and a second control circuit of a heterogeneous network-based videoconferencing device according to an embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
Fig. 1 shows a module structure of a heterogeneous network-based video conference apparatus according to an embodiment of the present invention, and for convenience of explanation, only a portion related to the embodiment of the present invention is shown, which is described in detail as follows:
The heterogeneous video conference device based on the network comprises a main board and a plurality of auxiliary boards connected with the main board.
Wherein the main board comprises a first control circuit 01, a serial signal conversion circuit 02 and a switching circuit 03.
The first control circuit 01 is configured to generate a first network communication signal from a first communication signal received from the wired communication link; the switching circuit 03 is connected to the serial signal conversion circuit 02 and is configured to generate a plurality of second network communication signals from the first network communication signals.
Wherein the sub-board comprises a second control circuit 04 and a display assembly 05.
The second control circuit 04 is connected to the switching circuit 03 and configured to generate a video signal from the second network communication signal; the display module 05 is connected to the second control circuit 04 and configured to display according to a video signal.
In an implementation, the upper computer transmits the first communication signal. The second control circuit 04 may comprise a DSP chip.
As shown in fig. 2, the sub-panel further comprises a video input assembly 06.
The video input component 06 is connected with the second control circuit 04 and is configured to forward the local video signal; the second control circuit 04 is further configured to generate a third network communication signal from the local video signal; the switching circuit 03 is further configured to generate a fourth network communication signal from the plurality of third network communication signals; the first control circuit 01 is further configured to generate a second communication signal from the fourth network communication signal and to transmit the second communication signal over the wired communication link.
In an implementation, the second communication signal may be sent to the host computer.
By configuring the video input assembly 06 to forward the local video signal, the local video monitoring by the upper computer is realized.
As shown in fig. 3, the motherboard further includes a wireless communication circuit 07.
The wireless communication circuit 07 is configured to generate a first wired communication signal from a first wireless communication signal received by the wireless communication link, and to generate a second wireless communication signal from a second wired communication signal and to transmit the second wireless communication signal from the wireless communication link; the first control circuit 01 is further configured to generate a first serial signal from the first wired communication signal and to generate a second wired communication signal from the second serial signal.
By configuring the wireless communication circuit 07, communication between the upper computer and the network-based heterogeneous video conference device can be realized through a wireless communication link, and flexibility of data transmission is improved.
As shown in fig. 4, the main board further includes a network communication signal conversion circuit 08.
The network communication signal conversion circuit 08 is connected to the second control circuit 04 and configured to generate a seventh network communication signal from the fifth network communication signal and generate a sixth network communication signal from the eighth network communication signal; the switching circuit 03 is specifically configured to generate a plurality of second network communication signals and a plurality of fifth network communication signals from the first network communication signals, and to generate a fourth network communication signal from the plurality of third network communication signals and the plurality of sixth network communication signals; the second control circuit 04 is specifically configured to generate a video signal from the seventh network communication signal and to generate an eighth network communication signal from the local video signal.
The plurality of auxiliary boards can be expanded again through the network communication signal conversion circuit 08, so that the number of video paths is increased, and the data processing capacity of the heterogeneous video conference device based on the network is improved.
The video input component 06 includes an HDMI interface circuit, an SDI interface circuit, a VGA interface circuit, and a USB interface circuit.
As shown in fig. 5, the motherboard further includes a trigger assembly 09.
The trigger component 09 is connected with the first control circuit 01 and is used for generating a trigger signal; the first control circuit 01 is further configured to generate a first network communication signal according to the trigger signal; the second control circuit 04 is further configured to generate a video signal from the local video signal and the second network communication signal.
The triggering component 09 generates a triggering signal, the triggering signal carries triggering information, and the second control circuit 04 generates a video signal according to the local video signal and a second network communication signal carrying the triggering information, so that the local play of the local monitoring video is realized.
As shown in fig. 6, the sub-board further includes a serial communication circuit 10.
The serial communication circuit 10 is connected with the second control circuit 04 and is configured to convert an asynchronous communication signal into a cradle head control signal; the second control circuit 04 is further configured to generate an asynchronous communication signal from the second network communication signal.
The trigger component 09 generates a trigger signal, the trigger signal carries trigger information, the second control circuit 04 generates an asynchronous communication signal according to a second network communication signal carrying the trigger information, and the serial communication circuit 10 converts the asynchronous communication signal into a holder control signal, so that the holder matched with the video input component 06 is controlled.
As shown in fig. 7, the main board further includes an audio interface circuit 11 and an audio output circuit 12.
The audio interface circuit 11 is connected with the first control circuit 01 and is configured to transfer an original audio signal; the audio output circuit 12 is connected to the first control circuit 01 and configured to play according to a target audio signal; the first control circuit 01 is further configured to generate a target audio signal from the original audio signal.
As shown in fig. 8, the main board further includes a serial signal conversion circuit 02.
The serial signal conversion circuit 02 is connected to the first control circuit 01 and configured to convert the first serial signal into a first network communication signal; the first control circuit 01 is specifically configured to generate a first serial signal from a first communication signal received from the wired communication link.
Fig. 9 shows an exemplary circuit structure of the first control circuit 01, the serial signal conversion circuit 02 and the switching circuit 03 of the network-based heterogeneous videoconferencing device according to the embodiment of the present invention, fig. 10 shows an exemplary circuit structure of the switching circuit 03, the network communication signal conversion circuit 08 and the second control circuit 04 of the network-based heterogeneous videoconferencing device according to the embodiment of the present invention, fig. 11 shows an exemplary circuit structure of the switching circuit 03 and the second control circuit 04 of the network-based heterogeneous videoconferencing device according to the embodiment of the present invention, and for convenience of explanation, only the portions related to the embodiments of the present invention are shown, and the details are as follows:
Fig. 9, 10, 11 each include a partial example circuit configuration diagram of the switching circuit 03.
The network communication signal conversion circuit 08 includes an ethernet transceiver U1.
The ethernet transceiver U1 includes a plurality of sets of fifth network communication signal inputs, a plurality of sets of sixth network communication signal outputs, a plurality of sets of seventh network communication signal outputs, and a plurality of sets of eighth network communication signal inputs.
Wherein the set of fifth network communication signal inputs comprises a pair of differential signal inputs of the ethernet transceiver U1.
A set of sixth network communication signal outputs includes a pair of differential signal outputs of ethernet transceiver U1.
The set of seventh network communication signal outputs and the set of eighth network communication signal inputs together comprise a media independent interface of one channel of the ethernet transceiver U1.
The pair of differential signal inputs of the ethernet transceiver U1 includes an SGMII data transmission positive terminal p1_s_in_p of the ethernet transceiver U1 and an SGMII data transmission negative terminal p1_s_in_n of the ethernet transceiver U1.
The pair of differential signal outputs of the ethernet transceiver U1 includes an SGMII data reception positive terminal p1_s_out_p of the ethernet transceiver U1 and an SGMII data reception negative terminal p1_s_out_n of the ethernet transceiver U1.
The media independent interface of one channel of the ethernet transceiver U1 includes a first media independent positive terminal p0_mdi_0_P of the ethernet transceiver U1, a first media independent negative terminal p0_mdi_0_N of the ethernet transceiver U1, a second media independent positive terminal p0_mdi_1_P of the ethernet transceiver U1, a second media independent negative terminal p0_mdi_1_N of the ethernet transceiver U1, a third media independent positive terminal p0_mdi_2_P of the ethernet transceiver U1, a third media independent negative terminal p0_mdi_2_N of the ethernet transceiver U1, a fourth media independent negative terminal p0_mdi_3_P of the ethernet transceiver U1 together constitute an eighth network communication signal input of the network communication signal conversion circuit 08, and a seventh network communication signal output of the network communication signal conversion circuit 08.
The switching circuit 03 includes an ethernet switching chip U2.
The ethernet switch chip U2 includes a set of first network communication signal inputs and a plurality of second network communication signal outputs, a plurality of fifth network communication signal outputs, and a plurality of sixth network communication signal inputs.
Wherein, the first network communication signal input end comprises a media independent interface of a channel of the Ethernet exchange chip U2;
The group of first network communication signal output ends comprise a media independent interface of one channel of the Ethernet switching chip U2; the media independent interface of one channel of the ethernet switch chip U2 includes a first channel first media independent positive terminal p0_ MDIP [0] of the ethernet switch chip U2, a first channel first media independent negative terminal p0_mdin [0] of the ethernet switch chip U2, a first channel second media independent positive terminal p0_ MDIP [1] of the ethernet switch chip U2, a first channel first media independent negative terminal p0_mdin [1] of the ethernet switch chip U2, a first channel third media independent positive terminal p0_ MDIP [2] of the ethernet switch chip U2, a first channel third media independent negative terminal p0_mdin [2] of the ethernet switch chip U2, a first channel fourth media independent negative terminal p0_ MDIP [3] of the ethernet switch chip U2, and a first channel fourth media independent negative terminal p0_mdin [3] of the ethernet switch chip U2.
Wherein the group of second network communication signal input ends comprise a media independent interface of one channel of the Ethernet switch chip U2;
The media independent interface of one channel of the ethernet switch chip U2 includes a first channel first media independent positive terminal p1_ MDIP [0] of the ethernet switch chip U2, a second channel first media independent negative terminal p1_mdin [0] of the ethernet switch chip U2, a second channel second media independent positive terminal p1_ MDIP [1] of the ethernet switch chip U2, a second channel first media independent negative terminal p1_mdin [1] of the ethernet switch chip U2, a second channel third media independent positive terminal p1_ MDIP [2] of the ethernet switch chip U2, a second channel third media independent negative terminal p1_mdin [2] of the ethernet switch chip U2, a second channel fourth media independent positive terminal p1_ MDIP [3] of the ethernet switch chip U2, and a second channel fourth media independent negative terminal p1_mdin [3] of the ethernet switch chip U2.
The group of fifth network communication signal output ends comprise a pair of differential signal output ends of the Ethernet switch chip U2; the pair of differential signal output ends of the ethernet switch chip U2 includes a data transmission positive terminal p4_txn of the ethernet switch chip U2 and a data transmission negative terminal p4_txp of the ethernet switch chip U2.
The set of sixth network communication signal inputs includes a pair of differential signal inputs of the ethernet switch chip U2. The pair of differential signal input terminals of the ethernet switch chip U2 includes a data receiving positive terminal p4_rxn of the ethernet switch chip U2 and a data receiving negative terminal p4_rxp of the ethernet switch chip U2.
The serial signal conversion circuit 02 includes a USB-to-ethernet signal chip U3.
The USB-to-ethernet signal chip U3 includes a first serial signal input and a first network communication signal output.
The first serial signal input end includes a USB data positive input end usb_dp of the USB-to-ethernet signal chip U3 and a USB data negative input end usb_dm of the USB-to-ethernet signal chip U3.
The first network communication signal output end comprises a first channel positive input/output end TR0P, USB of the USB-to-Ethernet signal chip U3, a first channel negative input/output end TR0N, USB of the Ethernet signal chip U3, a second channel positive input/output end TR1P, USB of the Ethernet signal chip U3, a second channel negative input/output end TR1N, USB of the Ethernet signal chip U3, a third channel positive input/output end TR2P, USB of the Ethernet signal chip U3, a third channel negative input/output end TR2N, USB of the Ethernet signal chip U3, a fourth channel positive input/output end TR3P of the Ethernet signal chip U3 and a fourth channel negative input/output end TR3N of the USB-to-Ethernet signal chip U3.
The first control circuit 01 includes a first microprocessor U4.
The USB data positive output terminal USB2_host0_dp of the first microprocessor U4 and the USB data negative output terminal USB2_host0_dn of the first microprocessor U4 together form a first serial signal output terminal of the first control circuit 01.
The second control circuit 04 includes a digital signal processing chip U5.
The first channel positive input/output end enat0_ TRDI [0]P ] of the digital signal processing chip U5, the first channel negative input/output end enat0_ TRDI [0]N ] of the digital signal processing chip U5, the second channel positive input/output end enat0_ TRDI [1]P ] of the digital signal processing chip U5, the second channel negative input/output end enat0_ TRDI [1] n of the digital signal processing chip U5, the third channel positive input/output end enat0_ TRDI [2] p of the digital signal processing chip U5, the third channel negative input/output end enat0_ TRDI [2] n of the digital signal processing chip U5, the fourth channel positive input/output end enat0_ TRDI [3] p of the digital signal processing chip U5, and the fourth channel negative input/output end enat0_ TRDI [3] n of the digital signal processing chip U5 are jointly formed into the second network communication signal input end of the second control circuit 04.
The following further describes the operation of the device shown in fig. 9, 10 and 11 in conjunction with the following principle:
The first microprocessor U4 of the main board generates a first serial signal according to a first communication signal received from a wired communication link and sends a first serial signal to the USB data positive input end USB_DP of the USB-to-Ethernet signal chip U3 and the USB data negative input end USB_DM of the USB-to-Ethernet signal chip U3 from the USB data positive output end USB2 HOST0 DP of the first microprocessor U4 and the USB data negative output end USB2 HOST0 DN of the first microprocessor U4; The USB-to-Ethernet signal chip U3 of the motherboard converts a first serial signal into a first network communication signal and transmits the first serial signal from a first channel positive pole input/output end TR0P of the USB-to-Ethernet signal chip U3 to a fourth channel negative pole input/output end TR0N of the USB-to-Ethernet signal chip U3 from a fourth channel positive pole input/output end TR3P, USB of the USB-to-Ethernet signal chip U3 to a fourth channel negative pole input/output end TR3N of the USB-to-Ethernet signal chip U3 to a first channel first media independent positive pole P0_ MDIP [0] of the Ethernet switch chip U2 to a first channel fourth media independent positive pole P0_ MDIP [3] of the Ethernet switch chip U2, The first channel first media independent negative pole P0_MDIN [0] of the Ethernet switch chip U2 to the first channel fourth media independent negative pole P0_MDIN [3] of the Ethernet switch chip U2; the ethernet switching chip U2 of the motherboard generates a plurality of second network communication signals and a plurality of fifth network communication signals according to the first network communication signals. The plurality of second network communication signals are transmitted from the media independent interface of one channel of the ethernet switch chip U2 (e.g., the second channel first media independent positive terminal p1_ MDIP [0] of the ethernet switch chip U2 to the second channel fourth media independent positive terminal p1_ MDIP [3] of the ethernet switch chip U2, the second channel first media independent negative terminal p1_mdin [0] of the ethernet switch chip U2 to the second channel fourth media independent negative terminal p1_mdin [3 ]) of the ethernet switch chip U2 to the first channel positive input/output terminal enet0_ TRDI [0]P ] of the digital signal processing chip U5 to the fourth channel positive input/output terminal enet0_ TRDI [3] P of the digital signal processing chip U5 of the plurality of sub-boards, The digital signal processing chip U5 of the auxiliary board converts the second network communication signal into a video signal from the first channel negative input/output end ENET0_ TRDI [0]N ] of the digital signal processing chip U5 to the fourth channel negative input/output end ENET0_ TRDI [3] N of the digital signal processing chip U5. Meanwhile, a plurality of fifth network communication signals are transmitted from a plurality of pairs of differential signal output ends of the Ethernet switch chip U2 (for example, the data transmission positive end P4_TXN of the Ethernet switch chip U2 and the data transmission negative end P4_TXP of the Ethernet switch chip U2) to a plurality of pairs of differential signal input ends of the Ethernet transceiver U1 (for example, the SGMII data transmission positive end P1_S_IN_P of the Ethernet transceiver U1, the SGMII data transmission negative end P1_S_IN_N of the Ethernet transceiver U1), the Ethernet transceiver U1 generates a seventh network communication signal according to the fifth network communication signals, and the seventh network communication signal is transmitted from a media independent interface of one channel (the first media independent positive end P0_MDI_0_P of the Ethernet transceiver U1 to the fourth media independent positive end P0_MDI_3_P of the Ethernet transceiver U1, the first media independent negative pole terminal p0_mdi_0_N of the ethernet transceiver U1 to the fourth media independent negative pole terminal p0_mdi_3_N of the ethernet transceiver U1) transmits to the first channel positive pole input output terminal enet0_ TRDI [0]P ] of the digital signal processing chip U5 to the fourth channel positive pole input output terminal enet0_ TRDI [3] P of the digital signal processing chip U5, the first channel negative pole input output terminal enet0_ TRDI [0]N ] of the digital signal processing chip U5 to the fourth channel negative pole input output terminal enet0_ TRDI [3] n of the digital signal processing chip U5, The digital signal processing chip U5 of the sub-board converts the second network communication signal into a video signal.
The video input component 06 of the auxiliary board forwards the local video signal, and the digital signal processing chip U2 of the auxiliary board generates a third network communication signal according to the local video signal; the digital signal processing chips U2 of the plurality of sub-boards transmit the third network communication signal from the first channel positive input/output end enat0_ TRDI [0]P ] of the digital signal processing chip U5 to the fourth channel positive input/output end enat0_ TRDI [3] P of the digital signal processing chip U5, the first channel negative input/output end enat0_ TRDI [0]N ] of the digital signal processing chip U5 to the fourth channel negative input/output end enat0_ TRDI [3] n of the digital signal processing chip U5 to the media independent interface of one channel of the ethernet switching chip U2 (for example: the Ethernet switch chip U2 generates a fourth network communication signal based on the plurality of third network communication signals and transmits the fourth network communication signal from the media independent interface of one channel of the Ethernet switch chip U2 (e.g., the first media independent positive terminal P0_ MDIP [0] of the Ethernet switch chip U2 to the first media independent negative terminal P0_ MDIP [3] of the Ethernet switch chip U2, the first media independent negative terminal P0 ] of the Ethernet switch chip U2 to the second media independent negative terminal P1_MDIN [3 ]) of the Ethernet switch chip U2, and transmits the fourth network communication signal from the first media independent positive terminal P0_ MDIP [0] of the Ethernet switch chip U2 to the first media independent positive terminal P0_ MDIP [3] of the Ethernet switch chip U2 to the first media independent negative terminal P0_MDIN [0] of the Ethernet switch chip U2 to the first media independent negative terminal P3 of the Ethernet switch chip U2 to the positive terminal USB input terminal TR0 of the Ethernet switch chip, the first channel negative electrode input/output end TR0N of the USB-to-Ethernet signal chip U3 to the fourth channel negative electrode input/output end TR3N of the USB-to-Ethernet signal chip U3, the USB-to-Ethernet signal chip U3 generates a second serial signal according to the fourth network communication signal and sends a USB data positive electrode input end USB_DP of the USB-to-Ethernet signal chip U3 and a USB data negative electrode input end USB_DM of the USB-to-Ethernet signal chip U3 to the first microprocessor U1; the first microprocessor U1 generates a second communication signal from the second serial signal and transmits the second communication signal over the wired communication link.
The embodiment of the invention comprises a main board and a plurality of auxiliary boards, wherein a first control circuit of the main board generates a first network communication signal according to a first communication signal received from a wired communication link; the exchange circuit of the main board generates a plurality of second network communication signals according to the first network communication signals; the second control circuit of the auxiliary board generates a video signal according to the second network communication signal; the display component of the auxiliary board displays according to the video signal. Because the exchange circuit generates a plurality of second network communication signals according to the first network communication signals in the main board, when more video path number support needs to be added, the expansion capability of the heterogeneous video conference device based on the network is improved.
The foregoing is only illustrative of the present invention and is not to be construed as limiting thereof, but rather as various modifications, equivalent arrangements, improvements, etc., within the spirit and principles of the present invention.
Claims (11)
1. A heterogeneous video conference device based on a network, which is characterized by comprising a main board and a plurality of auxiliary boards connected with the main board;
The main board comprises:
a first control circuit configured to generate a first network communication signal from a first communication signal received from the wired communication link;
A switching circuit coupled to the serial signal conversion circuit and configured to generate a plurality of second network communication signals from the first network communication signals;
The sub-panel includes:
a second control circuit coupled to the switching circuit and configured to generate a video signal based on the second network communication signal;
a display component connected with the second control circuit and configured to display according to the video signal;
The sub-panel further comprises:
a video input component coupled to the second control circuit and configured to forward a local video signal;
the second control circuit is further configured to generate a third network communication signal from the local video signal;
the switching circuit is further configured to generate a fourth network communication signal from a plurality of the third network communication signals;
The first control circuit is further configured to generate a second communication signal from the fourth network communication signal and to transmit the second communication signal over a wired communication link;
The motherboard further comprises:
The trigger component is connected with the first control circuit and used for generating a trigger signal;
The first control circuit is further configured to generate the first network communication signal in accordance with the trigger signal;
the second control circuit is further configured to generate the video signal from the local video signal and the second network communication signal;
The first network communication signal, the second network communication signal, the third network communication signal and the fourth network communication signal are all ethernet signals;
The second control circuit comprises a DSP chip;
The motherboard further comprises:
a serial signal conversion circuit coupled to the first control circuit and configured to convert the first serial signal to a first network communication signal;
The first control circuit is specifically configured to generate a first serial signal from a first communication signal received from a wired communication link.
2. The network-based heterogeneous videoconferencing apparatus of claim 1, wherein the serial signal conversion circuit comprises a USB to ethernet signal chip;
The USB-to-Ethernet signal chip comprises a first serial signal input end and a first network communication signal output end;
The first serial signal input end comprises a USB data positive electrode input end of the USB-to-Ethernet signal chip and a USB data negative electrode input end of the USB-to-Ethernet signal chip;
The first network communication signal output end comprises a first channel positive input/output end of the USB-to-Ethernet signal chip, a first channel negative input/output end of the USB-to-Ethernet signal chip, a second channel positive input/output end of the USB-to-Ethernet signal chip, a second channel negative input/output end of the USB-to-Ethernet signal chip, a third channel positive input/output end of the USB-to-Ethernet signal chip, a third channel negative input/output end of the USB-to-Ethernet signal chip, a fourth channel positive input/output end of the USB-to-Ethernet signal chip and a fourth channel negative input/output end of the USB-to-Ethernet signal chip.
3. The network-based heterogeneous videoconferencing apparatus of claim 1, wherein the motherboard further comprises:
A wireless communication circuit configured to generate a first wired communication signal from a first wireless communication signal received by the wireless communication link, and to generate a second wireless communication signal from a second wired communication signal and to transmit the second wireless communication signal from the wireless communication link;
The first control circuit is further configured to generate the first serial signal from the first wired communication signal and to generate the second wired communication signal from the second serial signal.
4. The network-based heterogeneous videoconferencing apparatus of claim 1, wherein the motherboard further comprises:
a network communication signal conversion circuit, coupled to the second control circuit, configured to generate the seventh network communication signal from the fifth network communication signal and to generate a sixth network communication signal from the eighth network communication signal;
the switching circuit is specifically configured to generate a plurality of the second network communication signals and a plurality of the fifth network communication signals from the first network communication signals, and to generate the fourth network communication signals from a plurality of the third network communication signals and a plurality of the sixth network communication signals;
the second control circuit is specifically configured to generate the video signal from the seventh network communication signal and to generate the eighth network communication signal from the local video signal.
5. The network-based heterogeneous videoconferencing apparatus of claim 1, wherein the network communication signal conversion circuit comprises an ethernet transceiver;
The Ethernet transceiver comprises a plurality of groups of fifth network communication signal input ends, a plurality of groups of sixth network communication signal output ends, a plurality of groups of seventh network communication signal output ends and a plurality of groups of eighth network communication signal input ends;
Wherein a set of said fifth network communication signal inputs comprises a pair of differential signal inputs of said ethernet transceiver;
a set of said sixth network communication signal outputs comprising a pair of differential signal outputs of said ethernet transceiver;
a set of said seventh network communication signal outputs and a set of said eighth network communication signal inputs together comprise a media independent interface of a channel of said ethernet transceiver.
6. The network-based heterogeneous videoconferencing apparatus of claim 1, wherein the video input component comprises HDMI interface circuitry, SDI interface circuitry, VGA interface circuitry, and USB interface circuitry.
7. The network-based heterogeneous videoconferencing apparatus of claim 1, wherein the sub-board further comprises:
the serial communication circuit is connected with the second control circuit and is configured to convert an asynchronous communication signal into a cradle head control signal;
the second control circuit is further configured to generate the asynchronous communication signal from the second network communication signal.
8. The network-based heterogeneous videoconferencing apparatus of claim 1, wherein the motherboard further comprises:
an audio interface circuit connected to the first control circuit and configured to transfer an original audio signal;
An audio output circuit coupled to the first control circuit and configured to play in accordance with a target audio signal;
The first control circuit is further configured to generate the target audio signal from the original audio signal.
9. The network-based heterogeneous videoconferencing apparatus of claim 2, wherein the switching circuit comprises an ethernet switching chip;
The Ethernet switching chip comprises a group of first network communication signal input ends, a plurality of groups of second network communication signal output ends, a plurality of groups of fifth network communication signal output ends and a plurality of groups of sixth network communication signal input ends;
wherein a set of said first network communication signal inputs comprise a media independent interface of a channel of said ethernet switch chip;
a set of said second network communication signal outputs comprising a media independent interface of a channel of said ethernet switch chip;
The group of fifth network communication signal output ends comprise a pair of differential signal output ends of an Ethernet switching chip;
A set of the sixth network communication signal inputs includes a pair of differential signal inputs of an ethernet switch chip.
10. The network-based heterogeneous videoconferencing apparatus of claim 1, wherein the first control circuit comprises a first microprocessor;
the USB data positive electrode output end of the first microprocessor and the USB data negative electrode output end of the first microprocessor jointly form a first serial signal output end of the first control circuit.
11. The network-based heterogeneous videoconferencing apparatus of claim 1, wherein the second control circuit comprises a digital signal processing chip;
The first channel positive electrode input/output end of the digital signal processing chip, the first channel negative electrode input/output end of the digital signal processing chip, the second channel positive electrode input/output end of the digital signal processing chip, the third channel negative electrode input/output end of the digital signal processing chip, the fourth channel positive electrode input/output end of the digital signal processing chip and the fourth channel negative electrode input/output end of the digital signal processing chip jointly form a second network communication signal input end of the second control circuit.
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