CN110600384A - Local sealing method for chip - Google Patents
Local sealing method for chip Download PDFInfo
- Publication number
- CN110600384A CN110600384A CN201910805589.5A CN201910805589A CN110600384A CN 110600384 A CN110600384 A CN 110600384A CN 201910805589 A CN201910805589 A CN 201910805589A CN 110600384 A CN110600384 A CN 110600384A
- Authority
- CN
- China
- Prior art keywords
- chip
- gasket
- bonding wire
- packaging
- tube shell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/54—Providing fillings in containers, e.g. gas fillings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
Abstract
The invention relates to a local sealing method for a chip, which comprises the following steps: attaching the chip to the packaging tube shell, and arranging a gasket for surrounding the chip between the pin of the packaging tube shell and the edge of the chip; providing a bonding wire, welding and connecting two ends of the bonding wire with a wiring end of a chip and a corresponding pin respectively, and supporting the bonding wire through a gasket to enable a set distance to be reserved between the bonding wire and a packaging tube shell; and arranging a packaging adhesive layer between the gasket and the edge of the packaging tube shell, so that the packaging adhesive layer covers the pin and the part of the bonding wire positioned outside the gasket. The invention effectively solves the problem that the chip is difficult to carry out reliability test, not only protects the bonding wire, but also exposes the chip so as to conveniently carry out reliability test on the chip and reduce the risk of failure of the chip caused by reasons except the test.
Description
Technical Field
The invention relates to the field of rapid packaging, in particular to a local sealing method for a chip.
Background
The chip packaging process mainly includes dividing a complete wafer into independent chips, and performing chip mounting, wire bonding and sealing, wherein the sealing is mainly used for preventing moisture from invading from the outside.
However, when a user needs to expose the chip to a temperature and humidity limit for a reliability test, the encapsulated colloid can block water vapor from entering, the related performance of the chip can not be measured, the colloid on the surface of the chip needs to be removed through an acidic reagent, and the chip is likely to fail in the removal process, so that the chip can not be tested; if the chip is not sealed after being manufactured, the bonding wire or the chip is easily touched by mistake in the chip taking and testing processes, so that a sample is directly damaged, and the chip cannot be tested.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, provides a local adhesive sealing method for a chip, solves the problem that the chip is difficult to perform a reliability test, protects a bonding wire, enables the chip to be exposed, facilitates the reliability test of the chip, and reduces the risk of failure of the chip due to reasons other than the test.
The technical scheme for realizing the purpose is as follows:
the invention provides a local sealing method for a chip, which comprises the following steps:
s11, attaching the chip to a packaging tube shell, and arranging a gasket for surrounding the chip between a pin of the packaging tube shell and the edge of the chip;
s12, providing a bonding wire, welding and connecting two ends of the bonding wire with a terminal of a chip and a corresponding pin respectively, and supporting the bonding wire through a gasket to enable a set distance to be reserved between the bonding wire and a packaging tube shell;
and S13, arranging a packaging adhesive layer between the gasket and the edge of the packaging tube shell, so that the packaging adhesive layer covers the pin and the bonding wire on the outer side of the gasket.
The invention adopts a local sealing method for the chip, and the gasket surrounding the chip is arranged on the packaging tube shell, and then laying a packaging adhesive layer on the outer side of the gasket after the bonding wires are connected so as to cover the connection part of the pins and the bonding wires, wherein the exposed chip can meet the requirement of performing a reliability test on the chip, in addition, the packaging adhesive layer protects the connecting node of the bonding wire and the pin, plays the purpose of local packaging, a user can take the chip through the packaging adhesive layer, the possibility of breaking the bonding wire is reduced, the arrangement of the cushion layer can also prevent the bonding wire from collapsing downwards and contacting with a packaging tube shell to cause short circuit when the packaging adhesive layer is laid, the problem that the chip is difficult to carry out reliability test is effectively solved, the bonding wire is protected, the chip can be exposed, the reliability test of the chip is convenient, and the risk of failure of the chip due to reasons except for the test is reduced.
The invention is further improved in that before laying the packaging adhesive layer, the method further comprises:
and dripping glue on the gasket to form a limiting ring, wherein the limiting ring covers the part of the bonding wire arranged on the gasket.
The invention is further improved in the method for locally sealing the chip, and comprises the following steps after the limit ring is formed by drip-feed:
the packaging tube shell is preheated at 80 ℃ for 10 minutes, baked at 120 ℃ for 30 minutes and then cooled to room temperature, so that the limiting ring is solidified.
The invention is further improved in that the colloid used for forming the spacing ring is G8345-D.
The invention is further improved in the method for locally sealing the chip, and when the packaging adhesive layer is laid, the method further comprises the following steps:
and injecting glue between the edge of the gasket and the edge of the packaging tube shell, preheating for 10 minutes at 80 ℃ after the glue injection is finished, and further baking for 30 minutes at 120 ℃ to form a packaging glue layer.
The invention is further improved in that the colloid used for forming the packaging adhesive layer is G8345-6.
The invention is further improved in the local sealing method for chip, when setting gasket, it also includes:
and dripping colloid between the pin and the chip, forming a gasket after solidification, wherein the height of the gasket is matched with the thickness of the chip.
The invention is further improved in that the colloid used for forming the gasket is G8345-D.
The invention is further improved in that the section of the packaging tube shell is U-shaped, and a concave space which is concave downwards and a side wall for enclosing the concave space are formed;
and injecting glue between the outer side edge of the gasket and the side wall of the recessed space to form the packaging glue layer.
Drawings
FIG. 1 is a flow chart of a method for sealing a chip.
FIG. 2 is a schematic view of chip mounting by the local encapsulation method for chips according to the present invention.
FIG. 3 is a schematic view of a gasket used in the method for sealing a chip.
FIG. 4 is a schematic diagram of a positioning ring used in the method for sealing a chip.
FIG. 5 is a schematic diagram of an arrangement of a package adhesive layer used in the local sealing method of the chip of the invention.
Detailed Description
The invention is further described with reference to the following figures and specific examples.
Referring to fig. 1, the present invention provides a local encapsulation method for a chip, wherein a gasket surrounding the chip is arranged on an encapsulation tube shell, and then an encapsulation adhesive layer is laid on the outer side of the gasket after the bonding wire is connected to cover the connection part of the pin and the bonding wire, at this time, the chip is exposed to meet the requirement of performing a reliability test on the chip, and the encapsulation adhesive layer protects the connection node of the bonding wire and the pin to perform a local encapsulation purpose, so that a user can take the chip through the encapsulation adhesive layer, thereby reducing the possibility of breaking the bonding wire, and the arrangement of the cushion layer can prevent the bonding wire from collapsing downwards and contacting with the encapsulation tube shell to cause short circuit when laying the encapsulation adhesive layer, thereby effectively solving the problem that the chip is difficult to perform the reliability test, not only protecting the bonding wire, but also exposing the chip to facilitate the reliability test on the chip, the risk of failure of the chip due to reasons other than testing is reduced. The method for partially encapsulating the chip according to the present invention will be described with reference to the accompanying drawings.
Referring to fig. 1, fig. 1 is a flowchart of a local sealing method for a chip according to the present invention. The method for partially encapsulating the chip according to the present invention is described with reference to fig. 1.
As shown in fig. 1, fig. 2, fig. 3 and fig. 5, the local sealing method for chips of the present invention includes the following steps:
step S11 is executed, the chip 11 is pasted on the packaging tube shell 12, and a gasket 122 for surrounding the chip 11 is arranged between the pin 121 of the packaging tube shell 12 and the edge of the chip 11; then, step S12 is executed
Step S12, providing a bonding wire 111, welding and connecting two ends of the bonding wire 111 with a terminal of the chip 11 and a corresponding pin 121 respectively, and supporting the bonding wire 111 through a gasket 122 so that a set distance is reserved between the bonding wire 111 and the package case 12; then, step S13 is executed
Step s13 is executed to dispose the encapsulation adhesive layer 124 between the gasket 122 and the edge of the package 12, so that the encapsulation adhesive layer 124 covers the leads 121 and the portions of the bonding wires 111 located outside the gasket 122.
Preferably, the gasket 122 is disposed between the package housing 12 and the chip 11 near the middle to avoid being too close to the chip and to avoid too little sealing material.
Specifically, when the gasket 122 is provided, the method further includes:
the glue is dripped between the lead 121 and the chip 11, the gasket 122 is formed after solidification, and the gasket 122 formed by the glue can prevent the problems of short circuit and the like caused by the fact that the bonding wires 111 collapse to the packaging tube shell 12 when the packaging glue layer 124 is laid on the bonding wires 111.
Preferably, the gel used to form the gasket 122 may be G8345-D.
Preferably, the height of the gasket 122 is equal to the thickness of the chip 11 or slightly greater than the thickness of the chip 11.
As a preferred embodiment of the present invention, as shown in fig. 4, before the step of laying the encapsulation adhesive layer 124, the method further includes:
and colloid is dripped on the gasket 122 to form a limiting ring 123, the limiting ring 123 covers the part of the bonding wire 111 arranged on the gasket 122, and the gasket 122 formed firstly can be used as a base body for dripping the limiting ring 123 when the limiting ring 123 is dripped.
Specifically, drip and form spacing collar 123 after, still include:
the package case 12 is preheated at 80 ℃ for 10 minutes, baked at 120 ℃ for 30 minutes, and then cooled to room temperature, so that the retainer 123 is solidified.
Preferably, the colloid used to form the stop collar 123 is G8345-D.
Further, when the encapsulation adhesive layer 124 is laid, the method further includes:
glue is injected between the edge of the gasket 122 and the edge of the package tube 12, the package tube is preheated at 80 ℃ for 10 minutes after the glue injection is finished, and then the package tube is baked at 120 ℃ for 30 minutes to form a package glue layer 124, so that the package glue layer 124 is solidified and covers part of the bonding wires 111 and the pins 121.
Preferably, the encapsulant used to form the encapsulant layer 124 is G8345-6.
Specifically, the cross section of the package case 12 is U-shaped, a recessed space recessed downward and a side wall for surrounding the recessed space are formed, the chip 11 is mounted in the recessed space, and the pins 121 are located at positions of the recessed space close to the side wall;
glue is injected between the outer side edge of the gasket 122 and the side wall of the recessed space to form a packaging glue layer 124, so that glue is prevented from leaking outwards during glue injection.
The specific embodiment of the invention is as follows:
referring to fig. 2, the processed chip 11 is attached to the package case 12;
referring to fig. 3, injecting glue on the package 12 and forming a gasket 122, where the gasket 122 is located between the chip 11 and the leads 121 and surrounds the chip 11, and after the gasket 122 is solidified, the bonding wires 111 are soldered between the chip 11 and the leads 121, and the bonding wires 111 are located above the gasket 122, and the gasket 122 can prevent the bonding wires 111 from drooping to contact with the package 12 to cause short circuit;
as shown in fig. 4, glue is injected above the gasket 122 to form a limiting ring 123, since there may be a gap between the gasket 122 and the bonding wire 111, the gap can be filled when the gasket 123 is injected, and the limiting ring 123 is solidified after heating, at this time, the bonding wire 111 is fixedly clamped between the gasket 122 and the limiting ring 123;
as shown in fig. 5, the glue is injected outside the limiting ring 123 to form a packaging glue layer 124, the limiting ring 123 and the gasket 122 can block the glue during glue injection to prevent the glue from flowing to the chip 11, the packaging glue layer 124 is solidified after drying, the joint of the bonding wire 111 and the pin 121 is wrapped by the packaging glue layer 124 and cannot be damaged due to mistaken touching, in addition, part of the bonding wire 111 is wrapped to facilitate taking and transportation of experimenters, and the exposed chip 11 is also convenient for experiment.
While the present invention has been described in detail and with reference to the embodiments thereof as illustrated in the accompanying drawings, it will be apparent to one skilled in the art that various changes and modifications can be made therein. Therefore, certain details of the embodiments are not to be interpreted as limiting, and the scope of the invention is to be determined by the appended claims.
Claims (9)
1. A local sealing method for a chip is characterized by comprising the following steps:
s11, attaching a chip to a packaging tube shell, and arranging a gasket for surrounding the chip between a pin of the packaging tube shell and the edge of the chip;
s12, providing a bonding wire, welding and connecting two ends of the bonding wire with a wiring terminal of the chip and the corresponding pin respectively, and supporting the bonding wire through the gasket to enable a set distance to be reserved between the bonding wire and the packaging tube shell;
and S13, arranging a packaging adhesive layer between the gasket and the edge of the packaging tube shell, so that the packaging adhesive layer covers the pin and the part of the bonding wire, which is positioned on the outer side of the gasket.
2. The method of claim 1, wherein before the step of applying the encapsulant layer, the step of:
and dripping glue on the gasket to form a limiting ring, wherein the limiting ring covers the part of the bonding wire arranged on the gasket.
3. The method of claim 2, wherein after forming the retaining ring by dropping, further comprising:
preheating the packaging tube shell at 80 ℃ for 10 minutes, baking at 120 ℃ for 30 minutes, and cooling to room temperature to solidify the limiting ring.
4. The method of claim 2, wherein the stop collar is formed from a gel G8345-D.
5. The method as claimed in claim 1, further comprising:
and injecting glue between the edge of the gasket and the edge of the packaging tube shell, preheating for 10 minutes at 80 ℃ after the glue injection is finished, and further baking for 30 minutes at 120 ℃ to form the packaging glue layer.
6. The method as claimed in claim 5, wherein the encapsulant used to form the encapsulant layer is G8345-6.
7. The method as claimed in claim 1, further comprising:
and dripping colloid between the pin and the chip, forming the gasket after solidification, wherein the height of the gasket is matched with the thickness of the chip.
8. The method as claimed in claim 7, wherein the adhesive used to form the gasket is G8345-D.
9. The method as claimed in claim 1, wherein the package casing has a U-shaped cross-section, and has a recessed space and a sidewall surrounding the recessed space;
and injecting glue between the outer side edge of the gasket and the side wall of the recessed space to form the packaging glue layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910805589.5A CN110600384A (en) | 2019-08-29 | 2019-08-29 | Local sealing method for chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910805589.5A CN110600384A (en) | 2019-08-29 | 2019-08-29 | Local sealing method for chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110600384A true CN110600384A (en) | 2019-12-20 |
Family
ID=68856183
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910805589.5A Pending CN110600384A (en) | 2019-08-29 | 2019-08-29 | Local sealing method for chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110600384A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1031446A (en) * | 1987-07-16 | 1989-03-01 | 数字设备公司 | Semiconductor chip shell with the automatic welding welding of belt |
| US5376756A (en) * | 1991-12-20 | 1994-12-27 | Vlsi Technology, Inc. | Wire support and guide |
| CN1479357A (en) * | 2002-08-26 | 2004-03-03 | 联华电子股份有限公司 | Packaging method capable of proceeding electric defect test for top surface and botton surface of wafer |
| JP2005276879A (en) * | 2004-03-23 | 2005-10-06 | Sony Corp | Semiconductor device and its manufacturing method |
-
2019
- 2019-08-29 CN CN201910805589.5A patent/CN110600384A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1031446A (en) * | 1987-07-16 | 1989-03-01 | 数字设备公司 | Semiconductor chip shell with the automatic welding welding of belt |
| US5376756A (en) * | 1991-12-20 | 1994-12-27 | Vlsi Technology, Inc. | Wire support and guide |
| CN1479357A (en) * | 2002-08-26 | 2004-03-03 | 联华电子股份有限公司 | Packaging method capable of proceeding electric defect test for top surface and botton surface of wafer |
| JP2005276879A (en) * | 2004-03-23 | 2005-10-06 | Sony Corp | Semiconductor device and its manufacturing method |
Non-Patent Citations (1)
| Title |
|---|
| 李爱菊等: "《现代工程材料成形与制造工艺基础 下册》", 31 December 2001, 北京：机械工业出版社 * |
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| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: Room C101, Building 8, 1618 Yishan Road, Minhang District, Shanghai, 201100 Applicant after: Suzhou Yite (Shanghai) Testing Technology Co., Ltd Address before: 201103 C101 room 8, building 1618, Yishan Road, Shanghai, Minhang District, China Applicant before: INTEGRA TED SERVICE TECHNOLOGY (SHANGHAI) Co.,Ltd. |
|
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20191220 |