CN110196416A - A kind of radar multi-channel data acquisition and real-time processing device - Google Patents
A kind of radar multi-channel data acquisition and real-time processing device Download PDFInfo
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- CN110196416A CN110196416A CN201910464093.6A CN201910464093A CN110196416A CN 110196416 A CN110196416 A CN 110196416A CN 201910464093 A CN201910464093 A CN 201910464093A CN 110196416 A CN110196416 A CN 110196416A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/41—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00 using analysis of echo signal for target characterisation; Target signature; Target cross-section
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- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
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- Radar Systems Or Details Thereof (AREA)
Abstract
The present invention provides a kind of radar multi-channel data acquisition and real-time processing devices, belong to radar signal acquisition and process field.The present invention completes the functions such as multiple signals parallel acquisition, object ranging and angle measurement, for solving the problems, such as the on piece real time data processing of existing multi-channel data acquisition unit.The present invention carries out the processing such as data sampling, Digital Down Convert and target Mutual coupling to eight tunnel input signals, completes the estimation to parameters such as chirp slope, the distance and bearing angles of echo signal.Apparatus of the present invention include No. eight analog-digital converters, the real-time processing unit of five FPGA, clock synchronization unit and four storage units, the data parallel acquisition and processing in real time that first to fourth FPGA completes eight channels, carried out data transmission between adjacent FPGA using IFDL high-speed interface, 5th FPGA controls clock synchronization unit and data interaction to host computer, since only data processed result being exported by PCIE high-speed serial bus, volume of transmitted data is reduced, system treatment effeciency is improved.
Description
Technical field
The invention belongs to radar signal acquisition with processing process field, in particular to a kind of radar multi-channel data acquisition with
Real-time processing device.
Background technique
In big array image-forming radar, phased-array radar, distributed radar system, there are multi-emitting receiving channels, receive
Signal has the characteristics that signal bandwidth is big, pulse recurrence frequency is high, therefore its data collection system needs to have multi-channel synchronous
Data acquisition, high speed acquisition and the ability handled in real time.But existing radar multi-channel signal acquiring device, is usually only completed multi-pass
The functions such as track data acquisition, data storage, handle admission data under line, limit Multichannel radar systematic difference ring
Border.
In the prior art, radar signal acquisition device passes through echo down-converter unit, intermediate-freuqncy signal unit and digital channel
Change unit, realize acquisition and the Channel Digital of echo-signal, data are then carried out by PCIE serial bus transmission to computer
Processing.But the device does not have the ability of on piece generating date, must pass through the analysis of the online lower completion system of data transmission
Verifying, is not able to satisfy the real-time and high efficiency of system.
For the acquisition for realizing Multichannel radar signal, signal acquisition is completed by AFE(analog front end) and deserializer, then
Radar host computer is transferred to finally by data buffer and USB controller by the processing of decimation filter and FIR filter.
But the device does not have multichannel synchronousing collection function, is not able to satisfy the scenes such as Space ball.
Summary of the invention
It is an object of the invention to solve traditional multi-channel data acquisition unit in the prior art, cannot to complete on piece real-time
The deficiency of processing proposes a kind of radar multi-channel data acquisition and real-time processing device.
A kind of radar multi-channel data acquisition and real-time processing device, including No. eight analog-digital converters, clock synchronization unit,
Five real-time processing units, four storage units and switch matrix；
No. eight analog-digital converter is evenly distributed in first to fourth real-time processing unit, first to fourth processing in real time
Unit receives the digital medium-frequency signal in No. eight analog-digital converter two of them channel respectively；
The clock synchronization unit is connect with No. eight analog-digital converter, for generating differential clock signal, the difference
Divide sampling clock of the clock signal as No. eight analog-digital converter；
The first to fourth real-time processing unit receives the digital medium-frequency signal in respective two channels respectively, carries out parallel
Processing completes Digital Down Convert processing, digital medium-frequency signal is converted to baseband signal, is handled and will be handled in real time in real time
Obtained data are transmitted separately to first to fourth storage unit and switch matrix；
First to fourth storage unit is separately connected described first to fourth real-time processing unit, for storing respectively
The data of the first to fourth real-time processing unit transmission；
The switch matrix is separately connected described first to fourth real-time processing unit and the 5th processing unit, and the described 5th
Processing unit controls the switch matrix to the gating of first to fourth real-time processing unit, will handle obtained data in real time and leads to
It crosses high-speed serial bus and is sent to host computer；
5th processing unit is connect with the clock synchronization unit, poor for controlling the clock synchronization unit generation
Point clock signal is synchronous to carry out clock.
Further, in the analog-digital converter of No. eight, the first and second data acquisition channels and the first processing in real time are single
Member connection, the third and fourth data acquisition channel connect with the second real-time processing unit, the 5th and the 6th data acquisition channel and
The real-time processing unit connection of third, the 7th and the 8th data acquisition channel are connect with the 4th real-time processing unit；
No. eight analog-digital converter carries out bandpass sampling to the analog if signal for being input to eight data acquisition channels
Processing makes the analog if signal of input be converted to digital medium-frequency signal, and it is single to be transmitted to described first to fourth processing in real time
Member.
Further, in described first to fourth real-time processing unit, adjacent real-time processing unit connection receives two respectively
The digital medium-frequency signal of a data acquisition channel, under being completed after the digital medium-frequency signal parallel processing of two data acquisition channels
Digital medium-frequency signal is converted to baseband signal by frequency-conversion processing；
The first real-time processing unit receives the baseband signal of the first and second data acquisition channels, carries out pulse compression
Processing, detects the compressed data of pulse, and at the time of record is more than default detection threshold value, target range is calculated,
By the base band data transmission of the first and second data acquisition channels to the described second real-time processing unit；
The second real-time processing unit receives the first and second data acquisition of the described first real-time processing unit transmission
The base band data in channel, the base band data of the third and fourth data acquisition channel and the third real-time processing unit transmission the
The base band data of five to the 8th data acquisition channels determines direction of arrival using spatial spectral estimation algorithm, and by first to fourth
The base band data transmission of data acquisition channel is to the real-time processing unit of the third；
The real-time processing unit of third receives the first to fourth data acquisition of the described second real-time processing unit transmission
The of the base band data of the data acquisition channel of the base band data in channel, the 5th and the 6th and the 4th real-time processing unit transmission
The base band data of seven and the 8th data acquisition channel, obtains the base band data of eight data acquisition channels；
The 4th real-time processing unit receives the baseband signal of the 7th and the 8th data acquisition channel, passes through mesh in time domain
The rising edge and failing edge of backward energy distribution are marked, signal time width is calculated, is changed using fast Fourier, calculates signal frequency domain frequency
Spectral structure estimates signal spectrum bandwidth, calculates actual measurement chirp slope, completes parameter and calculates, and by the 7th and the 8th data
The base band data transmission of acquisition channel is to the real-time processing unit of the third；
After the first to fourth real-time processing unit completes the real-time processing of data, it is transmitted separately to first to fourth and deposits
Storage unit is stored, and the 5th real-time processing unit controls the switch matrix, by high-speed serial bus by described the
The data that one to the 4th real-time processing unit is handled in real time are uploaded to host computer.
Further, in described first to fourth real-time processing unit, adjacent real-time processing unit is connected by IFDL interface
It connects.
Further, the clock synchronization unit includes crystal oscillator, phase discriminator, loop filter, voltage controlled oscillator, frequency dividing
Device, timer manager and buffer, the crystal oscillator, phase discriminator, loop filter, voltage controlled oscillator are sequentially connected, frequency divider point
Not Lian Jie phase discriminator and voltage controlled oscillator, voltage controlled oscillator connects timer manager and buffer, the clock that the crystal oscillator generates
The feedback signal of signal and the voltage controlled oscillator is all input to the phase discriminator via the frequency divider, the phase discriminator by when
Clock signal and the phase difference of feedback signal are converted to error voltage output, and the loop filter filters out in the error voltage
High fdrequency component, the voltage controlled oscillator is controlled generation compensation phase by the error voltage, gentle via the timer manager
It rushes device and obtains four road differential clock signals, sampling clock of the differential clock signal as the analog-digital converter.
Beneficial effects of the present invention: the present invention provides a kind of radar multi-channel data acquisition and real-time processing devices, originally
Invention uses radar multi-channel data acquisition and real-time processing device, and each data acquisition channel can realize stringent synchronization, acquisition letter
The mutual biography of data needed for number completing every fpga chip by high-speed serial bus, realize parallel ranging, angle measurement, data readback,
Data processed result is only exported by PCIE high-speed serial bus, reduces volume of transmitted data by the functions such as parameter Estimation, is promoted
System treatment effeciency is analyzed convenient for user's checking and data.The present apparatus is more with receiving channel, inter-channel synchronization delay is low,
Signal processing strong real-time, can according to demand customized user function the features such as, be suitable for the parallel ranging of radar array, angle measurement,
The multifunctional applications environment such as data readback, parameter Estimation.
Detailed description of the invention
Fig. 1 is the radar multi-channel data acquisition of the embodiment of the present invention and the structural schematic diagram of real-time processing device.
Fig. 2 is the structural schematic diagram of the clock synchronization unit of the embodiment of the present invention.
Fig. 3 is that the chip chamber of the embodiment of the present invention transmits control figure.
Fig. 4 is the transmitting signal graph of the embodiment of the present invention.
Fig. 5 is the DDC processing result figure of the embodiment of the present invention.
Fig. 6 is the DOA estimated result figure of the embodiment of the present invention.
In figure: 110- analog-digital converter；120- clock synchronization unit；121- crystal oscillator；122- phase discriminator；123- loop filtering
Device；124- voltage controlled oscillator；125- frequency divider；126- timer manager and buffer；130- host computer；210- first locates in real time
Manage unit；The real-time processing unit of 220- second；The real-time processing unit of 230- third；The real-time processing unit of 240- the 4th；250-
Five real-time processing units；260- switch matrix；The first storage unit of 310-；The second storage unit of 320-；The storage of 330- third is single
Member；The 4th storage unit of 340-.
Specific embodiment
The embodiment of the present invention is described further with reference to the accompanying drawing.
Referring to Fig. 1, the invention proposes a kind of radar multi-channel data acquisition and real-time processing device, including eight road moulds
Number converter 110, clock synchronization unit 120, five real-time processing units, four storage units and switch matrix 260.
In the present embodiment, clock synchronization unit 120 provides synchronization signal for eight circuit-switched data acquisition channels, and eight road moduluses turn
Parallel operation 110 is evenly distributed in first to fourth real-time processing unit, believes the analog intermediate frequency for being input to eight data acquisition channels
Number carry out bandpass sampling processing, make input eight road analog if signals bandpass sampling processing after be converted to eight railway digital intermediate frequencies
Signal.First to fourth each 2 channel datas of processing unit processes in real time, complete the parallel processing of 2 channel datas.And the
Five real-time processing units 250 then control the gating of first to fourth real-time processing unit and switch matrix 260, by what is handled in real time
As a result host computer 130 is sent to by high-speed serial bus, completes the interaction of processing result.Specifically:
In the present embodiment, in No. eight analog-digital converters 110 (Analog-to-Digital Converter, ADC), first
It is connect with the second data acquisition channel with the first real-time processing unit 210, the third and fourth data acquisition channel and second is in real time
Processing unit 220 connects, and the 5th and the 6th data acquisition channel is connect with the real-time processing unit 230 of third, the 7th and the 8th number
It is connect according to acquisition channel with the 4th real-time processing unit 240.
In the present embodiment, No. eight analog-digital converters 110 to be input to the analog if signals of eight data acquisition channels into
The processing of row bandpass sampling, makes the analog if signal of input be converted to digital medium-frequency signal, and is transmitted to first to fourth in real time
Processing unit.
Referring to Fig. 2, A/D sampling clock of the invention synchronizes as shown in the figure.Clock synchronization unit 120 include crystal oscillator 121,
Phase discriminator 122, loop filter 123, voltage controlled oscillator 124, frequency divider 125, timer manager and buffer 126, crystal oscillator
121, phase discriminator 122, loop filter 123, voltage controlled oscillator 124 are sequentially connected, and frequency divider 125 is separately connected phase discriminator 122
With voltage controlled oscillator 124, voltage controlled oscillator 124 connects timer manager and buffer 126.Wherein, A/D sampling clock is by locking phase
Loop generates, and the clock signal of the generation of crystal oscillator 121 and the feedback signal of voltage controlled oscillator 124 first is all defeated via frequency divider 125
Enter to phase discriminator 122, the phase difference of clock signal and feedback signal is converted to error voltage and exported by phase discriminator 122, loop filter
Wave device 123 filters out the high fdrequency component in error voltage, and voltage controlled oscillator 124 is controlled generation compensation phase by error voltage, so that
Phase stabilization generates the reference clock shaken less.Since the sampling clock length of arrangement wire of each real-time processing unit is not quite similar,
Cause A/D sampling clock asynchronous, is misaligned sampled data, so clock synchronization circuit as shown in Figure 2 is devised, via
Timer manager (Digital Clock Management, DCM) and buffer (Buffer) obtain four road differential clock signals,
Sampling clock of the differential clock signal as analog-digital converter 110 can make up the clock routing that each A/D is reached by sampling clock
Length difference bring error realizes that the clock of eight road A/D is synchronous.Using above-mentioned clock synchronizing method, it is ensured that eight road A/D are adopted
The synchronous error of sample clock is within 30ps.
In the present embodiment, in order to be received and dispatched using based on GTX Parallel transformation by the data summarization in eight channels of parallel acquisition
The Aurora agreement of device interface, the peak transfer rate in each channel GTX can achieve 6.5Gbit/s, and five processing in real time are single
Member uses 16 GTX sending and receiving data, and peak transfer rate supports 52Gbit/s.While the synchronization in order to guarantee interchannel data
Transmission transmits and receives data using timing as shown in Figure 3 and the method for synchronization.Impulsive synchronization hair is provided by pin port signal
Reception signal is sent, when data receipt unit detects the rising edge of effective impulse signal, data transmission unit will be where echo
Channel position, RAM storing data be sent to data receipt unit, receiving unit is by the RAM of echo data deposit mark channel；
When detecting pulse falling edge trigger signal, data receipt unit stops data receiver, and carries out on piece data processing and knot
Fruit output.
In the present embodiment, eight road signals are input in first to fourth real-time processing unit and carry out after bandpass sampling
Parallel processing, first in real-time processing unit interior completion Digital Down Convert processing (Digital Down Converter,
DDC), digital medium-frequency signal is converted into baseband signal, eight channel DDC results are as shown in Figure 4.First FPGA realizes that target is surveyed
Away from the 2nd FPGA realizes that Wave beam forming, the 3rd FPGA realize data readback, and the 4th FPGA realizes parameter Estimation.As shown in figure 5,
The concrete form for giving transmitting signal is S (t)=exp (- j2 π fct2), carrier frequency fcFor 1GHz, sample rate 1.6GHz, sampling
64 μ s of Shi Changwei, bandwidth 10MHz, target angle is 60 °.
In the present embodiment, the first real-time processing unit 210 and the first storage unit 310, the second real-time processing unit 220 with
The real-time processing unit of second storage unit 320, third 230 and third storage unit 330, the 4th real-time processing unit 240 and the
Four storage units 340 connection, to store each real-time processing unit data information.
Preferably, real-time processing unit be field programmable gate array (Field-Programmable Gate Array,
FPGA).In first to fourth real-time processing unit, pass through the High Speed I FDL (Inter- based on Aurora agreement between adjacent FPGA
FPGA DataLink) interface realize data real-time Transmission.
Specifically, in the first real-time processing unit 210, receiving channel 1,2 data, completion Digital Down Convert first, channel
1,2 baseband signal passes through process of pulse-compression, then carries out CFAR detection to the data after process of pulse-compression, and record is more than pre-
If at the time of detection threshold value, obtaining echo time delay τ1And τ2, by calculating to obtain R1=c τ1/ 2, R2=c τ2/ 2, then to distance measurement result
It is averaged, obtains target range R=(R1+R2Object ranging is completed in)/2.As shown in table 1 below, different signal-to-noise ratio items are given
Distance measurement result under part.Meanwhile first real-time processing unit 210 data in channel 1,2 are transmitted to the second real-time processing unit
220。
| Signal-to-noise ratio | Distance is set | Time width | Period | Test result | Error |
| 20db | 2km | 5μs | 50μs | 2.07km | 3.50% |
| 25db | 3km | 5μs | 50μs | 3.08km | 2.67% |
| 25db | 5km | 5μs | 50μs | 5.13km | 2.60% |
Distance measurement result under the conditions of the different signal-to-noise ratio of table 1
Specifically, the data of the second real-time 220 receiving channel 1-8 of processing unit, wherein channel 1,2 data come from first
Real-time processing unit 210, channel 5-8 data come from the real-time processing unit 230 of third.Second real-time processing unit 220 is to eight tunnels
Baseband signal carries out power spectrumanalysis, estimates target arrival bearing θ using spatial spectral estimation algorithmk, extract signal radiation source number
Mesh N realizes target direction of arrival (Direction Of Arrival, DOA) estimation.As shown in fig. 6, giving DOA estimation knot
Fruit determines direction of arrival.Meanwhile second real-time processing unit 220 channel 1-4 data are transmitted to the real-time processing unit of third
230。
Specifically, the data of the real-time 230 receiving channel 1-8 of processing unit of third, wherein channel 1-4 data come from second
Real-time processing unit 220, channel 7,8 data come from the 4th real-time processing unit 240.The real-time processing unit 230 of third obtains eight
The baseband signal of circuit-switched data acquisition channel, after echo denoising, by obtained data storage to third storage unit 330
It is interior, and host computer 130 is sent to by high-speed serial bus PCIE, realize data readback function, while facilitating the algorithm in later period
Verifying and test.
Specifically, the data of the 4th real-time 240 receiving channel 7,8 of processing unit, in time domain, by judging target echo energy
The rising edge and failing edge of distribution are measured, signal time width T is calculated；Fast Fourier variation is recycled, signal frequency domain frequency spectrum point is calculated
Cloth estimates signal spectrum bandwidth B, using measurement signal when the parameters such as wide bandwidth, calculate actual measurement chirp slope kr=B/
T, and above-mentioned parameter is exported to host computer 130, complete parameter Estimation function.As shown in table 2, different signal-to-noise ratio conditions are given
Under chirp slope estimated result.
Linear frequency modulation parameter result under the conditions of the different signal-to-noise ratio of table 2
The real-time processing of the first to fourth real-time complete paired data of processing unit.
In the present embodiment, the 5th real-time processing unit 250 controls the choosing of the PCIE switch matrix 260 of remaining four FPGA
It is logical, the result handled in real time is sent to host computer 130 by high-speed serial bus, completes the interaction of processing result.Meanwhile the
Five real-time processing units 250 are connect with clock synchronization unit 120, and the clock of control clock synchronization unit 120 is synchronous.
In the present embodiment, time-consuming measurement in real time is carried out to above-mentioned function, the work of FPGA master clock is in 200M, data acquisition
With Digital Down Convert 182 μ s of time-consuming, pulse compression and CFAR detection are completed, realizes ranging time-consuming nearly 120 μ s altogether, the number in eight channels
According to convergence 63 μ s of time-consuming, completes Mutual coupling and be total to 434 μ s of time-consuming, complete the estimation of time domain time width and frequency domain bandwidth, realize
Chirp slope calculates total 170 μ s of time-consuming and demonstrates this according to the measured data of the above time-consuming and muti-piece FPGA parallel processing
The real-time of device chip processing.
Those of ordinary skill in the art will understand that embodiment here be to help reader understand it is of the invention
Principle, it should be understood that protection scope of the present invention is not limited to such specific embodiments and embodiments.This field it is common
Technical staff disclosed the technical disclosures can make the various various other tools for not departing from essence of the invention according to the present invention
Body variations and combinations, these variations and combinations are still within the scope of the present invention.
Claims (5)
1. a kind of radar multi-channel data acquisition and real-time processing device, which is characterized in that including No. eight analog-digital converters, clock
Synchronization unit, five real-time processing units, four storage units and switch matrix；
No. eight analog-digital converter is evenly distributed in first to fourth real-time processing unit, first to fourth real-time processing unit
The digital medium-frequency signal in No. eight analog-digital converter two of them channel is received respectively；
The clock synchronization unit is connect with No. eight analog-digital converter, for generating differential clock signal, when the difference
Sampling clock of the clock signal as No. eight analog-digital converter；
The first to fourth real-time processing unit receives the digital medium-frequency signal in respective two channels respectively, is located parallel
Reason completes Digital Down Convert processing, digital medium-frequency signal is converted to baseband signal, is handled and will be handled in real time in real time
To data be transmitted separately to first to fourth storage unit and switch matrix；
First to fourth storage unit is separately connected described first to fourth real-time processing unit, for described in storage respectively
The data of first to fourth real-time processing unit transmission；
The switch matrix is separately connected described first to fourth real-time processing unit and the 5th processing unit, the 5th processing
Unit controls the switch matrix to the gating of first to fourth real-time processing unit, will handle obtained data in real time and passes through height
Fast universal serial bus is sent to host computer；
5th processing unit is connect with the clock synchronization unit, when generating difference for controlling the clock synchronization unit
Clock signal is synchronous to carry out clock.
2. radar multi-channel data acquisition as described in claim 1 and real-time processing device, which is characterized in that eight road mould
In number converter, the first and second data acquisition channels are connect with the first real-time processing unit, and the acquisition of the third and fourth data is logical
Road is connect with the second real-time processing unit, and the 5th and the 6th data acquisition channel is connect with the real-time processing unit of third, the 7th He
8th data acquisition channel is connect with the 4th real-time processing unit；
No. eight analog-digital converter carries out bandpass sampling processing to the analog if signal for being input to eight data acquisition channels,
So that the analog if signal of input is converted to digital medium-frequency signal, and is transmitted to described first to fourth real-time processing unit.
3. radar multi-channel data acquisition as claimed in claim 2 and real-time processing device, which is characterized in that described first to
In 4th real-time processing unit, adjacent real-time processing unit connection receives the digital intermediate frequency letter of two data acquisition channels respectively
Number, down-converted will be completed after the digital medium-frequency signal parallel processing of two data acquisition channels, digital medium-frequency signal is turned
It is changed to baseband signal；
The first real-time processing unit receives the baseband signal of the first and second data acquisition channels, carries out at pulse compression
Reason, detects the compressed data of pulse, and at the time of record is more than default detection threshold value, target range is calculated, will
The base band data transmission of first and second data acquisition channels is to the described second real-time processing unit；
The second real-time processing unit receives the first and second data acquisition channels of the described first real-time processing unit transmission
Base band data, the third and fourth data acquisition channel base band data and the third real-time processing unit transmission the 5th to
The base band data of 8th data acquisition channel determines direction of arrival using spatial spectral estimation algorithm, and by first to fourth data
The base band data transmission of acquisition channel is to the real-time processing unit of the third；
The real-time processing unit of third receives first to fourth data acquisition channel of the described second real-time processing unit transmission
The data acquisition channel of base band data, the 5th and the 6th base band data and the 4th real-time processing unit transmission the 7th and
The base band data of 8th data acquisition channel obtains the base band data of eight data acquisition channels；
The 4th real-time processing unit receives the baseband signal of the 7th and the 8th data acquisition channel, is returned in time domain by target
The rising edge and failing edge of wave energy distribution, are calculated signal time width, are changed using fast Fourier, and signal frequency domain frequency spectrum point is calculated
Cloth estimates signal spectrum bandwidth, calculates actual measurement chirp slope, completes parameter and calculates, and the 7th and the 8th data are acquired
The base band data transmission in channel is to the real-time processing unit of the third；
After the first to fourth real-time processing unit completes the real-time processing of data, it is transmitted separately to first to fourth storage list
Member is stored, and the 5th real-time processing unit controls the switch matrix, by high-speed serial bus by described first to
The data that 4th real-time processing unit is handled in real time are uploaded to host computer.
4. radar multi-channel data acquisition as described in claim 1 and real-time processing device, which is characterized in that described first to
In 4th real-time processing unit, adjacent real-time processing unit is connected by IFDL interface.
5. radar multi-channel data acquisition as described in claim 1 and real-time processing device, which is characterized in that the clock is same
Walking unit includes crystal oscillator, phase discriminator, loop filter, voltage controlled oscillator, frequency divider, timer manager and buffer, the crystalline substance
Vibration, phase discriminator, loop filter, voltage controlled oscillator are sequentially connected, and frequency divider is separately connected phase discriminator and voltage controlled oscillator, voltage-controlled
Oscillator connects timer manager and buffer, the feedback signal of clock signal and the voltage controlled oscillator that the crystal oscillator generates
It is all input to the phase discriminator via the frequency divider, the phase discriminator is converted to the phase difference of clock signal and feedback signal
Error voltage output, the loop filter filter out the high fdrequency component in the error voltage, and the voltage controlled oscillator is by described
Error voltage control generates compensation phase, obtains four road differential clock signals via the timer manager and buffer, described
Sampling clock of the differential clock signal as the analog-digital converter.
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Cited By (5)
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| CN113064124A (en) * | 2021-03-12 | 2021-07-02 | 广州辰创科技发展有限公司 | Signal synchronization assembly for remote radar detection system |
| CN113433516A (en) * | 2021-06-24 | 2021-09-24 | 中国人民解放军海军大连舰艇学院 | Multi-radar target signal synchronous injection system |
| CN113641612A (en) * | 2021-08-16 | 2021-11-12 | 中国科学院近代物理研究所 | Multichannel data real-time processing equipment |
| CN113806268A (en) * | 2021-08-04 | 2021-12-17 | 方一信息科技（上海）有限公司 | Aurora interface-based multi-channel data synchronous receiving method and system |
| CN114217288A (en) * | 2022-02-22 | 2022-03-22 | 湖南纳雷科技有限公司 | Method and system for synchronizing high coherence between chips of echo signals of radar |
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