CN110165917B - Non-circulating current single-phase double-Buck full-bridge inverter and control strategy thereof - Google Patents

Non-circulating current single-phase double-Buck full-bridge inverter and control strategy thereof Download PDF

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CN110165917B
CN110165917B CN201910347284.4A CN201910347284A CN110165917B CN 110165917 B CN110165917 B CN 110165917B CN 201910347284 A CN201910347284 A CN 201910347284A CN 110165917 B CN110165917 B CN 110165917B
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diode
switching tube
voltage
current
tube
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CN110165917A (en
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杨帆
葛红娟
李言
于兆龙
吴红飞
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Nanjing University of Aeronautics and Astronautics
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Nanjing University of Aeronautics and Astronautics
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration

Abstract

The invention discloses a loop-free single-phase double-Buck full-bridge inverter and a control strategy thereof, belonging to the technical field of power electronic converters. The invention provides a frequency-fixed and circulation-free control strategy aiming at unipolar modulation of a traditional double-Buck full-bridge inverter, solves the problem that the traditional double-Buck full-bridge inverter control strategy can not adopt unipolar modulation to enable the double-Buck full-bridge inverter to operate at a fixed frequency and without circulation, and is beneficial to improving the efficiency of the inverter. The double-input double-Buck full-bridge inverter provided by the invention can be simultaneously connected with two direct current input sources and generate various levels, so that the reliability and the efficiency of the inverter are improved. The single-polarity modulation fixed-frequency non-circulation control strategy of the double-input double-Buck full-bridge inverter provided by the invention adopts single-polarity modulation, so that the double-input double-Buck full-bridge inverter operates at a fixed frequency without circulation, and the efficiency of the double-input double-Buck full-bridge inverter is further improved.

Description

Non-circulating current single-phase double-Buck full-bridge inverter and control strategy thereof
Technical Field
The invention relates to a loop-free single-phase double-Buck full-bridge inverter and a control strategy thereof, belonging to the technical field of power electronics, in particular to the technical field of direct current-alternating current electric energy conversion.
Background
In recent years, the rapid development of multi-electric aircraft and new energy power generation has made higher demands on the reliability and efficiency of inverters. The traditional bridge inverter has the risk of direct connection of a bridge arm because a switching tube is connected with an input power supply in series. For this reason, researchers have proposed a variety of double Buck inverters. The double Buck inverter solves the problem of bridge arm direct connection of the traditional full-bridge inverter, and meanwhile, as body diodes are not needed to carry out follow current, the efficiency is higher. Among a plurality of double-Buck inverters, the double-Buck full-bridge inverter is widely applied due to the fact that the direct-current voltage utilization rate is high, and bidirectional operation can be achieved. However, the existing control mode of the double-Buck full-bridge inverter can not realize unipolar non-circulating current operation of the inverter, so that the efficiency of the inverter is limited; or the circulating-current-free operation can be realized, but the working frequency is not fixed, and the design of the filter is difficult. Therefore, how to realize the single-polarity modulation fixed-frequency non-circulating current operation of the double-Buck full-bridge inverter and further improve the efficiency of the inverter is a problem to be solved at present.
On the other hand, aerospace application occasions need a plurality of direct current input sources for power supply, so that the reliability of the inverter is improved; in order to fully utilize a plurality of energy sources in a new energy power generation occasion, a plurality of direct current input ports are also required to be provided for an inverter. Therefore, how to connect the inverter to a plurality of dc input sources at the same time is another problem that needs to be solved urgently.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter, provides a double-input double-Buck full-bridge inverter and a unipolar modulation non-circulation control strategy thereof, and is used for solving the defects of the current Buck full-bridge inverter in a topological structure and a control strategy.
In order to achieve the purpose, the invention adopts the technical scheme that:
the unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter is characterized in that:
the double Buck full bridge inverter is composed of an input voltage source (V)in) A first switch tube (S)1) A second switch tube (S)2) And a third switching tube (S)3) And a fourth switching tube (S)4) A first diode (D)1) A second diode (D)2) A third diode (D)3) A fourth diode (D)4) Forward filter inductor (L)P) Reverse filter inductance (L)N) Common filter inductor (L)f) And a load (Z). Wherein the DC input voltage source (V)in) Is connected to the first switching tube (S)1) Collector electrode of (1), second switching tube (S)2) Collector electrode of (D), third diode (D)3) And a fourth diode (D)4) A cathode of (a); a first switch tube (S)1) Is connected to a forward filter inductor (L)P) And a first diode (D)1) A cathode of (a); forward filter inductance (L)P) Is connected to a third diode (D)3) Anode of (2), common filter inductance (L)f) And a third switching tube (S)3) A collector electrode of (a); common filter inductor (L)f) Is connected to one end of a load (Z); a second switch tube (S)2) Is connected to a reverse filter inductance (L)N) And a second diode (D)2) A cathode of (a);reverse filter inductance (L)N) Is connected to the fourth diode (D)4) Anode of (2), fourth switching tube (S)4) And the other end of the load (Z); input voltage (V)in) Is connected to the first diode (D)1) Anode and third switching tube (S)3) Emitter electrode, fourth switching tube (S)4) And a second diode (D)2) Of (2) an anode.
The control system consists of a voltage outer ring and a current inner ring. Sampling voltage vosAnd a voltage reference vrefAnd comparing to obtain a voltage error value. The voltage error value passes through a voltage outer loop regulator GVProcessing, output as common filter inductance (L)f) Current reference iLf_ref. Common filter inductor (L)f) Sampling value i of the currentLfsAnd a current reference iLf_refAnd comparing to obtain a current error value. The current error value passes through the current inner loop regulator GIProcessed and output as a modulated wave vr. Voltage regulator G hereVAnd a current regulator GIAnd may be any regulator commonly used in inverters such as a proportional-integral regulator, a proportional-integral-derivative regulator, a proportional-resonant regulator, or the like.
Common filter inductor (L)f) Current reference iLf_refWhen compared with 0, when iLf_refWhen 0, the signal I is outputPIs logic high level 1, outputs signal INLogic low level 0; when i isLf_refWhen < 0, output signal INIs logic high level 1, outputs signal IPIs a logic low level 0. The modulation mode adopts unipolar modulation. v. ofTriPIs a positive triangular wave, vTriNThe amplitude of the negative triangular wave is equal to that of the negative triangular wave.
In the common filter inductor (L)f) Current reference iLf_refWhen ═ 0, the second switch tube (S)2) And a third switching tube (S)3) Kept off, the first switching tube (S)1) And a fourth switching tube (S)4) Modulation work:
when v isr>=vTriPWhile, the first switch tube (S)1) And a fourth switching tube (S)4) Conducting bridgeArm midpoint APAnd BPVoltage between is Vin
When v isTriP>vrWhen > -0, the fourth switch tube (S)4) And a first diode (D)1) Conducting, bridge arm midpoint APAnd BPThe voltage between is 0;
when 0 > vr>=vTriNWhile, the first switch tube (S)1) And a fourth diode (D)4) Conducting, bridge arm midpoint APAnd BPThe voltage between is 0;
when v isTriN>vrWhile, the first switch tube (S)1) Conducting and fourth switching tube (S)4) Is not conductive, the first diode (D)1) And a fourth diode (D)4) Conducting, bridge arm midpoint APAnd BPVoltage between is-Vin
In the common filter inductor (L)f) Current reference iLf_refWhen < 0, the first switch tube (S)1) And a fourth switching tube (S)4) Kept off, the second switching tube (S)2) And a third switching tube (S)3) Modulation work:
when v isr>=vTriPWhile, the second switch tube (S)2) And a third switching tube (S)3) Is not conductive, a second diode (D)2) And a third diode (D)3) Conducting, bridge arm midpoint ANAnd BNVoltage between is Vin
When v isTriP>vrWhen ═ 0, the second switch tube (S)2) And a third diode (D)3) Conducting, bridge arm midpoint ANAnd BNThe voltage between is 0;
when 0 > vr>=vTriNWhile, the third switch tube (S)3) And a second diode (D)2) Conducting, bridge arm midpoint ANAnd BNThe voltage between is 0;
when v isTriN>vrWhile, the second switch tube (S)2) And a third switching tube (S)3) Conducting, bridge arm midpoint ANAnd BNVoltage between is-Vin
The double-input double-Buck full-bridge inverter is composed of a high-voltage direct-current input voltage source (V)H) Low voltage DC input voltage source (V)L) A first switch tube (S)1) A second switch tube (S)2) And a third switching tube (S)3) And a fourth switching tube (S)4) And a fifth switching tube (S)5) And a sixth switching tube (S)6) A first diode (D)1) A second diode (D)2) A third diode (D)3) A fourth diode (D)4) A fifth diode (D)5) And a sixth diode (D)6) Forward filter inductor (L)P) Reverse filter inductance (L)N) Common filter inductor (L)f) And a load (Z). Wherein the high voltage direct current input voltage source (V)H) Is connected to the first switching tube (S)1) Collector electrode of (1), sixth diode (D)6) Cathode of (D), fifth diode (D)5) And a second switching tube (S)2) A collector electrode of (a); a first switch tube (S)1) Is connected to the first diode (D)1) And a third switching tube (S)3) A collector electrode of (a); third switch tube (S)3) Is connected to a forward filter inductor (L)P) And a third diode (D)3) A cathode of (a); forward filter inductance (L)P) Is connected at the other end to a common filter inductance (L)f) One terminal of (D), a sixth diode (D)6) And a sixth switching tube (S)6) A collector electrode of (a); common filter inductor (L)f) Is connected to one end of a load (Z); a second switch tube (S)2) Is connected to the second diode (D)2) And a fourth switching tube (S)4) A collector electrode of (a); fourth switch tube (S)4) Is connected to a reverse filter inductance (L)N) And a fourth diode (D)4) A cathode of (a); reverse filter inductance (L)N) Is connected to the fifth diode (D)5) Anode of (2), fifth switching tube (S)5) And the other end of the load (Z); low voltage DC input voltage source (V)L) Is connected to the first diode (D)1) And a second diode (D)2) Of yang (Yang)A pole; high voltage direct current input voltage source (V)H) Is connected with a low-voltage DC input voltage source (V)L) Negative electrode of (D), third diode (D)3) Anode of (2), sixth switching tube (S)6) Emitter electrode of (1), fifth switching tube (S)5) And a fourth diode (D)4) Of (2) an anode.
A unipolar modulation non-circulation control strategy based on a double-input double-Buck full-bridge inverter is characterized in that:
sampling voltage vosAnd a voltage reference vrefAnd comparing to obtain a voltage error value. The voltage error value passes through a voltage outer loop regulator GVProcessing, output as common filter inductance (L)f) Current reference iLf_ref. Common filter inductor (L)f) Sampling value i of the currentLfsAnd a current reference iLf_refAnd comparing to obtain a current error value. The current error value passes through the current inner loop regulator GIProcessed and output as a modulated wave vr. Voltage regulator G hereVAnd a current regulator GIAnd may be any regulator commonly used in inverters such as a proportional-integral regulator, a proportional-integral-derivative regulator, a proportional-resonant regulator, or the like.
Common filter inductor (L)f) Current reference iLf_refWhen compared with 0, when iLf_refWhen 0, the signal I is outputPIs logic high level 1, outputs signal INLogic low level 0; when i isLf_refWhen < 0, output signal INIs logic high level 1, outputs signal IPIs a logic low level 0. The modulation mode adopts unipolar modulation. v. ofTri1PAnd vTri2PIs a positive triangular wave, vTri1NAnd vTri2NIs a negative triangular wave, vTri1PAnd vTri1NEqual in amplitude, Δ vTri1。vTr2PAnd vTri2NEqual in amplitude, Δ vTri2。ΔvTri1And Δ vTri2Satisfies the following conditions:
the four triangular carriers are v from top to bottom in sequenceTri1P、vTri2P、vTri1NAnd vTri2N。vTri1PAnd vTri2PHas a boundary value of Δ vTri2,vTri2PAnd vTri1NHas a cut-off value of 0, vTri1NAnd vTri2NHas a cut-off value of- Δ vTri1
In the common filter inductor (L)f) Current reference iLf_refWhen ═ 0, the second switch tube (S)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Kept off, the first switching tube (S)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Modulation work:
when v isr>=vTri1PWhile, the first switch tube (S)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Conducting, bridge arm midpoint APAnd BPVoltage between is VH
When v isTri1P>vr>=vTri2PWhile a first diode (D)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Conducting, bridge arm midpoint APAnd BPVoltage between is VL
When v isTri2P>vrWhen > -0, the third diode (D)3) And a fifth switching tube (S)5) Conducting, bridge arm midpoint APAnd BPThe voltage between is 0;
when 0 > vr>=vTri1NWhile, the first switch tube (S)1) And a third switching tube (S)3) And a fifth diode (D)5) Conducting, bridge arm midpoint APAnd BPThe voltage between is 0;
when v isTri1N>vr>=vTri2NWhile a first diode (D)1) And a third switching tube (S)3) And a fifth diode (D)5) Conducting, bridge arm midpoint APAnd BPVoltage between is VL-VH
When v isTri2N>vrWhile, the third diode (D)3) And a fifth diode (D)5) Conducting, bridge arm midpoint APAnd BPVoltage between is-VH
In the common filter inductor (L)f) Current reference iLf_refWhen < 0, the first switch tube (S)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Kept off, the second switching tube (S)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Modulation work:
when (-v)r)>=vTri1PWhile, the second switch tube (S)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Conducting, bridge arm midpoint ANAnd BNVoltage between is-VH
When v isTri1P>(-vr)>=vTri2PWhile, the second diode (D)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Conducting, bridge arm midpoint ANAnd BNVoltage between is-VL
When v isTri2P>(-vr) When > -0, the fourth diode (D)4) And a sixth switching tube (S)6) Conducting, bridge arm midpoint ANAnd BNThe voltage between is 0;
when 0 > (-v)r)>=vTri1NWhile, the second switch tube (S)2) And a fourth switching tube (S)4) And a sixth diode (D)6) Conducting, bridge arm midpoint ANAnd BNThe voltage between is 0;
when v isTri1N>(-vr)>=vTri2NWhile, the second diode (D)2) And a fourth switching tube (S)4) And a sixth diode (D)6) Conducting, bridge arm midpoint ANAnd BNVoltage between is VH-VL
When v isTri2N>(-vr) While, the fourth diode (D)4) And a sixth diode (D)6) Conducting, bridge arm midpoint ANAnd BNVoltage between is VH
The high voltage DC input voltage source (V)H) Must not be lower than the low voltage dc input voltage source (V)L) The voltage of (c).
Has the advantages that:
(1) the invention discloses a loop-free single-phase double-Buck full-bridge inverter and a control strategy thereof, provides a unipolar modulation loop-free control strategy of the double-Buck full-bridge inverter, simplifies the filter design of the double-Buck full-bridge inverter, and improves the efficiency of the inverter;
(2) the invention discloses a loop-free single-phase double-Buck full-bridge inverter and a control strategy thereof, provides a double-input double-Buck full-bridge inverter, can simultaneously connect two direct current input ports and generate various levels on the basis of keeping the advantages of no bridge arm direct risk and no body diode reverse recovery of the traditional double-Buck inverter, and improves the reliability and efficiency of the inverter;
(3) the invention discloses a loop-free single-phase double-Buck full-bridge inverter and a control strategy thereof, provides a unipolar modulation loop-free control strategy of a double-input double-Buck full-bridge inverter, simplifies the design of a filter of the double-input double-Buck full-bridge inverter, and further improves the efficiency of the inverter.
Drawings
FIG. 1 is a circuit schematic diagram of a double Buck full bridge inverter corresponding to a unipolar modulation non-circulation control strategy of the double Buck full bridge inverter provided by the invention;
FIG. 2 is a block diagram of a unipolar modulation non-loop current control strategy of the double-Buck full-bridge inverter provided by the invention;
FIG. 3 is a key waveform diagram of the double Buck full bridge inverter under the unipolar modulation non-circulation control strategy of the double Buck full bridge inverter provided by the invention;
FIG. 4 is a schematic circuit diagram of a dual-input dual-Buck full-bridge inverter according to the present invention;
FIG. 5 is a block diagram of a unipolar modulation non-loop current control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention;
FIG. 6 is a key waveform diagram of the dual-input dual-Buck full-bridge inverter under the unipolar modulation non-loop current control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention;
FIG. 7 shows that under the unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter provided by the invention, the double-Buck full-bridge inverter works in the first quadrant (i)o>0,vo> 0) and a direct current input voltage source (V)in) An equivalent circuit diagram when supplying power to a load;
FIG. 8 shows that under the unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter provided by the invention, the double-Buck full-bridge inverter works in the first quadrant (i)o>0,vo> 0) and load and DC input voltage source (V)in) An equivalent circuit diagram when no energy is transmitted;
FIG. 9 shows that under the unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter provided by the invention, the double-Buck full-bridge inverter works in the fourth quadrant (i)o>0,vo< 0) and load and DC input voltage source (V)in) An equivalent circuit diagram when no energy is transmitted;
FIG. 10 shows that under the unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter provided by the invention, the double-Buck full-bridge inverter works in the fourth quadrant (i)o>0,vo< 0) and load to DC input voltage source (V)in) An equivalent circuit diagram when feeding back energy;
FIG. 11 shows that under the unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter provided by the invention, the double-Buck full-bridge inverter works in the second quadrant (i)o<0,vo> 0) and load to dc input voltage source (V)in) An equivalent circuit diagram when feeding back energy;
FIG. 12 shows that under the unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter provided by the invention, the double-Buck full-bridge inverter works in the second quadrant (i)o<0,vo> 0) and load and DC input voltage source (V)in) An equivalent circuit diagram when no energy is transmitted;
FIG. 13 shows a single-polarity modulation non-circulation control strategy of the double-Buck full-bridge inverter provided by the inventionIn the third quadrant (i)o<0,vo< 0) and load and DC input voltage source (V)in) An equivalent circuit diagram when no energy is transmitted;
FIG. 14 shows that under the unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter provided by the invention, the double-Buck full-bridge inverter works in the third quadrant (i)o<0,vo< 0) and a direct current input voltage source (V)in) An equivalent circuit diagram when supplying power to a load;
FIG. 15 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the first quadrant (i)o>0,vo> 0) and high voltage direct current input voltage source (V)H) An equivalent circuit diagram when power is supplied to a load alone;
FIG. 16 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the first quadrant (i)o>0,vo> 0) and a low voltage DC input voltage source (V)L) An equivalent circuit diagram when power is supplied to a load alone;
FIG. 17 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the first quadrant (i)o>0,vo> 0) and high voltage direct current input voltage source (V)H) Low voltage DC input voltage source (V)L) And an equivalent circuit diagram when no energy is transferred between the loads;
FIG. 18 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the fourth quadrant (i)o>0,vo< 0) and load and high voltage direct current input voltage source (V)H) Low voltage DC input voltage source (V)L) An equivalent circuit diagram when no energy is transmitted between the two circuits;
FIG. 19 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the fourth quadrant(io>0,vo< 0) and load and low voltage DC input voltage source (V)L) Common direction high voltage DC voltage source (V)H) An equivalent circuit diagram when transferring energy;
FIG. 20 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the fourth quadrant (i)o>0,vo< 0) and load alone to the high voltage direct current input voltage source (V)H) An equivalent circuit diagram when feeding back energy;
FIG. 21 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the third quadrant (i)o<0,vo< 0) and high voltage direct current input voltage source (V)H) An equivalent circuit diagram when power is supplied to a load alone;
FIG. 22 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the third quadrant (i)o<0,vo< 0) and low voltage DC input voltage source (V)L) An equivalent circuit diagram when energy is delivered to the load alone;
FIG. 23 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the third quadrant (i)o<0,vo< 0) and load and high voltage direct current input voltage source (V)H) Low voltage DC input voltage source (V)L) An equivalent circuit diagram when no energy is transmitted between the two circuits;
FIG. 24 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the second quadrant (i)o<0,vo> 0) and load and high voltage direct current input voltage source (V)H) Low voltage DC input voltage source (V)L) An equivalent circuit diagram when no energy is transmitted between the two circuits;
FIG. 25 is a single-polarity modulation non-circulating current control of the dual-input double-Buck full-bridge inverter proposed in the present inventionUnder the control strategy, the double-input double-Buck full-bridge inverter works in the second quadrant (i)o<0,vo> 0) and load and low voltage dc input voltage source (V)L) Common direction high voltage DC voltage source (V)H) An equivalent circuit diagram when transferring energy;
FIG. 26 shows that under the unipolar modulation non-circulation control strategy of the dual-input dual-Buck full-bridge inverter provided by the invention, the dual-input dual-Buck full-bridge inverter works in the second quadrant (i)o<0,vo> 0) and load to the high voltage dc input voltage source (V)H) An equivalent circuit diagram when energy is fed back independently;
symbolic names in the above figures:
in the double Buck full-bridge inverter and the unipolar modulation non-circulation control strategy thereof: vinFor direct current input of a voltage source, S1、S2、S3And S4Respectively a first, a second, a third and a fourth switching tube, D1、D2、D3And D4Respectively, a first, a second, a third and a fourth diode, Lp、LNIs divided by LfRespectively forward, reverse and common filter inductance, Z is load, voIs the load voltage, AP、AN、BP、BNRespectively, the middle point of each bridge arm, vAIs the midpoint of the bridge arm APOr ANPotential of vBIs the middle point B of the bridge armPOr BNPotential of vABIs v isA-vB。vrefTo output a voltage reference, vosFor sampling values of the output voltage, iLf_refIs a common filter inductor (L)f) Reference value of current, iLfsIs a common filter inductor (L)f) Sampled value of current, vrFor modulating waves, vTriPAnd vTriNPositive and negative triangular carriers of equal amplitude, respectively, P, Z, N vrAnd vTriP、0、vTriNThe resulting signals are compared with each other and,andand logic signals opposite to P, Z, and N, respectively, IPIs iLf_refSignal generated by comparison with 0 level, INIs a reaction ofPOpposite logic signal, vgs1、vgs2、vgs3And vgs4Are respectively a switch tube S1~S4The drive signal of (1).
In the dual-input dual-Buck full-bridge inverter and the unipolar modulation non-circulating current control strategy thereof: vHIs a high-voltage DC input voltage source, VLFor low-voltage DC input voltage source, S1、S2、S3、S4、S5And S6Respectively a first, a second, a third, a fourth, a fifth and a sixth switching tube, D1、D2、D3、D4、D5And D6Respectively a first, a second, a third, a fourth, a fifth and a sixth diode, Lp、LNIs divided by LfRespectively forward, reverse and common filter inductance, Z is load, voIs the load voltage, AP、AN、BP、BNRespectively, the middle point of each bridge arm, vAIs the midpoint of the bridge arm APOr ANPotential of vBIs the middle point B of the bridge armPOr BNPotential of vABIs v isA-vB。vrefTo output a voltage reference, vosFor sampling values of the output voltage, iLf_refFor outputting a reference value of current, iLfsIs a common filter inductor (L)f) Sampled value of current, vrFor modulating waves, vTri1P、vTri2P、vTri1NAnd vTri2NRespectively four triangular carriers from top to bottom in sequence. P1P、P2P、ZP、N1PAnd N2PAre each vrAnd vTri1P、vTri2P、0、vTri1NAnd vTri2NComparing the resulting signals, P1N、P2N、ZN、N1NAnd N2NAre respectively-vrAnd vTri1P、vTri2P、0、vTri1NAnd vTri2NComparing the resulting signals, IPIs iLf_refSignal generated by comparison with 0 level, INIs a reaction ofPOpposite logic signal, vgs1、vgs2、vgs3、vgs4、vgs5And vgs6Are respectively a switch tube S1~S6The drive signal of (1).
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings.
The unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter is characterized in that:
the circuit schematic diagram of the double Buck full bridge inverter is shown in the attached figure 1: from an input voltage source (V)in) A first switch tube (S)1) A second switch tube (S)2) And a third switching tube (S)3) And a fourth switching tube (S)4) A first diode (D)1) A second diode (D)2) A third diode (D)3) A fourth diode (D)4) Forward filter inductor (L)P) Reverse filter inductance (L)N) Common filter inductor (L)f) And a load (Z). Wherein the DC input voltage source (V)in) Is connected to the first switching tube (S)1) Collector electrode of (1), second switching tube (S)2) Collector electrode of (D), third diode (D)3) And a fourth diode (D)4) A cathode of (a); a first switch tube (S)1) Is connected to a forward filter inductor (L)P) And a first diode (D)1) A cathode of (a); forward filter inductance (L)P) Is connected to a third diode (D)3) Anode of (2), common filter inductance (L)f) And a third switching tube (S)3) A collector electrode of (a); common filter inductor (L)f) Is connected to one end of a load (Z); a second switch tube (S)2) Is connected to a reverse filter inductance (L)N) And a second diode (D)2) A cathode of (a); reverse filter inductance (L)N) Is connected to the fourth diode (D)4) Anode of (2), fourth switching tube (S)4) Is/are as followsThe other end of the collector and the load (Z); input voltage (V)in) Is connected to the first diode (D)1) Anode and third switching tube (S)3) Emitter electrode, fourth switching tube (S)4) And a second diode (D)2) Of (2) an anode.
Fig. 2 and fig. 3 are a block diagram of a unipolar modulation non-loop current control strategy of the double-Buck full-bridge inverter and a key waveform diagram of the double-Buck full-bridge inverter under the strategy respectively.
The control system consists of a voltage outer ring and a current inner ring. Sampling voltage vosAnd a voltage reference vrefAnd comparing to obtain a voltage error value. The voltage error value passes through a voltage outer loop regulator GVProcessing, output as common filter inductance (L)f) Current reference iLf_ref. Common filter inductor (L)f) Sampling value i of the currentLfsAnd a current reference iLf_refAnd comparing to obtain a current error value. The current error value passes through the current inner loop regulator GIProcessed and output as a modulated wave vr. Voltage regulator G hereVAnd a current regulator GIAnd may be any regulator commonly used in inverters such as a proportional-integral regulator, a proportional-integral-derivative regulator, a proportional-resonant regulator, or the like.
Common filter inductor (L)f) Current reference iLf_refWhen compared with 0, when iLf_refWhen 0, the signal I is outputPIs logic high level 1, outputs signal INLogic low level 0; when i isLf_refWhen < 0, output signal INIs logic high level 1, outputs signal IPIs a logic low level 0. The modulation mode adopts unipolar modulation. v. ofTriPIs a positive triangular wave, vTriNThe amplitude of the negative triangular wave is equal to that of the negative triangular wave.
In the common filter inductor (L)f) Current reference iLf_refWhen ═ 0, the second switch tube (S)2) And a third switching tube (S)3) Kept off, the first switching tube (S)1) And a fourth switching tube (S)4) Modulation work:
when v isr>=vTriPWhile, the first switchPipe (S)1) And a fourth switching tube (S)4) Conducting, DC input voltage source (V)in) To supply power to the load, bridge arm midpoint APAnd BPVoltage between is VinAs shown in fig. 7;
when v isTriP>vrWhen > -0, the fourth switch tube (S)4) And a first diode (D)1) Conducting, direct current input source (V)in) No energy transfer with the load, bridge arm midpoint APAnd BPThe voltage therebetween is 0 as shown in fig. 8;
when 0 > vr>=vTriNWhile, the first switch tube (S)1) And a fourth diode (D)4) Conducting, direct current input source (V)in) No energy transfer with the load, bridge arm midpoint APAnd BPThe voltage therebetween is 0 as shown in fig. 9;
when v isTriN>vrWhile, the first switch tube (S)1) Conducting and fourth switching tube (S)4) Is not conductive, the first diode (D)1) And a fourth diode (D)4) On, the load is applied to the DC input voltage source (V)in) Feedback energy, bridge arm midpoint APAnd BPVoltage between is-VinAs shown in fig. 10.
In the common filter inductor (L)f) Current reference iLf_refWhen < 0, the first switch tube (S)1) And a fourth switching tube (S)4) Kept off, the second switching tube (S)2) And a third switching tube (S)3) Modulation work:
when v isr>=vTriPWhile, the second switch tube (S)2) And a third switching tube (S)3) Is not conductive, a second diode (D)2) And a third diode (D)3) On, the load is applied to the DC input voltage source (V)in) Feedback energy, bridge arm midpoint ANAnd BNVoltage between is VinAs shown in fig. 11;
when v isTriP>vrWhen ═ 0, the second switch tube (S)2) And a third diode (D)3) Conducting, direct current input source (V)in) And negativeNo energy transfer between loads, bridge arm midpoint ANAnd BNThe voltage therebetween is 0 as shown in fig. 12;
when 0 > vr>=vTriNWhile, the third switch tube (S)3) And a second diode (D)2) Conducting, direct current input source (V)in) No energy transfer with the load, bridge arm midpoint ANAnd BNThe voltage therebetween is 0 as shown in fig. 13;
when v isTriN>vrWhile, the second switch tube (S)2) And a third switching tube (S)3) Conducting, DC input voltage source (V)in) To supply power to the load, bridge arm midpoint ANAnd BNVoltage between is-VinAs shown in fig. 14.
From the above analysis, the unipolar modulation non-circulation control strategy of the double-Buck full-bridge inverter provided by the invention can realize the fixed-frequency non-circulation operation of the double-Buck full-bridge inverter under unipolar modulation, thereby simplifying the filter design and improving the efficiency of the inverter.
The dual-input dual-Buck full-bridge inverter is shown in the attached figure 4: from a high-voltage direct-current input voltage source (V)H) Low voltage DC input voltage source (V)L) A first switch tube (S)1) A second switch tube (S)2) And a third switching tube (S)3) And a fourth switching tube (S)4) And a fifth switching tube (S)5) And a sixth switching tube (S)6) A first diode (D)1) A second diode (D)2) A third diode (D)3) A fourth diode (D)4) A fifth diode (D)5) And a sixth diode (D)6) Forward filter inductor (L)P) Reverse filter inductance (L)N) Common filter inductor (L)f) And a load (Z). Wherein the high voltage direct current input voltage source (V)H) Is connected to the first switching tube (S)1) Collector electrode of (1), sixth diode (D)6) Cathode of (D), fifth diode (D)5) And a second switching tube (S)2) A collector electrode of (a); a first switch tube (S)1) Is connected to the first diode (D)1) Cathode and third openingPipe closing (S)3) A collector electrode of (a); third switch tube (S)3) Is connected to a forward filter inductor (L)P) And a third diode (D)3) A cathode of (a); forward filter inductance (L)P) Is connected at the other end to a common filter inductance (L)f) One terminal of (D), a sixth diode (D)6) And a sixth switching tube (S)6) A collector electrode of (a); common filter inductor (L)f) Is connected to one end of a load (Z); a second switch tube (S)2) Is connected to the second diode (D)2) And a fourth switching tube (S)4) A collector electrode of (a); fourth switch tube (S)4) Is connected to a reverse filter inductance (L)N) And a fourth diode (D)4) A cathode of (a); reverse filter inductance (L)N) Is connected to the fifth diode (D)5) Anode of (2), fifth switching tube (S)5) And the other end of the load (Z); low voltage DC input voltage source (V)L) Is connected to the first diode (D)1) And a second diode (D)2) The anode of (1); high voltage direct current input voltage source (V)H) Is connected with a low-voltage DC input voltage source (V)L) Negative electrode of (D), third diode (D)3) Anode of (2), sixth switching tube (S)6) Emitter electrode of (1), fifth switching tube (S)5) And a fourth diode (D)4) Of (2) an anode.
A unipolar modulation non-loop current control strategy block diagram based on a dual-input dual-Buck full-bridge inverter and a key waveform diagram of the dual-input dual-Buck full-bridge inverter under the strategy are respectively shown in the accompanying drawings 5 and 6:
sampling voltage vosAnd a voltage reference vrefAnd comparing to obtain a voltage error value. The voltage error value passes through a voltage outer loop regulator GVProcessing, output as common filter inductance (L)f) Current reference iLf_ref. Common filter inductor (L)f) Sampling value i of the currentLfsAnd a current reference iLf_refAnd comparing to obtain a current error value. The current error value passes through the current inner loop regulator GIProcessed and output as a modulated wave vr. Voltage regulator G hereVAnd current regulationDevice GIAnd may be any regulator commonly used in inverters such as a proportional-integral regulator, a proportional-integral-derivative regulator, a proportional-resonant regulator, or the like.
Common filter inductor (L)f) Current reference iLf_refWhen compared with 0, when iLf_refWhen 0, the signal I is outputPIs logic high level 1, outputs signal INLogic low level 0; when i isLf_refWhen < 0, output signal INIs logic high level 1, outputs signal IPIs a logic low level 0. The modulation mode adopts unipolar modulation. v. ofTri1PAnd vTri2PIs a positive triangular wave, vTri1NAnd vTri2NIs a negative triangular wave, vTri1PAnd vTri1NEqual in amplitude, Δ vTri1。vTr2PAnd vTri2NEqual in amplitude, Δ vTri2。ΔvTri1And Δ vTri2Satisfies the following conditions:
the four triangular carriers are v from top to bottom in sequenceTri1P、vTri2P、vTri1NAnd vTri2N。vTri1PAnd vTri2PHas a boundary value of Δ vTri2,vTri2PAnd vTri1NHas a cut-off value of 0, vTri1NAnd vTri2NHas a cut-off value of- Δ vTri1
In the common filter inductor (L)f) Current reference iLf_refWhen ═ 0, the second switch tube (S)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Kept off, the first switching tube (S)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Modulation work:
when v isr>=vTri1PWhile, the first switch tube (S)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Conducting, high voltage direct current input voltage source (V)H) Supplying power to load alone, bridge arm midpoint APAnd BPVoltage between is VHAs shown in fig. 15;
when v isTri1P>vr>=vTri2PWhile a first diode (D)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Conducting, low voltage DC input voltage source (V)L) Single forward power supply to load, bridge arm middle point APAnd BPVoltage between is VLAs shown in fig. 16;
when v isTri2P>vrWhen > -0, the third diode (D)3) And a fifth switching tube (S)5) Conducting, high voltage direct current input voltage source (V)H) Low voltage DC input voltage source (V)L) No energy transfer between the bridge arm and the load, and the bridge arm midpoint APAnd BPThe voltage therebetween is 0 as shown in fig. 17;
when 0 > vr>=vTri1NWhile, the first switch tube (S)1) And a third switching tube (S)3) And a fifth diode (D)5) Conducting, high voltage direct current input voltage source (V)H) Low voltage DC input voltage source (V)L) No energy transfer between the bridge arm and the load, and the bridge arm midpoint APAnd BPThe voltage therebetween is 0 as shown in fig. 18;
when v isTri1N>vr>=vTri2NWhile a first diode (D)1) And a third switching tube (S)3) And a fifth diode (D)5) Conduction, load and low voltage DC input voltage source (V)L) Co-directional high-voltage direct-current input voltage source (V)H) Energy transfer, bridge arm midpoint APAnd BPVoltage between is VL-VHAs shown in FIG. 19;
when v isTri2N>vrWhile, the third diode (D)3) And a fifth diode (D)5) Conducting and loading to high voltage DC input voltage source (V) aloneH) Feedback energy, bridge arm midpoint APAnd BPVoltage between is-VHAs shown in fig. 20.
In the common filter inductor (L)f) Current reference iLf_refWhen < 0, firstSwitch tube (S)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Kept off, the second switching tube (S)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Modulation work:
when (-v)r)>=vTri1PWhile, the second switch tube (S)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Conducting, high voltage direct current input voltage source (V)H) Supplying power to load alone, bridge arm midpoint ANAnd BNVoltage between is-VHAs shown in FIG. 21;
when v isTri1P>(-vr)>=vTri2PWhile, the second diode (D)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Conducting, low voltage DC input voltage source (V)L) Supplying power to load alone, bridge arm midpoint ANAnd BNVoltage between is-VLAs shown in FIG. 22;
when v isTri2P>(-vr) When > -0, the fourth diode (D)4) And a sixth switching tube (S)6) Conducting, high voltage direct current input voltage source (V)H) Low voltage DC input voltage source (V)L) No energy transfer between the bridge arm and the load, and the bridge arm midpoint ANAnd BNThe voltage therebetween is 0 as shown in fig. 23;
when 0 > (-v)r)>=vTri1NWhile, the second switch tube (S)2) And a fourth switching tube (S)4) And a sixth diode (D)6) Conducting, high voltage direct current input voltage source (V)H) Low voltage DC input voltage source (V)L) No energy transfer between the bridge arm and the load, and the bridge arm midpoint ANAnd BNThe voltage therebetween is 0 as shown in fig. 24;
when v isTri1N>(-vr)>=vTri2NWhile, the second diode (D)2) And a fourth switching tube (S)4) And a sixth diode (D)6) Conduction, load and low voltage DC input voltage source (V)L) Co-directional high-voltage direct-current input voltage source (V)H) Energy transfer, bridge arm midpoint ANAnd BNVoltage between is VH-VLAs shown in FIG. 25;
when v isTri2N>(-vr) While, the fourth diode (D)4) And a sixth diode (D)6) Conducting and loading to high voltage DC input voltage source (V) aloneH) Feedback energy, bridge arm midpoint ANAnd BNVoltage between is VHAs shown in fig. 26.
The high voltage DC input voltage source (V)H) Must not be lower than the low voltage dc input voltage source (V)L) The voltage of (c).
From the analysis, the double-input double-Buck full-bridge inverter and the unipolar modulation non-circulation control strategy thereof can realize the fixed-frequency non-circulation operation of the double-input double-Buck full-bridge inverter under unipolar modulation, simplify the design of a filter and improve the efficiency of the inverter; the inverter can generate various levels to act on the filter circuit, can effectively reduce switching loss and harmonic components, and further improves the efficiency of the inverter and reduces the size and weight of the filter.

Claims (2)

1. A unipolar modulation non-circulation control strategy of a double-Buck full-bridge inverter is characterized in that:
the double Buck full bridge inverter is supplied with a voltage source V by a direct current inputinA first switch tube (S)1) A second switch tube (S)2) And a third switching tube (S)3) And a fourth switching tube (S)4) A first diode (D)1) A second diode (D)2) A third diode (D)3) A fourth diode (D)4) Forward filter inductor (L)P) Reverse filter inductance (L)N) Common filter inductor (L)f) And a load (Z); wherein the DC input voltage source (V)in) Is connected to the first switching tube (S)1) Collector electrode of (1), second switching tube (S)2) Collector electrode of (D), third diode (D)3) And a fourth diode (D)4) A cathode of (a); a first switch tube (S)1) Is connected to a forward filter inductor (L)P) And a first diode (D)1) A cathode of (a); forward filter inductance (L)P) Is connected to a third diode (D)3) Anode of (2), common filter inductance (L)f) And a third switching tube (S)3) A collector electrode of (a); common filter inductor (L)f) Is connected to one end of a load (Z); a second switch tube (S)2) Is connected to a reverse filter inductance (L)N) And a second diode (D)2) A cathode of (a); reverse filter inductance (L)N) Is connected to the fourth diode (D)4) Anode of (2), fourth switching tube (S)4) And the other end of the load (Z); DC input voltage source (V)in) Is connected to the first diode (D)1) Anode and third switching tube (S)3) Emitter electrode, fourth switching tube (S)4) And a second diode (D)2) The anode of (1);
the control system consists of a voltage outer ring and a current inner ring; sampling value v of output voltageosAnd a voltage reference vrefComparing to obtain a voltage error value; the voltage error value passes through a voltage outer loop regulator GVProcessing, output as common filter inductance (L)f) Current reference iLf_ref(ii) a Common filter inductor (L)f) Sampling value i of the currentLfsAnd a current reference iLf_refComparing to obtain a current error value; the current error value passes through the current inner loop regulator GIProcessed and output as a modulated wave vr(ii) a Voltage regulator G hereVAnd a current regulator GIIs a proportional-integral regulator, or a proportional-integral-derivative regulator, or a proportional-resonant regulator;
common filter inductor (L)f) Current reference iLf_refWhen compared with 0, when iLf_refWhen 0, the signal I is outputPIs logic high level 1, outputs signal INLogic low level 0; when i isLf_refWhen < 0, output signal INIs logic high level 1, outputs signal IPLogic low level 0; the modulation mode adopts unipolar modulation; v. ofTriPIs a positive triangular wave, vTriNThe amplitude of the negative triangular wave is equal to that of the negative triangular wave;
in public filterWave inductor (L)f) Current reference iLf_refWhen ═ 0, the second switch tube (S)2) And a third switching tube (S)3) Kept off, the first switching tube (S)1) And a fourth switching tube (S)4) Modulation work:
when v isr>=vTriPWhile, the first switch tube (S)1) And a fourth switching tube (S)4) Conducting, bridge arm midpoint APAnd BPVoltage between is Vin
When v isTriP>vrWhen > -0, the fourth switch tube (S)4) And a first diode (D)1) Conducting, bridge arm midpoint APAnd BPThe voltage between is 0;
when 0 > vr>=vTriNWhile, the first switch tube (S)1) And a fourth diode (D)4) Conducting, bridge arm midpoint APAnd BPThe voltage between is 0;
when v isTriN>vrWhile, the first switch tube (S)1) And a fourth switching tube (S)4) Is not conductive, the first diode (D)1) And a fourth diode (D)4) Conducting, bridge arm midpoint APAnd BPVoltage between is-Vin
In the common filter inductor (L)f) Current reference iLf_refWhen < 0, the first switch tube (S)1) And a fourth switching tube (S)4) Kept off, the second switching tube (S)2) And a third switching tube (S)3) Modulation work:
when v isr>=vTriPWhile, the second switch tube (S)2) And a third switching tube (S)3) Is not conductive, a second diode (D)2) And a third diode (D)3) Conducting, bridge arm midpoint ANAnd BNVoltage between is Vin
When v isTriP>vrWhen ═ 0, the second switch tube (S)2) And a third diode (D)3) Conducting, bridge arm midpoint ANAnd BNThe voltage between is 0;
when 0 > vr>=vTriNWhile, the third switch tube (S)3) And a second diode (D)2) Conducting, bridge arm midpoint ANAnd BNThe voltage between is 0;
when v isTriN>vrWhile, the second switch tube (S)2) And a third switching tube (S)3) Conducting, bridge arm midpoint ANAnd BNVoltage between is-Vin
2. A unipolar modulation non-circulation control strategy of a double-input double-Buck full-bridge inverter is characterized in that:
the double-input double-Buck full-bridge inverter is composed of a high-voltage direct-current input voltage source VHLow voltage DC input voltage source VLA first switch tube (S)1) A second switch tube (S)2) And a third switching tube (S)3) And a fourth switching tube (S)4) And a fifth switching tube (S)5) And a sixth switching tube (S)6) A first diode (D)1) A second diode (D)2) A third diode (D)3) A fourth diode (D)4) A fifth diode (D)5) And a sixth diode (D)6) Forward filter inductor (L)P) Reverse filter inductance (L)N) Common filter inductor (L)f) And a load (Z); wherein the high voltage direct current input voltage source (V)H) Is connected to the first switching tube (S)1) Collector electrode of (1), sixth diode (D)6) Cathode of (D), fifth diode (D)5) And a second switching tube (S)2) A collector electrode of (a); a first switch tube (S)1) Is connected to the first diode (D)1) And a third switching tube (S)3) A collector electrode of (a); third switch tube (S)3) Is connected to a forward filter inductor (L)P) And a third diode (D)3) A cathode of (a); forward filter inductance (L)P) Is connected at the other end to a common filter inductance (L)f) One terminal of (D), a sixth diode (D)6) And a sixth switching tube (S)6) A collector electrode of (a); common filter inductor (L)f) Is connected to one end of a load (Z); a second switch tube (S)2) Is/are as followsThe emitter is connected with the second diode (D)2) And a fourth switching tube (S)4) A collector electrode of (a); fourth switch tube (S)4) Is connected to a reverse filter inductance (L)N) And a fourth diode (D)4) A cathode of (a); reverse filter inductance (L)N) Is connected to the fifth diode (D)5) Anode of (2), fifth switching tube (S)5) And the other end of the load (Z); low voltage DC input voltage source (V)L) Is connected to the first diode (D)1) And a second diode (D)2) The anode of (1); high voltage direct current input voltage source (V)H) Is connected with a low-voltage DC input voltage source (V)L) Negative electrode of (D), third diode (D)3) Anode of (2), sixth switching tube (S)6) Emitter electrode of (1), fifth switching tube (S)5) And a fourth diode (D)4) The anode of (1);
sampling value v of output voltageosAnd a voltage reference vrefComparing to obtain a voltage error value; the voltage error value passes through a voltage outer loop regulator GVProcessing, output as common filter inductance (L)f) Current reference iLf_ref(ii) a Common filter inductor (L)f) Sampling value i of the currentLfsAnd a current reference iLf_refComparing to obtain a current error value; the current error value passes through the current inner loop regulator GIProcessed and output as a modulated wave vr(ii) a Voltage regulator G hereVAnd a current regulator GIIs a proportional-integral regulator, or a proportional-integral-derivative regulator, or a proportional-resonant regulator;
common filter inductor (L)f) Current reference iLf_refWhen compared with 0, when iLf_refWhen 0, the signal I is outputPIs logic high level 1, outputs signal INLogic low level 0; when i isLf_refWhen < 0, output signal INIs logic high level 1, outputs signal IPLogic low level 0; the modulation mode adopts unipolar modulation; v. ofTri1PAnd vTri2PIs a positive triangular wave, vTri1NAnd vTri2NIs a negative triangular wave, vTri1PAnd vTri1NEqual in amplitudeIs Δ vTri1;vTri2PAnd vTri2NEqual in amplitude, Δ vTri2;ΔvTri1And Δ vTri2Satisfies the following conditions:
the four triangular carriers are v from top to bottom in sequenceTri1P、vTri2P、vTri1NAnd vTri2N;vTri1PAnd vTri2PHas a boundary value of Δ vTri2,vTri2PAnd vTri1NHas a cut-off value of 0, vTri1NAnd vTri2NHas a cut-off value of- Δ vTri1
In the common filter inductor (L)f) Current reference iLf_refWhen ═ 0, the second switch tube (S)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Kept off, the first switching tube (S)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Modulation work:
when v isr>=vTri1PWhile, the first switch tube (S)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Conducting, bridge arm midpoint APAnd BPVoltage between is VH
When v isTri1P>vr>=vTri2PWhile a first diode (D)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Conducting, bridge arm midpoint APAnd BPVoltage between is VL
When v isTri2P>vrWhen > -0, the third diode (D)3) And a fifth switching tube (S)5) Conducting, bridge arm midpoint APAnd BPThe voltage between is 0;
when 0 > vr>=vTri1NWhile, the first switch tube (S)1) And a third switching tube (S)3) And a fifth diode (D)5) Conducting, bridge arm midpoint APAnd BPElectricity betweenThe pressure is 0;
when v isTri1N>vr>=vTri2NWhile a first diode (D)1) And a third switching tube (S)3) And a fifth diode (D)5) Conducting, bridge arm midpoint APAnd BPVoltage between is VL-VH
When v isTri2N>vrWhile, the third diode (D)3) And a fifth diode (D)5) Conducting, bridge arm midpoint APAnd BPVoltage between is-VH
In the common filter inductor (L)f) Current reference iLf_refWhen < 0, the first switch tube (S)1) And a third switching tube (S)3) And a fifth switching tube (S)5) Kept off, the second switching tube (S)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Modulation work:
when (-v)r)>=vTri1PWhile, the second switch tube (S)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Conducting, bridge arm midpoint ANAnd BNVoltage between is-VH
When v isTri1P>(-vr)>=vTri2PWhile, the second diode (D)2) And a fourth switching tube (S)4) And a sixth switching tube (S)6) Conducting, bridge arm midpoint ANAnd BNVoltage between is-VL
When v isTri2P>(-vr) When > -0, the fourth diode (D)4) And a sixth switching tube (S)6) Conducting, bridge arm midpoint ANAnd BNThe voltage between is 0;
when 0 > (-v)r)>=vTri1NWhile, the second switch tube (S)2) And a fourth switching tube (S)4) And a sixth diode (D)6) Conducting, bridge arm midpoint ANAnd BNThe voltage between is 0;
when v isTri1N>(-vr)>=vTri2NWhile, the second diode (D)2) And a fourth switching tube (S)4) And a sixth diode (D)6) Conducting, bridge arm midpoint ANAnd BNVoltage between is VH-VL
When v isTri2N>(-vr) While, the fourth diode (D)4) And a sixth diode (D)6) Conducting, bridge arm midpoint ANAnd BNVoltage between is VH
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