CN110045206B - Redundancy check method and system for protecting non-redundant AD acquisition of measurement and control device - Google Patents
Redundancy check method and system for protecting non-redundant AD acquisition of measurement and control device Download PDFInfo
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Abstract
The invention relates to a redundancy check method and a redundancy check system for protecting, measuring and controlling non-redundant AD acquisition of a device, which belong to the technical field of relay protection of a power system, and detect an analog quantity acquisition loop by comparing and verifying analog quantity acquired by the protection, measuring and controlling device and analog quantity data of related channels after synthesis; the method is characterized in that: at least comprises the following steps: the method comprises the following steps: grouping analog quantity; step two: calculating an actual effective value; step three: calculating a synthesized sampling value; step four: calculating the deviation of the sampling value; step five: calculating a synthetic effective value; step six: calculating the deviation of effective values; step seven: and (5) judging the analog quantity abnormity. The invention is applied to a protection measurement and control device without double AD redundancy configuration, and aims to realize the detection of an analog quantity acquisition loop so as to improve the reliability of relay protection operation; by adopting the technical scheme, the analog quantity acquisition loop of the protection measurement and control device can be detected in real time, and the reliability of relay protection operation is improved.
Description
Technical Field
The invention belongs to the technical field of power system relay protection, and particularly relates to a redundancy check method and a redundancy check system for protecting non-redundant AD acquisition of a measurement and control device.
Background
As is known, a transformer substation is a hub node for operation of a power system, and has high requirements on safety and reliability of the transformer substation, and a protection measurement and control device is used as an important component of secondary equipment of the transformer substation, is a basis for safe and stable operation of primary equipment of a power grid and the transformer substation, and has high requirements on safety and reliability of the primary equipment of the transformer substation. The analog quantity acquisition loop is one of key components of hardware of the protection measurement and control device, and any abnormal problem of the analog quantity loop directly affects the protection measurement and control device to correctly acquire data of a power grid, so that the reliability of the protection measurement and control device is affected. AD (Analog-to-Digital, which is an abbreviation of Analog-to-Digital) is a core device of the Analog-to-Digital converter, and for a protection measurement and control device adopting double AD redundancy configuration, two sets of AD can be mutually verified, so that the reliability of Analog sampling is ensured to a certain extent, but the cost is higher; for a protection measurement and control device without dual AD redundancy configuration, detection for an analog quantity acquisition loop is not always performed, so that the protection measurement and control device is more easily influenced by the abnormal problem of the analog quantity acquisition loop. The power system is a three-phase system, the electrical quantity of each phase is not an isolated quantity, and the three-phase electrical quantities have correlation, so that the correlation can be used for verifying the analog quantity acquisition signal. The three-phase voltage and zero-sequence voltage of each bus, the three-phase current and zero-sequence current of each line and the like are often collected as basic analog quantities, and based on the basic analog quantities, designing and developing a redundancy check method and a redundancy check system for protecting non-redundant AD collection of a measurement and control device are particularly important.
Disclosure of Invention
The invention provides a redundancy check method and a system for protecting the non-redundant AD acquisition of a measurement and control device for solving the technical problems in the prior art; the device is applied to a protection measurement and control device without double AD redundancy configuration, and aims to realize the detection of an analog quantity acquisition loop so as to improve the reliability of relay protection operation.
The invention aims to provide a redundancy check method for protecting the non-redundant AD acquisition of a measurement and control device, which carries out the detection of an analog quantity acquisition loop by comparing and verifying the analog quantity acquired by the protection and control device and the analog quantity data of a relevant channel after synthesis; at least comprises the following steps:
the method comprises the following steps: grouping analog quantity; selecting three-phase current and zero-sequence current of the same line as one group, selecting three-phase voltage and zero-sequence voltage of the same bus as one group, wherein 4 paths of analog quantity in each group can be mutually detected;
step two: calculating an actual effective value; respectively calculating real and imaginary parts and actual effective values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the A phase, the B phase, the C phase and the zero sequence original sampling values in each group of analog quantity;
step three: calculating a synthesized sampling value; respectively calculating the synthetic sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the A phase, the B phase, the C phase and the zero sequence original sampling values in each group of analog quantity;
step four: calculating the deviation of the sampling value; respectively calculating the deviation of the sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the original sampling values and the synthesized sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity; the sampling value deviation is equal to the absolute value of the difference between the corresponding analog original sampling value and the synthesized sampling value;
step five: calculating a synthetic effective value; respectively calculating the synthetic effective values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the real and imaginary parts or the synthetic sampling values of the A phase, the B phase, the C phase and the zero sequence in each group of analog quantity;
step six: calculating the deviation of effective values; respectively calculating the effective value deviations of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the actual effective value and the synthesized effective value of the A phase, the B phase, the C phase and the zero sequence in each group of analog quantity; the effective value deviation is equal to the absolute value of the difference between the actual effective value and the synthesized effective value of the corresponding analog quantity;
step seven: judging the analog quantity abnormity; setting a sampling value deviation threshold value and a sampling value zero-point clamping threshold value, setting an effective value deviation threshold value and an effective value zero-point clamping threshold value, and carrying out anomaly detection on all analog quantities in all groups; and when the analog quantity is judged to be abnormal through the sampling value deviation or the analog quantity is judged to be abnormal through the effective value deviation, judging that the analog quantity is abnormal.
Further: in the fifth step: when the real-imaginary part and the synthesized sampling value are adopted to calculate the synthesized effective value, the calculation and judgment of the step six and the step seven are needed respectively, and finally the analog quantity abnormity is judged through the sampling value deviation, or the analog quantity abnormity is judged through the effective value deviation.
Further: in the seventh step:
when the product of the actual sampling value of the analog quantity and the synthesized sampling value is not more than zero, if the deviation of the corresponding sampling value is more than the zero-point clamping threshold value of the sampling value, the analog quantity is abnormal, otherwise, the analog quantity is normal;
when the product of the analog quantity actual sampling value and the composite sampling value is larger than zero, if the deviation of the corresponding sampling value is larger than the absolute value of the product of the sampling value deviation threshold value and the actual sampling value, the analog quantity is abnormal, otherwise, the analog quantity is normal.
Further: in the seventh step:
when the actual effective value of the analog quantity is zero, if the deviation of the corresponding effective value is greater than the zero-point clamping threshold value of the effective value, the analog quantity is abnormal, otherwise, the analog quantity is normal;
when the actual effective value of the analog quantity is greater than zero, if the deviation of the corresponding effective value is greater than the product of the effective value deviation threshold and the actual effective value, the analog quantity is abnormal, otherwise, the analog quantity is normal.
The invention also provides a redundancy check system for protecting the non-redundant AD acquisition of the measurement and control device, which carries out the detection of an analog quantity acquisition loop by comparing and verifying the analog quantity acquired by the protection and control device and the analog quantity data of a relevant channel after synthesis; the method is characterized in that: at least comprises the following steps:
an analog grouping module; selecting three-phase current and zero-sequence current of the same line as one group, selecting three-phase voltage and zero-sequence voltage of the same bus as one group, wherein 4 paths of analog quantity in each group can be mutually detected;
an actual effective value calculation module: respectively calculating real and imaginary parts and actual effective values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the A phase, the B phase, the C phase and the zero sequence original sampling values in each group of analog quantity;
and a synthesized sampling value calculation module: respectively calculating the synthetic sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the A phase, the B phase, the C phase and the zero sequence original sampling values in each group of analog quantity;
a sampling value deviation calculation module: respectively calculating the deviation of the sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the original sampling values and the synthesized sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity; the sampling value deviation is equal to the absolute value of the difference between the corresponding analog original sampling value and the synthesized sampling value;
a synthetic effective value calculation module: respectively calculating the synthetic effective values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the real and imaginary parts or the synthetic sampling values of the A phase, the B phase, the C phase and the zero sequence in each group of analog quantity;
an effective value deviation calculation module: respectively calculating the effective value deviations of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the actual effective value and the synthesized effective value of the A phase, the B phase, the C phase and the zero sequence in each group of analog quantity; the effective value deviation is equal to the absolute value of the difference between the actual effective value and the synthesized effective value of the corresponding analog quantity;
an analog quantity abnormity judgment module: setting a sampling value deviation threshold value and a sampling value zero-point clamping threshold value, setting an effective value deviation threshold value and an effective value zero-point clamping threshold value, and carrying out anomaly detection on all analog quantities in all groups; and when the analog quantity is judged to be abnormal through the sampling value deviation or the analog quantity is judged to be abnormal through the effective value deviation, judging that the analog quantity is abnormal.
Further: aiming at the analog quantity abnormity judging module:
when the product of the actual sampling value of the analog quantity and the synthesized sampling value is not more than zero, if the deviation of the corresponding sampling value is more than the zero-point clamping threshold value of the sampling value, the analog quantity is abnormal, otherwise, the analog quantity is normal;
when the product of the analog quantity actual sampling value and the composite sampling value is larger than zero, if the deviation of the corresponding sampling value is larger than the absolute value of the product of the sampling value deviation threshold value and the actual sampling value, the analog quantity is abnormal, otherwise, the analog quantity is normal.
Further: aiming at the analog quantity abnormity judging module:
when the actual effective value of the analog quantity is zero, if the deviation of the corresponding effective value is greater than the zero-point clamping threshold value of the effective value, the analog quantity is abnormal, otherwise, the analog quantity is normal;
when the actual effective value of the analog quantity is greater than zero, if the deviation of the corresponding effective value is greater than the product of the effective value deviation threshold and the actual effective value, the analog quantity is abnormal, otherwise, the analog quantity is normal.
The third purpose of the present invention is to provide a computer program for implementing the above redundancy check method for protecting the non-redundant AD acquisition of the measurement and control device.
The fourth purpose of the present invention is to provide an information data processing terminal for implementing the redundancy check method for protecting the non-redundant AD acquisition of the measurement and control device.
A fifth object of the present invention is to provide a computer-readable storage medium, which includes instructions that, when executed on a computer, cause the computer to execute the redundancy check method for protecting non-redundant AD acquisition of a measurement and control device as described above.
The invention has the advantages and positive effects that:
by adopting the technical scheme, the analog quantity acquisition loop of the protection measurement and control device can be detected in real time, and the reliability of relay protection operation is improved. Due to the fact that double AD redundancy configuration is not needed in the technical scheme, hardware can be saved, and the failure rate of the hardware is reduced.
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FIG. 1 is a flow chart in a preferred embodiment of the present invention;
Detailed Description
In order to further understand the contents, features and effects of the present invention, the following embodiments are illustrated and described in detail with reference to the accompanying drawings:
in order to improve the safety of the control system, the invention is realized by adopting the following technical means:
referring to fig. 1, a redundancy check method for non-redundant AD acquisition of a protection measurement and control device performs detection of an analog acquisition loop by comparing and verifying analog data acquired by the protection measurement and control device and analog data of a related channel after synthesis, and includes the following steps:
step 1: and (5) grouping the analog quantity. Taking single-bus sectional wiring of two inlet wires as an example, selecting A phase voltage, B phase voltage, C phase voltage and zero sequence voltage of a I # bus as a group, selecting A phase current, B phase current, C phase current and zero sequence current of the I # bus as a group, and repeating the steps in the same way, selecting A phase voltage, B phase voltage, C phase voltage and zero sequence voltage of a II # bus as a group, and selecting A phase current, B phase current, C phase current and zero sequence current of a II # bus as a group. The following description is given by taking an I # incoming line as an example, and the description is given by: the method comprises the steps that an I # incoming line A-phase current original sampling value Sa, a B-phase current original sampling value Sb, a C-phase current original sampling value Sc and a zero-sequence current original sampling value So are obtained;
step 2: and calculating an actual effective value. And respectively calculating real and imaginary parts and actual effective values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the original sampling values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current by adopting a Fourier algorithm, and sequentially marking the real and imaginary parts and the actual effective values as Ra, Xa, Ia, Rb, Xb, Ib, Rc, Xc, Ic, Ro, Xo and Io. Representing the square-on operation with the operator sqrt (), then:
Ia＝sqrt(Ra×Ra+Xa×Xa)；
Ib＝sqrt(Rb×Rb+Xb×Xb)；
Ic＝sqrt(Rc×Rc+Xc×Xc)；
Io＝sqrt(Ro×Ro+Xo×Xo)；
and step 3: calculating a synthesized sampling value; and respectively calculating the synthetic sampling values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current according to the original sampling values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current, and sequentially marking as SA, SB, SC and SO. Wherein, SA-So-Sb-Sc, SB-So-Sa-Sc, SC-So-Sa-Sb, SO-Sa + Sb + Sc;
and 4, step 4: calculating the deviation of the sampling value; and respectively calculating the sampling value deviations of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the original sampling values and the synthesized sampling values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current, and sequentially recording the sampling value deviations as dSa, dSb, dSc and dSo. Wherein dSa ═ Sa-Sa |, dSb ═ Sb-Sb |, dSc ═ Sc-Sc |, dSo ═ So-So |;
and 5: and calculating a synthesis effective value. And respectively calculating the synthetic effective values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current according to the real and imaginary parts of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current, and sequentially marking as IA, IB, IC and IO. Wherein:
IA＝sqrt((Ro-Rb-Rc)×(Ro-Rb-Rc)+(Xo-Xb-Xc)×(Xo-Xb-Xc))；
IB＝sqrt((Ro-Ra-Rc)×(Ro-Ra-Rc)+(Xo-Xa-Xc)×(Xo-Xa-Xc))；
IC＝sqrt((Ro-Ra-Rb)×(Ro-Ra-Rb)+(Xo-Xa-Xb)×(Xo-Xa-Xb))；
IO＝sqrt((Ra+Rb+Rc)×(Ra+Rb+Rc)+(Xa+Xb+Xc)×(Xa+Xb+Xc))；
step 6: and calculating the deviation of the effective value. And respectively calculating effective value deviations of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the actual effective value and the synthesized effective value of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current, and sequentially marking as dIa, dIb, dIc and dIo. Wherein dIa ═ Ia-Ia |, dIb ═ Ib-Ib |, dIc ═ Ic-Ic |, dIo ═ Io-Io |;
and 7: and (5) judging the analog quantity abnormity. The sampling value deviation threshold value is set to be dthr3, the sampling value zero point clamping threshold value is set to be dthr2, the effective value deviation threshold value is set to be dthr1, and the effective value zero point clamping threshold value is set to be dthr 0.
The a-phase current is abnormal when Sa × Sa >0 and dSa > dthr3 × | Sa |, or when Sa × Sa ≦ 0 and dSa > dthr2, or when Ia >0 and dIa > dthr1 × Ia, or when Ia ═ 0 and dIa > dthr 0; otherwise, the phase A current is normal;
when Sb × Sb >0 and dSb > dthr3 × | Sb |, or when Sb × Sb ≦ 0 and dSb > dthr2, or when Ib >0 and dIb > dthr1 × Ib, or when Ib is 0 and dIb > dthr0, the B-phase current is abnormal; otherwise, the phase B current is normal;
c-phase current is abnormal when Sc × Sc >0 and dSc > dthr3 × | Sc |, or when Sc × Sc ≦ 0 and dSc > dthr2, or when Ic >0 and dIc > dthr1 × Ic, or when Ic ═ 0 and dIc > dthr 0; otherwise, the C phase current is normal;
zero-sequence current is abnormal when So × So >0 and dSo > dthr3 × | So |, or when So × So ≦ 0 and dSo > dthr2, or when Io >0 and dIo > dthr1 × Io, or when Io ═ 0 and dIo > dthr 0; otherwise, the zero sequence current is normal.
In a preferred embodiment, a redundant check system for protecting a non-redundant AD acquisition of a measurement and control device performs detection on an analog acquisition loop by comparing and verifying an analog acquired by the protection and control device and analog data of a related channel after synthesis, and includes:
and an analog quantity grouping module. Taking single-bus sectional wiring of two inlet wires as an example, selecting A phase voltage, B phase voltage, C phase voltage and zero sequence voltage of a I # bus as a group, selecting A phase current, B phase current, C phase current and zero sequence current of the I # bus as a group, and repeating the steps in the same way, selecting A phase voltage, B phase voltage, C phase voltage and zero sequence voltage of a II # bus as a group, and selecting A phase current, B phase current, C phase current and zero sequence current of a II # bus as a group. The following description is given by taking an I # incoming line as an example, and the description is given by: the method comprises the steps that an I # incoming line A-phase current original sampling value Sa, a B-phase current original sampling value Sb, a C-phase current original sampling value Sc and a zero-sequence current original sampling value So are obtained;
and an actual effective value calculation module. And respectively calculating real and imaginary parts and actual effective values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the original sampling values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current by adopting a Fourier algorithm, and sequentially marking the real and imaginary parts and the actual effective values as Ra, Xa, Ia, Rb, Xb, Ib, Rc, Xc, Ic, Ro, Xo and Io. Representing the square-on operation with the operator sqrt (), then:
Ia＝sqrt(Ra×Ra+Xa×Xa)；
Ib＝sqrt(Rb×Rb+Xb×Xb)；
Ic＝sqrt(Rc×Rc+Xc×Xc)；
Io＝sqrt(Ro×Ro+Xo×Xo)；
a composite sampling value calculation module; and respectively calculating the synthetic sampling values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current according to the original sampling values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current, and sequentially marking as SA, SB, SC and SO. Wherein, SA-So-Sb-Sc, SB-So-Sa-Sc, SC-So-Sa-Sb, SO-Sa + Sb + Sc;
a sampling value deviation calculation module; and respectively calculating the sampling value deviations of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the original sampling values and the synthesized sampling values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current, and sequentially recording the sampling value deviations as dSa, dSb, dSc and dSo. Wherein dSa ═ Sa-Sa |, dSb ═ Sb-Sb |, dSc ═ Sc-Sc |, dSo ═ So-So |;
and a composite effective value calculation module. And respectively calculating the synthetic effective values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current according to the real and imaginary parts of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current, and sequentially marking as IA, IB, IC and IO. Wherein,
IA＝sqrt((Ro-Rb-Rc)×(Ro-Rb-Rc)+(Xo-Xb-Xc)×(Xo-Xb-Xc))；
IB＝sqrt((Ro-Ra-Rc)×(Ro-Ra-Rc)+(Xo-Xa-Xc)×(Xo-Xa-Xc))；
IC＝sqrt((Ro-Ra-Rb)×(Ro-Ra-Rb)+(Xo-Xa-Xb)×(Xo-Xa-Xb))；
IO＝sqrt((Ra+Rb+Rc)×(Ra+Rb+Rc)+(Xa+Xb+Xc)×(Xa+Xb+Xc))；
and an effective value deviation calculation module. And respectively calculating effective value deviations of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the actual effective value and the synthesized effective value of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current, and sequentially marking as dIa, dIb, dIc and dIo. Wherein dIa ═ Ia-Ia |, dIb ═ Ib-Ib |, dIc ═ Ic-Ic |, dIo ═ Io-Io |;
and an analog quantity abnormity judgment module. The sampling value deviation threshold value is set to be dthr3, the sampling value zero point clamping threshold value is set to be dthr2, the effective value deviation threshold value is set to be dthr1, and the effective value zero point clamping threshold value is set to be dthr 0.
The a-phase current is abnormal when Sa × Sa >0 and dSa > dthr3 × | Sa |, or when Sa × Sa ≦ 0 and dSa > dthr2, or when Ia >0 and dIa > dthr1 × Ia, or when Ia ═ 0 and dIa > dthr 0; otherwise, the phase A current is normal;
when Sb × Sb >0 and dSb > dthr3 × | Sb |, or when Sb × Sb ≦ 0 and dSb > dthr2, or when Ib >0 and dIb > dthr1 × Ib, or when Ib is 0 and dIb > dthr0, the B-phase current is abnormal; otherwise, the phase B current is normal;
c-phase current is abnormal when Sc × Sc >0 and dSc > dthr3 × | Sc |, or when Sc × Sc ≦ 0 and dSc > dthr2, or when Ic >0 and dIc > dthr1 × Ic, or when Ic ═ 0 and dIc > dthr 0; otherwise, the C phase current is normal;
zero-sequence current is abnormal when So × So >0 and dSo > dthr3 × | So |, or when So × So ≦ 0 and dSo > dthr2, or when Io >0 and dIo > dthr1 × Io, or when Io ═ 0 and dIo > dthr 0; otherwise, the zero sequence current is normal.
In a third preferred embodiment, a computer program for implementing a redundancy check method for protecting a non-redundant AD acquisition of a measurement and control device includes the following steps:
step 1: and (5) grouping the analog quantity. Taking single-bus sectional wiring of two inlet wires as an example, selecting A phase voltage, B phase voltage, C phase voltage and zero sequence voltage of a I # bus as a group, selecting A phase current, B phase current, C phase current and zero sequence current of the I # bus as a group, and repeating the steps in the same way, selecting A phase voltage, B phase voltage, C phase voltage and zero sequence voltage of a II # bus as a group, and selecting A phase current, B phase current, C phase current and zero sequence current of a II # bus as a group. The following description is given by taking an I # incoming line as an example, and the description is given by: the method comprises the steps that an I # incoming line A-phase current original sampling value Sa, a B-phase current original sampling value Sb, a C-phase current original sampling value Sc and a zero-sequence current original sampling value So are obtained;
step 2: and calculating an actual effective value. And respectively calculating real and imaginary parts and actual effective values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the original sampling values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current by adopting a Fourier algorithm, and sequentially marking the real and imaginary parts and the actual effective values as Ra, Xa, Ia, Rb, Xb, Ib, Rc, Xc, Ic, Ro, Xo and Io. Representing the square-on operation with the operator sqrt (), then:
Ia＝sqrt(Ra×Ra+Xa×Xa)；
Ib＝sqrt(Rb×Rb+Xb×Xb)；
Ic＝sqrt(Rc×Rc+Xc×Xc)；
Io＝sqrt(Ro×Ro+Xo×Xo)；
and step 3: calculating a synthesized sampling value; and respectively calculating the synthetic sampling values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current according to the original sampling values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current, and sequentially marking as SA, SB, SC and SO. Wherein, SA-So-Sb-Sc, SB-So-Sa-Sc, SC-So-Sa-Sb, SO-Sa + Sb + Sc;
and 4, step 4: calculating the deviation of the sampling value; and respectively calculating the sampling value deviations of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the original sampling values and the synthesized sampling values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current, and sequentially recording the sampling value deviations as dSa, dSb, dSc and dSo. Wherein dSa ═ Sa-Sa |, dSb ═ Sb-Sb |, dSc ═ Sc-Sc |, dSo ═ So-So |;
and 5: and calculating a synthesis effective value. And respectively calculating the synthetic effective values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current according to the real and imaginary parts of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current, and sequentially marking as IA, IB, IC and IO. Wherein,
IA＝sqrt((Ro-Rb-Rc)×(Ro-Rb-Rc)+(Xo-Xb-Xc)×(Xo-Xb-Xc))；
IB＝sqrt((Ro-Ra-Rc)×(Ro-Ra-Rc)+(Xo-Xa-Xc)×(Xo-Xa-Xc))；
IC＝sqrt((Ro-Ra-Rb)×(Ro-Ra-Rb)+(Xo-Xa-Xb)×(Xo-Xa-Xb))；
IO＝sqrt((Ra+Rb+Rc)×(Ra+Rb+Rc)+(Xa+Xb+Xc)×(Xa+Xb+Xc))；
step 6: and calculating the deviation of the effective value. And respectively calculating effective value deviations of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the actual effective value and the synthesized effective value of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current, and sequentially marking as dIa, dIb, dIc and dIo. Wherein dIa ═ Ia-Ia |, dIb ═ Ib-Ib |, dIc ═ Ic-Ic |, dIo ═ Io-Io |;
and 7: and (5) judging the analog quantity abnormity. The sampling value deviation threshold value is set to be dthr3, the sampling value zero point clamping threshold value is set to be dthr2, the effective value deviation threshold value is set to be dthr1, and the effective value zero point clamping threshold value is set to be dthr 0.
The a-phase current is abnormal when Sa × Sa >0 and dSa > dthr3 × | Sa |, or when Sa × Sa ≦ 0 and dSa > dthr2, or when Ia >0 and dIa > dthr1 × Ia, or when Ia ═ 0 and dIa > dthr 0; otherwise, the phase A current is normal;
when Sb × Sb >0 and dSb > dthr3 × | Sb |, or when Sb × Sb ≦ 0 and dSb > dthr2, or when Ib >0 and dIb > dthr1 × Ib, or when Ib is 0 and dIb > dthr0, the B-phase current is abnormal; otherwise, the phase B current is normal;
c-phase current is abnormal when Sc × Sc >0 and dSc > dthr3 × | Sc |, or when Sc × Sc ≦ 0 and dSc > dthr2, or when Ic >0 and dIc > dthr1 × Ic, or when Ic ═ 0 and dIc > dthr 0; otherwise, the C phase current is normal;
zero-sequence current is abnormal when So × So >0 and dSo > dthr3 × | So |, or when So × So ≦ 0 and dSo > dthr2, or when Io >0 and dIo > dthr1 × Io, or when Io ═ 0 and dIo > dthr 0; otherwise, the zero sequence current is normal.
The fourth preferred embodiment is an information data processing terminal for implementing a redundancy check method for protecting non-redundant AD acquisition of a measurement and control device. The redundancy check method for protecting the non-redundant AD acquisition of the measurement and control device comprises the following steps:
step 1: and (5) grouping the analog quantity. Taking single-bus sectional wiring of two inlet wires as an example, selecting A phase voltage, B phase voltage, C phase voltage and zero sequence voltage of a I # bus as a group, selecting A phase current, B phase current, C phase current and zero sequence current of the I # bus as a group, and repeating the steps in the same way, selecting A phase voltage, B phase voltage, C phase voltage and zero sequence voltage of a II # bus as a group, and selecting A phase current, B phase current, C phase current and zero sequence current of a II # bus as a group. The following description is given by taking an I # incoming line as an example, and the description is given by: the method comprises the steps that an I # incoming line A-phase current original sampling value Sa, a B-phase current original sampling value Sb, a C-phase current original sampling value Sc and a zero-sequence current original sampling value So are obtained;
step 2: and calculating an actual effective value. And respectively calculating real and imaginary parts and actual effective values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the original sampling values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current by adopting a Fourier algorithm, and sequentially marking the real and imaginary parts and the actual effective values as Ra, Xa, Ia, Rb, Xb, Ib, Rc, Xc, Ic, Ro, Xo and Io. Representing the square-on operation with the operator sqrt (), then:
Ia＝sqrt(Ra×Ra+Xa×Xa)；
Ib＝sqrt(Rb×Rb+Xb×Xb)；
Ic＝sqrt(Rc×Rc+Xc×Xc)；
Io＝sqrt(Ro×Ro+Xo×Xo)；
and step 3: calculating a synthesized sampling value; and respectively calculating the synthetic sampling values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current according to the original sampling values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current, and sequentially marking as SA, SB, SC and SO. Wherein, SA-So-Sb-Sc, SB-So-Sa-Sc, SC-So-Sa-Sb, SO-Sa + Sb + Sc;
and 4, step 4: calculating the deviation of the sampling value; and respectively calculating the sampling value deviations of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the original sampling values and the synthesized sampling values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current, and sequentially recording the sampling value deviations as dSa, dSb, dSc and dSo. Wherein dSa ═ Sa-Sa |, dSb ═ Sb-Sb |, dSc ═ Sc-Sc |, dSo ═ So-So |;
and 5: and calculating a synthesis effective value. And respectively calculating the synthetic effective values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current according to the real and imaginary parts of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current, and sequentially marking as IA, IB, IC and IO. Wherein,
IA＝sqrt((Ro-Rb-Rc)×(Ro-Rb-Rc)+(Xo-Xb-Xc)×(Xo-Xb-Xc))；
IB＝sqrt((Ro-Ra-Rc)×(Ro-Ra-Rc)+(Xo-Xa-Xc)×(Xo-Xa-Xc))；
IC＝sqrt((Ro-Ra-Rb)×(Ro-Ra-Rb)+(Xo-Xa-Xb)×(Xo-Xa-Xb))；
IO＝sqrt((Ra+Rb+Rc)×(Ra+Rb+Rc)+(Xa+Xb+Xc)×(Xa+Xb+Xc))；
step 6: and calculating the deviation of the effective value. And respectively calculating effective value deviations of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the actual effective value and the synthesized effective value of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current, and sequentially marking as dIa, dIb, dIc and dIo. Wherein dIa ═ Ia-Ia |, dIb ═ Ib-Ib |, dIc ═ Ic-Ic |, dIo ═ Io-Io |;
and 7: and (5) judging the analog quantity abnormity. The sampling value deviation threshold value is set to be dthr3, the sampling value zero point clamping threshold value is set to be dthr2, the effective value deviation threshold value is set to be dthr1, and the effective value zero point clamping threshold value is set to be dthr 0.
The a-phase current is abnormal when Sa × Sa >0 and dSa > dthr3 × | Sa |, or when Sa × Sa ≦ 0 and dSa > dthr2, or when Ia >0 and dIa > dthr1 × Ia, or when Ia ═ 0 and dIa > dthr 0; otherwise, the phase A current is normal;
when Sb × Sb >0 and dSb > dthr3 × | Sb |, or when Sb × Sb ≦ 0 and dSb > dthr2, or when Ib >0 and dIb > dthr1 × Ib, or when Ib is 0 and dIb > dthr0, the B-phase current is abnormal; otherwise, the phase B current is normal;
c-phase current is abnormal when Sc × Sc >0 and dSc > dthr3 × | Sc |, or when Sc × Sc ≦ 0 and dSc > dthr2, or when Ic >0 and dIc > dthr1 × Ic, or when Ic ═ 0 and dIc > dthr 0; otherwise, the C phase current is normal;
zero-sequence current is abnormal when So × So >0 and dSo > dthr3 × | So |, or when So × So ≦ 0 and dSo > dthr2, or when Io >0 and dIo > dthr1 × Io, or when Io ═ 0 and dIo > dthr 0; otherwise, the zero sequence current is normal.
A computer-readable storage medium includes instructions, which when executed on a computer, cause the computer to execute a redundancy check method for protecting a non-redundant AD acquisition of a measurement and control device, where the redundancy check method for protecting a non-redundant AD acquisition of a measurement and control device includes the following steps:
step 1: and (5) grouping the analog quantity. Taking single-bus sectional wiring of two inlet wires as an example, selecting A phase voltage, B phase voltage, C phase voltage and zero sequence voltage of a I # bus as a group, selecting A phase current, B phase current, C phase current and zero sequence current of the I # bus as a group, and repeating the steps in the same way, selecting A phase voltage, B phase voltage, C phase voltage and zero sequence voltage of a II # bus as a group, and selecting A phase current, B phase current, C phase current and zero sequence current of a II # bus as a group. The following description is given by taking an I # incoming line as an example, and the description is given by: the method comprises the steps that an I # incoming line A-phase current original sampling value Sa, a B-phase current original sampling value Sb, a C-phase current original sampling value Sc and a zero-sequence current original sampling value So are obtained;
step 2: and calculating an actual effective value. And respectively calculating real and imaginary parts and actual effective values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the original sampling values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current by adopting a Fourier algorithm, and sequentially marking the real and imaginary parts and the actual effective values as Ra, Xa, Ia, Rb, Xb, Ib, Rc, Xc, Ic, Ro, Xo and Io. Representing the square-on operation with the operator sqrt (), then:
Ia＝sqrt(Ra×Ra+Xa×Xa)；
Ib＝sqrt(Rb×Rb+Xb×Xb)；
Ic＝sqrt(Rc×Rc+Xc×Xc)；
Io＝sqrt(Ro×Ro+Xo×Xo)；
and step 3: calculating a synthesized sampling value; and respectively calculating the synthetic sampling values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current according to the original sampling values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current, and sequentially marking as SA, SB, SC and SO. Wherein, SA-So-Sb-Sc, SB-So-Sa-Sc, SC-So-Sa-Sb, SO-Sa + Sb + Sc;
and 4, step 4: calculating the deviation of the sampling value; and respectively calculating the sampling value deviations of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the original sampling values and the synthesized sampling values of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current, and sequentially recording the sampling value deviations as dSa, dSb, dSc and dSo. Wherein dSa ═ Sa-Sa |, dSb ═ Sb-Sb |, dSc ═ Sc-Sc |, dSo ═ So-So |;
and 5: and calculating a synthesis effective value. And respectively calculating the synthetic effective values of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current according to the real and imaginary parts of the phase-A current, the phase-B current, the phase-C current and the zero-sequence current, and sequentially marking as IA, IB, IC and IO. Wherein,
IA＝sqrt((Ro-Rb-Rc)×(Ro-Rb-Rc)+(Xo-Xb-Xc)×(Xo-Xb-Xc))；
IB＝sqrt((Ro-Ra-Rc)×(Ro-Ra-Rc)+(Xo-Xa-Xc)×(Xo-Xa-Xc))；
IC＝sqrt((Ro-Ra-Rb)×(Ro-Ra-Rb)+(Xo-Xa-Xb)×(Xo-Xa-Xb))；
IO＝sqrt((Ra+Rb+Rc)×(Ra+Rb+Rc)+(Xa+Xb+Xc)×(Xa+Xb+Xc))；
step 6: and calculating the deviation of the effective value. And respectively calculating effective value deviations of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current according to the actual effective value and the synthesized effective value of the A-phase current, the B-phase current, the C-phase current and the zero-sequence current, and sequentially marking as dIa, dIb, dIc and dIo. Wherein dIa ═ Ia-Ia |, dIb ═ Ib-Ib |, dIc ═ Ic-Ic |, dIo ═ Io-Io |;
and 7: and (5) judging the analog quantity abnormity. The sampling value deviation threshold value is set to be dthr3, the sampling value zero point clamping threshold value is set to be dthr2, the effective value deviation threshold value is set to be dthr1, and the effective value zero point clamping threshold value is set to be dthr 0.
The a-phase current is abnormal when Sa × Sa >0 and dSa > dthr3 × | Sa |, or when Sa × Sa ≦ 0 and dSa > dthr2, or when Ia >0 and dIa > dthr1 × Ia, or when Ia ═ 0 and dIa > dthr 0; otherwise, the phase A current is normal;
when Sb × Sb >0 and dSb > dthr3 × | Sb |, or when Sb × Sb ≦ 0 and dSb > dthr2, or when Ib >0 and dIb > dthr1 × Ib, or when Ib is 0 and dIb > dthr0, the B-phase current is abnormal; otherwise, the phase B current is normal;
c-phase current is abnormal when Sc × Sc >0 and dSc > dthr3 × | Sc |, or when Sc × Sc ≦ 0 and dSc > dthr2, or when Ic >0 and dIc > dthr1 × Ic, or when Ic ═ 0 and dIc > dthr 0; otherwise, the C phase current is normal;
zero-sequence current is abnormal when So × So >0 and dSo > dthr3 × | So |, or when So × So ≦ 0 and dSo > dthr2, or when Io >0 and dIo > dthr1 × Io, or when Io ═ 0 and dIo > dthr 0; otherwise, the zero sequence current is normal.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When used in whole or in part, can be implemented in a computer program product that includes one or more computer instructions. When loaded or executed on a computer, cause the flow or functions according to embodiments of the invention to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, the computer instructions may be transmitted from one website site, computer, server, or data center to another website site, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL), or wireless (e.g., infrared, wireless, microwave, etc.)). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that includes one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the present invention in any way, and all simple modifications, equivalent changes and modifications made to the above embodiment according to the technical spirit of the present invention are within the scope of the technical solution of the present invention.
Claims (5)
1. A redundancy check method for protecting the non-redundant AD acquisition of the measurement and control device, compare and verify after synthesizing the analog quantity and analog quantity data of the relevant channel gathered to protect the measurement and control device, carry on the detection of the analog quantity acquisition loop; the method is characterized in that: at least comprises the following steps:
the method comprises the following steps: grouping analog quantity; selecting three-phase current and zero-sequence current of the same line as one group, selecting three-phase voltage and zero-sequence voltage of the same bus as one group, wherein 4 paths of analog quantity in each group can be mutually detected;
step two: calculating an actual effective value; respectively calculating real parts, imaginary parts and actual effective values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity by adopting a Fourier algorithm according to the A phase, the B phase, the C phase and the zero sequence original sampling values in each group of analog quantity; and sequentially marked as Ra, Xa, Ia, Rb, Xb, Ib, Rc, Xc, Ic, Ro, Xo and Io;
representing the square-on operation with the operator sqrt (), then:
Ia＝sqrt(Ra×Ra+Xa×Xa)；
Ib＝sqrt(Rb×Rb+Xb×Xb)；
Ic＝sqrt(Rc×Rc+Xc×Xc)；
Io＝sqrt(Ro×Ro+Xo×Xo)；
step three: calculating a synthesized sampling value; respectively calculating the synthetic sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the A phase, the B phase, the C phase and the zero sequence original sampling values in each group of analog quantity; sequentially recording as SA, SB, SC and SO, wherein SA-So-Sb-Sc, SB-So-Sa-Sc, SC-So-Sa-Sb and SO-Sa + Sb + Sc; sa is an original sampling value of phase-A current, Sb is an original sampling value of phase-B current, Sc is an original sampling value of phase-C current, and So is an original sampling value of zero-sequence current;
step four: calculating the deviation of the sampling value; respectively calculating the deviation of the sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the original sampling values and the synthesized sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity; the sampling value deviation is equal to the absolute value of the difference between the corresponding analog original sampling value and the synthesized sampling value;
step five: calculating a synthetic effective value; respectively calculating the synthetic effective values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the real parts and the imaginary parts of the A phase, the B phase, the C phase and the zero sequence in each group of analog quantity; wherein: the synthetic effective values of the phase current A, the phase current B, the phase current C and the zero sequence current are sequentially marked as IA, IB, IC and IO;
IA＝sqrt((Ro-Rb-Rc)×(Ro-Rb-Rc)+(Xo-Xb-Xc)×(Xo-Xb-Xc))；
IB＝sqrt((Ro-Ra-Rc)×(Ro-Ra-Rc)+(Xo-Xa-Xc)×(Xo-Xa-Xc))；
IC＝sqrt((Ro-Ra-Rb)×(Ro-Ra-Rb)+(Xo-Xa-Xb)×(Xo-Xa-Xb))；
IO＝sqrt((Ra+Rb+Rc)×(Ra+Rb+Rc)+(Xa+Xb+Xc)×(Xa+Xb+Xc))；
step six: calculating the deviation of effective values; respectively calculating the effective value deviations of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the actual effective value and the synthesized effective value of the A phase, the B phase, the C phase and the zero sequence in each group of analog quantity; the effective value deviation is equal to the absolute value of the difference between the actual effective value and the synthesized effective value of the corresponding analog quantity;
step seven: judging the analog quantity abnormity; setting a sampling value deviation threshold value and a sampling value zero-point clamping threshold value, setting an effective value deviation threshold value and an effective value zero-point clamping threshold value, and carrying out anomaly detection on all analog quantities in all groups; when the analog quantity is judged to be abnormal through the deviation of the sampling value or the analog quantity is judged to be abnormal through the deviation of the effective value, the analog quantity is judged to be abnormal; the method specifically comprises the following steps: setting a sampling value deviation threshold value to be dthr3, a sampling value zero-point clamping threshold value to be dthr2, an effective value deviation threshold value to be dthr1 and an effective value zero-point clamping threshold value to be dthr 0; the sampling value deviations of the phase current A, the phase current B, the phase current C and the zero sequence current are recorded as dSa, dSb, dSc and dSo in sequence; the effective value deviations of the phase current A, the phase current B, the phase current C and the zero sequence current are sequentially recorded as dIa, dIb, dIc and dIo;
the a-phase current is abnormal when Sa × Sa >0 and dSa > dthr3 × | Sa |, or when Sa × Sa ≦ 0 and dSa > dthr2, or when Ia >0 and dIa > dthr1 × Ia, or when Ia ═ 0 and dIa > dthr 0; otherwise, the phase A current is normal;
when Sb × Sb >0 and dSb > dthr3 × | Sb |, or when Sb × Sb ≦ 0 and dSb > dthr2, or when Ib >0 and dIb > dthr1 × Ib, or when Ib is 0 and dIb > dthr0, the B-phase current is abnormal; otherwise, the phase B current is normal;
c-phase current is abnormal when Sc × Sc >0 and dSc > dthr3 × | Sc |, or when Sc × Sc ≦ 0 and dSc > dthr2, or when Ic >0 and dIc > dthr1 × Ic, or when Ic ═ 0 and dIc > dthr 0; otherwise, the C phase current is normal;
zero-sequence current is abnormal when So × So >0 and dSo > dthr3 × | So |, or when So × So ≦ 0 and dSo > dthr2, or when Io >0 and dIo > dthr1 × Io, or when Io ═ 0 and dIo > dthr 0; otherwise, the zero sequence current is normal.
2. The redundancy check method for protecting the non-redundant AD acquisition of the measurement and control device according to claim 1, characterized in that: in the fifth step: when the real part and the imaginary part are adopted to calculate the combined effective value, the calculation and judgment of the sixth step and the seventh step are needed respectively, and finally, the analog quantity abnormity is judged through the sampling value deviation, or the analog quantity abnormity is judged through the effective value deviation.
3. A redundant check system for protecting the non-redundant AD acquisition of the measurement and control device, compare and verify after synthesizing the analog quantity and analog quantity data of the relevant channel gathered to protect the measurement and control device, carry on the detection of the analog quantity acquisition loop; the method is characterized in that: at least comprises the following steps:
an analog grouping module; selecting three-phase current and zero-sequence current of the same line as one group, selecting three-phase voltage and zero-sequence voltage of the same bus as one group, wherein 4 paths of analog quantity in each group can be mutually detected;
an actual effective value calculation module: respectively calculating real parts, imaginary parts and actual effective values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity by adopting a Fourier algorithm according to the A phase, the B phase, the C phase and the zero sequence original sampling values in each group of analog quantity; and sequentially marked as Ra, Xa, Ia, Rb, Xb, Ib, Rc, Xc, Ic, Ro, Xo and Io;
representing the square-on operation with the operator sqrt (), then:
Ia＝sqrt(Ra×Ra+Xa×Xa)；
Ib＝sqrt(Rb×Rb+Xb×Xb)；
Ic＝sqrt(Rc×Rc+Xc×Xc)；
Io＝sqrt(Ro×Ro+Xo×Xo)；
and a synthesized sampling value calculation module: respectively calculating the synthetic sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the A phase, the B phase, the C phase and the zero sequence original sampling values in each group of analog quantity; sequentially recording as SA, SB, SC and SO, wherein SA-So-Sb-Sc, SB-So-Sa-Sc, SC-So-Sa-Sb and SO-Sa + Sb + Sc; sa is an original sampling value of phase-A current, Sb is an original sampling value of phase-B current, Sc is an original sampling value of phase-C current, and So is an original sampling value of zero-sequence current;
a sampling value deviation calculation module: respectively calculating the deviation of the sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the original sampling values and the synthesized sampling values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity; the sampling value deviation is equal to the absolute value of the difference between the corresponding analog original sampling value and the synthesized sampling value;
a synthetic effective value calculation module: respectively calculating the synthetic effective values of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the real parts and the imaginary parts of the A phase, the B phase, the C phase and the zero sequence in each group of analog quantity; wherein: the synthetic effective values of the phase current A, the phase current B, the phase current C and the zero sequence current are sequentially marked as IA, IB, IC and IO;
IA＝sqrt((Ro-Rb-Rc)×(Ro-Rb-Rc)+(Xo-Xb-Xc)×(Xo-Xb-Xc))；
IB＝sqrt((Ro-Ra-Rc)×(Ro-Ra-Rc)+(Xo-Xa-Xc)×(Xo-Xa-Xc))；
IC＝sqrt((Ro-Ra-Rb)×(Ro-Ra-Rb)+(Xo-Xa-Xb)×(Xo-Xa-Xb))；
IO＝sqrt((Ra+Rb+Rc)×(Ra+Rb+Rc)+(Xa+Xb+Xc)×(Xa+Xb+Xc))；
an effective value deviation calculation module: respectively calculating the effective value deviations of the A phase, the B phase, the C phase and the zero sequence of each group of analog quantity according to the actual effective value and the synthesized effective value of the A phase, the B phase, the C phase and the zero sequence in each group of analog quantity; the effective value deviation is equal to the absolute value of the difference between the actual effective value and the synthesized effective value of the corresponding analog quantity;
an analog quantity abnormity judgment module: setting a sampling value deviation threshold value and a sampling value zero-point clamping threshold value, setting an effective value deviation threshold value and an effective value zero-point clamping threshold value, and carrying out anomaly detection on all analog quantities in all groups; when the analog quantity is judged to be abnormal through the deviation of the sampling value or the analog quantity is judged to be abnormal through the deviation of the effective value, the analog quantity is judged to be abnormal; the method specifically comprises the following steps: setting a sampling value deviation threshold value to be dthr3, a sampling value zero-point clamping threshold value to be dthr2, an effective value deviation threshold value to be dthr1 and an effective value zero-point clamping threshold value to be dthr 0; the sampling value deviations of the phase current A, the phase current B, the phase current C and the zero sequence current are recorded as dSa, dSb, dSc and dSo in sequence; the effective value deviations of the phase current A, the phase current B, the phase current C and the zero sequence current are sequentially recorded as dIa, dIb, dIc and dIo;
the a-phase current is abnormal when Sa × Sa >0 and dSa > dthr3 × | Sa |, or when Sa × Sa ≦ 0 and dSa > dthr2, or when Ia >0 and dIa > dthr1 × Ia, or when Ia ═ 0 and dIa > dthr 0; otherwise, the phase A current is normal;
when Sb × Sb >0 and dSb > dthr3 × | Sb |, or when Sb × Sb ≦ 0 and dSb > dthr2, or when Ib >0 and dIb > dthr1 × Ib, or when Ib is 0 and dIb > dthr0, the B-phase current is abnormal; otherwise, the phase B current is normal;
c-phase current is abnormal when Sc × Sc >0 and dSc > dthr3 × | Sc |, or when Sc × Sc ≦ 0 and dSc > dthr2, or when Ic >0 and dIc > dthr1 × Ic, or when Ic ═ 0 and dIc > dthr 0; otherwise, the C phase current is normal;
zero-sequence current is abnormal when So × So >0 and dSo > dthr3 × | So |, or when So × So ≦ 0 and dSo > dthr2, or when Io >0 and dIo > dthr1 × Io, or when Io ═ 0 and dIo > dthr 0; otherwise, the zero sequence current is normal.
4. An information data processing terminal for implementing the redundancy check method for protecting the non-redundant AD acquisition of the measurement and control device according to any one of claims 1-2.
5. A computer-readable storage medium comprising instructions which, when run on a computer, cause the computer to perform the redundancy check method for protecting non-redundant AD acquisition of a instrumentation and control device according to any of claims 1-2.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010171533A (en) * | 2009-01-20 | 2010-08-05 | Mitsubishi Electric Corp | Current mode ad converter |
| CN104777397A (en) * | 2015-04-16 | 2015-07-15 | 王金泽 | Distribution line single-phase break line judgment and positioning method based on line voltage vector criterion |
| CN205157639U (en) * | 2015-12-03 | 2016-04-13 | 国家电网公司 | Synchronous earth mat reposition of redundant personnel vector test system of application GPS |
| CN106410739A (en) * | 2016-11-02 | 2017-02-15 | 云南电力试验研究院(集团)有限公司 | Arc protection device and fault diagnosis method thereof |
| CN106771730A (en) * | 2016-12-06 | 2017-05-31 | 广东电网有限责任公司电力调度控制中心 | The intelligent substation real-time calibration equipment of protection device analog quantity sampling circuit and method |
| CN109254216A (en) * | 2018-11-07 | 2019-01-22 | 紫光测控有限公司 | A kind of AD method of calibration and system for measuring and controlling protective device |
-
2019
- 2019-04-26 CN CN201910344328.8A patent/CN110045206B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010171533A (en) * | 2009-01-20 | 2010-08-05 | Mitsubishi Electric Corp | Current mode ad converter |
| CN104777397A (en) * | 2015-04-16 | 2015-07-15 | 王金泽 | Distribution line single-phase break line judgment and positioning method based on line voltage vector criterion |
| CN205157639U (en) * | 2015-12-03 | 2016-04-13 | 国家电网公司 | Synchronous earth mat reposition of redundant personnel vector test system of application GPS |
| CN106410739A (en) * | 2016-11-02 | 2017-02-15 | 云南电力试验研究院(集团)有限公司 | Arc protection device and fault diagnosis method thereof |
| CN106771730A (en) * | 2016-12-06 | 2017-05-31 | 广东电网有限责任公司电力调度控制中心 | The intelligent substation real-time calibration equipment of protection device analog quantity sampling circuit and method |
| CN109254216A (en) * | 2018-11-07 | 2019-01-22 | 紫光测控有限公司 | A kind of AD method of calibration and system for measuring and controlling protective device |
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