CN110010483A - 一种电磁屏蔽功能的射频芯片三维封装工艺 - Google Patents
一种电磁屏蔽功能的射频芯片三维封装工艺 Download PDFInfo
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Abstract
本发明公开了一种电磁屏蔽功能的射频芯片三维封装工艺，包括如下步骤：101）柔性电路板处理步骤、102）安置功能芯片步骤、103）封装步骤；本发明提供避免了芯片间的电磁干扰的一种电磁屏蔽功能的射频芯片三维封装工艺。
Description
技术领域
本发明涉及半导体技术领域，更具体的说，它涉及一种电磁屏蔽功能的射频芯片三维封装工艺。
背景技术
随着芯片尺寸的逐渐缩小，传统的单片式封装工艺已经从原来的插槽式过渡到BGA，再到WLCSP最后到Fan-out，但是随着系统级功能模块的提出，系统级封装的方式又逐渐取代了过去的单片式，通过载体，把不同材质和不同功能的芯片集成到一个较小的区域，减少了芯片的单位占用面积，缩短了信号互联线，同时有利于产品的组装。
然而对于通信行业来讲，高频的射频芯片逐渐替代了原来的低频产品，这样射频芯片与射频芯片之间，射频芯片与其他功能芯片之间以及射频系统级模块跟其他射频系统级模块之间的电磁波干扰问题就越来越被重视起来。
为了应对这个问题，电磁屏蔽层的增加是目前的主流手段，也是防止电磁波污染所必须的防护手段，一般IC芯片塑胶体是不导电的，对电磁场几乎没有屏蔽作用。目前比较多的是在封装体外面放置金属屏蔽罩，这种方式屏蔽性能好，但是比重大，占用面积大，成本高，且不耐腐蚀。
发明内容
本发明克服了现有技术的不足，提供避免了芯片间的电磁干扰的一种电磁屏蔽功能的射频芯片三维封装工艺。
本发明的技术方案如下：
一种电磁屏蔽功能的射频芯片三维封装工艺，具体处理包括如下步骤：
101）柔性电路板处理步骤：在柔性电路板的表面制作线路RDL，柔性电路板包括线路层和有机膜，线路层为N层，有机膜为N+1层，线路层和有机膜之间间隔设置；有机膜厚度在100nm到500um之间，线路层厚度在100nm到500um之间，宽度在1um到500um之间；线路层的金属材质采用钛、铜、铝、银、钯、金、铊、锡或镍；
柔性电路板上一端的下表面刻蚀孔，使RDL和焊盘露出来，然后通过光刻电镀工艺在有机膜上制作金属层，金属层采用钛、铜、铝、银、钯、金、铊、锡或镍，金属层厚度范围在100nm到300um之间；金属层包括互联焊盘和粘接焊盘；
在柔性电路板上做镂空结构，在镂空结构上镶嵌铜块，铜块厚度范围在300nm到600um之间；镂空结构包括两处，第一镂空处在柔性电路板的中间，第二镂空处在柔性电路板的另一端；
102）安置功能芯片步骤；把第一功能芯片焊接在柔性电路板的第一镂空处上，打引线使第一功能芯片跟电路板互联，通过贴片工艺把第二功能芯片贴装在第一功能芯片上，第二功能芯片表面涂胶，把柔性线路板刻蚀孔的一端粘贴在第二功能芯片的表面；
103）封装步骤：通过键合工艺把第三功能芯片放置于柔性线路板的一端的金属层粘接焊盘上，把柔性线路板的另一端的镶铜通过粘接的工艺盖在第三功能芯片的顶部；切割成单一模组，通过贴片工艺把模组焊接在基板或者电路板表面的焊球或焊盘上完成芯片的互联。
进一步的，基板或者PCB板上制作RDL和焊盘，焊盘表面制作焊球，在基板或者PCB板的下方做镂空，中间嵌铜。
进一步的，有机膜包括聚四氟乙烯塑料、环氧树脂或聚氨酯。
本发明相比现有技术优点在于：本发明利用柔性电路板做基板，在上面制作线路和电磁屏蔽功能的金属块，通过柔性电路板的折叠实现芯片的三维堆叠和电磁屏蔽，节省了面积，同时还使每个芯片都有自己的区域，避免了芯片间的电磁干扰。
附图说明
图1为本发明的柔性电路板结构图；
图2为本发明的柔性电路板上设置第一功能芯片结构图；
图3为本发明的图2上设置第二功能芯片结构图；
图4为本发明的图3上折形的结构图；
图5为本发明的图4上设置第三功能芯片的结构图；
图6为本发明的基板结构图；
图7为本发明的结构图。
图中标识：柔性电路板101、铜块102、金属层103、第一功能芯片201、第二功能芯片202、第三功能芯片203、基板301、焊球302、嵌铜303。
具体实施方式
下面详细描述本发明的实施方式，其中自始至终相同或类似的标号表示相同或类似的元件或类似功能的元件。下面通过参考附图描述的实施方式是示例性的，仅用于解释本发明而不能作为对本发明的限制。
本技术领域技术人员可以理解的是，除非另外定义，这里使用的所有术语（包括技术术语和科技术语）具有与本发明所属领域中的普通技术人员的一般理解相同的意义。还应该理解的是，诸如通用字典中定义的那些术语应该被理解为具有与现有技术的上下文中的意义一致的意义，并且除非像这里一样的定义，不会用理想化或过于正式的含义来解释。
各实施方式中提到的有关于步骤的标号，仅仅是为了描述的方便，而没有实质上先后顺序的联系。各具体实施方式中的不同步骤，可以进行不同先后顺序的组合，实现本发明的发明目的。
下面结合附图和具体实施方式对本发明进一步说明。
如图1至图7所示，一种电磁屏蔽功能的射频芯片三维封装工艺，具体处理包括如下步骤：
101）柔性电路板101处理步骤：在柔性电路板101的表面制作线路RDL，柔性电路板101包括线路层和有机膜，线路层为N层，有机膜为N+1层，线路层和有机膜之间间隔设置。即可以是一层线路，两层有机膜，也可以是两层线路，三层有机膜等，此处一般线路层数在1~10层之间，有机膜在2~11层之间，两者间互相穿插，一层线路层一层有机膜的结构，其中有机膜多的一层为底层。有机膜厚度在100nm到500um之间，线路层厚度在100nm到500um之间，宽度在1um到500um之间。线路层的金属材质采用钛、铜、铝、银、钯、金、铊、锡或镍。
柔性电路板101上一端的下表面刻蚀孔，使RDL和焊盘露出来，然后通过光刻电镀工艺在有机膜上制作金属层103，金属层103采用钛、铜、铝、银、钯、金、铊、锡或镍，金属层103厚度范围在100nm到300um之间。金属层103包括互联焊盘和粘接焊盘两种结构。
在柔性电路板101上做镂空结构，在镂空结构上镶嵌铜块102，铜块102厚度范围在300nm到600um之间。镂空结构包括两处，第一镂空处在柔性电路板101的中间，第二镂空处在柔性电路板101的另一端。
102）安置功能芯片步骤。把第一功能芯片201焊接在柔性电路板101的第一镂空处上，打引线使第一功能芯片201跟电路板互联，通过贴片工艺把第二功能芯片202贴装在第一功能芯片201上，第二功能芯片202表面涂胶，把柔性线路板刻蚀孔的一端粘贴在第二功能芯片202的表面。
具体如图2所示，把第一功能芯片201焊接在柔性电路板101的镶铜上，打引线使第一功能芯片201跟电路板互联。
如图3所示，贴片工艺把第二功能芯片202贴装在第一功能芯片201上，使这两种芯片形成chip to chip键合即芯片对芯片的键合。此处的第二功能芯片202上预先布置RDL和焊盘。
如图4所示，在第三功能芯片203表面涂胶，把柔性线路板粘贴在第二功能芯片202的表面。
103）封装步骤：通过键合工艺把第三功能芯片203放置于柔性线路板的一端的金属层103粘接焊盘上，把柔性线路板的另一端的铜块102通过粘接的工艺盖在第三功能芯片203的顶部，再切割成单一模组，通过贴片工艺把模组焊接在基板301或者电路板表面的焊球302或焊盘上完成芯片的互联。
具体如图5所示，通过键合工艺把第三功能芯片203放置于柔性线路板的金属层103粘接焊盘上，使第三功能芯片203上的线路跟柔性线路板上的焊盘互联。
如图6所示，制作基板301或者PCB板，在板上制作RDL和焊盘，焊盘表面制作BGA植球302，在基板301的下方做镂空，中间嵌铜303。
把柔性线路板切割成单一模组，通过贴片工艺把模组焊接在基板301或者电路板表面的焊球302或焊盘上完成芯片的互联。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本发明构思的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明保护范围内。
Claims (3)
1.一种电磁屏蔽功能的射频芯片三维封装工艺，其特征在于，具体处理包括如下步骤：
101）柔性电路板处理步骤：在柔性电路板的表面制作线路RDL，柔性电路板包括线路层和有机膜，线路层为N层，有机膜为N+1层，线路层和有机膜之间间隔设置；有机膜厚度在100nm到500um之间，线路层厚度在100nm到500um之间，宽度在1um到500um之间；线路层的金属材质采用钛、铜、铝、银、钯、金、铊、锡或镍；
柔性电路板上一端的下表面刻蚀孔，使RDL和焊盘露出来，然后通过光刻电镀工艺在有机膜上制作金属层，金属层采用钛、铜、铝、银、钯、金、铊、锡或镍，金属层厚度范围在100nm到300um之间；金属层包括互联焊盘和粘接焊盘；
在柔性电路板上做镂空结构，在镂空结构上镶嵌铜块，铜块厚度范围在300nm到600um之间；镂空结构包括两处，第一镂空处在柔性电路板的中间，第二镂空处在柔性电路板的另一端；
102）安置功能芯片步骤；把第一功能芯片焊接在柔性电路板的第一镂空处上，打引线使第一功能芯片跟电路板互联，通过贴片工艺把第二功能芯片贴装在第一功能芯片上，第二功能芯片表面涂胶，把柔性线路板刻蚀孔的一端粘贴在第二功能芯片的表面；
103）封装步骤：通过键合工艺把第三功能芯片放置于柔性线路板的一端的金属层粘接焊盘上，把柔性线路板的另一端的镶铜通过粘接的工艺盖在第三功能芯片的顶部；切割成单一模组，通过贴片工艺把模组焊接在基板或者电路板表面的焊球或焊盘上完成芯片的互联。
2.根据权利要求1所述的一种电磁屏蔽功能的射频芯片三维封装工艺，其特征在于：基板或者PCB板上制作RDL和焊盘，焊盘表面制作焊球，在基板或者PCB板的下方做镂空，中间嵌铜。
3.根据权利要求1所述的一种电磁屏蔽功能的射频芯片三维封装工艺，其特征在于：有机膜包括聚四氟乙烯塑料、环氧树脂或聚氨酯。
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