CN1099177A - Driving circuit for display apparatus - Google Patents
Driving circuit for display apparatus Download PDFInfo
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- CN1099177A CN1099177A CN 94105695 CN94105695A CN1099177A CN 1099177 A CN1099177 A CN 1099177A CN 94105695 CN94105695 CN 94105695 CN 94105695 A CN94105695 A CN 94105695A CN 1099177 A CN1099177 A CN 1099177A
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- signal
- voltage
- grayscale voltage
- grayscale
- driving circuit
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2011—Display of intermediate tones by amplitude modulation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
Abstract
A driving circuit of the invention is used for driving a display apparatus. The driving circuit includes: an oscillating signal specifying section for specifying one of a plurality of oscillating signals having respective mean values which are different from each other in accordance with video data consisting of bits selected from the plurality of bits, and for outputting the specified oscillating signal T and an oscillating signal T-bar which is obtained by inverting the specified oscillating signal T; a gray-scale voltage specifying section for producing gray-scale voltage specifying signals which specify a first gray-scale voltage and a second gray-scale voltage among a plurality of gray-scale voltages supplied from a gray-scale voltage supply section, in accordance with video data consisting of bits other than the selected bits of the plurality of bits; and an output section for outputting the first gray-scale voltage and the second gray-scale voltage specified by the gray-scale voltage specifying signals to the data lines, in accordance with the oscillating signal T and the oscillating signal T-bar.
Description
The present invention relates to be used for the driving circuit of display device, relate in particular to the driving circuit that is used for active array type LCD, described liquid crystal indicator adopts a plurality of gray shade scales to come display image according to digital video signal.
Active array type LCD comprises a display panel and is used for driving the driving circuit of this display panel that described display panel comprises a pair of glass substrate and is formed at this to the liquid crystal layer between the glass substrate.Make many select liness and many data lines at this on to a slice in the glass substrate.Each pixel of display panel is provided with driving circuit, and driving circuit is to demonstration and the liquid crystal of plate provides driving voltage.Driving circuit comprises the gate driver of one of a plurality of on-off elements of being used for selecting independently being connected to select lines and data line and will deliver to the data driver of pixel electrode corresponding to the vision signal of an image by selected on-off element.
Figure 11 shows the part-structure of data driver in the prior art driving circuit.Circuit shown in Figure 11 110 output one vision signal is in the data lines at the most.Correspondingly, data driver requires the quantity of circuit 110 to equal the quantity of the data line that display panel possesses.For ease of explaining, suppose that here video data is by three (D
0, D
1, D
2) form.On the basis of this assumption, video data can have 0 to 7 eight value, and the signal voltage that offers each pixel is V
0-V
7In these eight level one.
Circuit 110 comprises a sampling trigger M
SMP, one keep trigger M
H, a demoder DEC and analog switch ASW.One ASW
7To ASW
0-ASW
7Each analog switch, apply V
0-V
7In a corresponding external source voltage (eight level separately different).In addition, control signal S
0-S
7Respectively from demoder DEC input analog switch ASW
0-ASW
7, each control signal (S
0-S
7) all be used for the open/close state of converting analogue switch.
Next the principle of work of circuit 110 is described.At sampling pulse T corresponding to which pixel
SMPnRising edge, sample trigger device M
SMPObtain video data (D
0, D
1, D
2), and video data remained on wherein.After a horizontal scanning period has been finished such video data sampling, an output pulse signal OE is added in maintenance trigger M
HOn.In case receive output pulse signal OE, keep trigger M
HJust from sample trigger device M
SMPObtain video data (D
0, D
1, D
2), and give demoder DEC with video Data Transmission.
Demoder DEC is to video data (D
0, D
1, D
2) decode, and according to video data (D
0, D
1, D
2) each value (0-7) produce a control signal, in order to connect ASW
0-ASW
7In an analog switch, consequently, external source voltage V
0-V
7In one be output to data line O
nFor example, keep trigger M when remaining on
HIn the video data value be 3 o'clock, analog switch ASW is connected in demoder DEC output one
3Control signal S
3, make analog switch ASW
3Become " opening " state, and external source voltage V
0-V
7In V
3Export to data line O
n
There is a problem in the data driver of this prior art, that is, when the figure place of video data increased, the become size of complexity and circuit of circuit structure increased.This be because the data driver of prior art require the quantity of grayscale voltage to equal will the gray-scale displayed number of degrees.For example, when video data contains 4 and when being used for showing 16 grey scale image, needed grayscale voltage quantity is: 2
4=16.Similarly, when video data is 6 and when being used for showing 64 grey scale image, required grayscale voltage quantity is: 2
6=64.When video data is 8 and when being used for showing 256 grey scale image, required grayscale voltage quantity is 2
8=256.As mentioned above, when the video data figure place increased, the data driver of prior art needed a large amount of grayscale voltages.The size that this causes the structure of circuit to become complicated and increased circuit.And it is complicated that the interconnection between voltage source circuit and analog switch also becomes.
For the foregoing reasons, the practical application of the data driver of this prior art only limits to the occasion of 3 digital video data or 4 digital video data.
In order to solve the problem that this prior art exists, the method and the circuit of display device proposed to be used for driving in open text 4-136983, the 4-140787 of Japanese publication and 6-27900.Please note that the open text of Japanese publication is not for 6-27900 number the prior art relevant with the present invention, this is because the open text of Japanese publication is for 6-27900 number disclosed on February 4th, 1994.
Figure 12 shows the part-structure of having made the driving circuit that discloses in the open text of Japanese publication 6-27900 number.Be shown in circuit one in the data lines more than 120 couples output one vision signal of Figure 12.Correspondingly, the quantity of the data line that possessed of the data driver quantity that requires circuit 120 and display panel is identical.Here suppose that video data is 6 (D
0, D
1, D
2, D
3, D
4, D
5).On the basis of this assumption, video data can have 64 values of 0-63, and the signal voltage that is added to each pixel is 9 grayscale voltage V
0, V
8, V
16, V
24, V
32, V
40, V
48, V
56And V
64And by grayscale voltage V
0, V
8, V
16, V
24, V
32, V
40, V
48, V
56And V
64In a plurality of interpolation voltages that produce one.
Circuit 120 comprises a sample trigger device M
SMP, one keep trigger M
H, one selects control circuit SCOL and analog switch ASW
0-ASW
8Each analog switch (ASW
0-ASW
8) on be added with mutually different grayscale voltage V of each level
0, V
8, V
16, V
24, V
32, V
40, V
48, V
56And V
64In a corresponding voltage.Control signal S
0, S
8, S
16, S
24, S
32, S
40, S
48, S
56And S
64Respectively by selecting control circuit SCOL to export analog switch ASW to
0-ASW
8Each control signal is used for the open/close state of converting analogue switch.
Select to be added with clock signal t on the control circuit SCOL
1, t
2, t
3, and t
4As shown in figure 13, clock signal t
1, t
2, t
3And t
4Has different duty factor mutually.Select control circuit SCOL to receive 6 digital video data d
5, d
4, d
3, d
2, d
1And d
0, and according to received video data value output control signal S
0, S
8, S
16, S
24, S
32, S
40, S
56And S
64In one.Select the input of control circuit SCOL and the relation between output by using a logical table to determine.
Table 1 shows the logical table of selecting control circuit SCOL.First to the 6th row of table are represented video data d respectively
5, d
4, d
3, d
2, d
1And d
0Place value.The the 7th to the 15th row of table 1 are represented control signal S respectively
0, S
8, S
16, S
24, S
32, S
40, S
48, S
56And S
64Value.Each space in the table 1 in the 7th to the 15th row represents that the value of control signal is 0.In addition, " t
1" expression value of control signal when the value of clock signal Si is 1 is 1, and the value of control signal is 0 when clock signal ti is 0.Similarly, " t
1Expression is as clock signal t
1Value be that the value of 1 o'clock control signal is 0, and as clock signal t
1Value be that the value of 0 o'clock control signal is 1.Here, i=1,2,3 and 4.
Table 1
As appreciable by table 1, when the video data value is 8 multiple, grayscale voltage V
0..., V
64In a value be output to data line O
nWhen video data is not 8 multiple, with clock signal t
1, t
2, t
3And t
4In one of be duty factor, at a pair of grayscale voltage V
0..., V
64Between the vibration oscillating voltage export data line O to
nAccording to the logical table of table 1, data driver 120 is created in seven different oscillating voltages between each adjacent grayscale voltage.Therefore, can obtain 64 grayscale images by 9 level that only use grayscale voltage.
Equation hereinafter is to make video data d
5, d
4, d
3, d
2, d
1And d
0Between the logical equation of relation, clock signal t
1, t
2, t
3And t
4And control signal S
0, S
8, S
16, S
24, S
32, S
40, S
48, S
56And S
64Be shown in table 1.
S
0＝{0}+{1}t
1+{2}t
2+{3}t
3+{4}t
4+{5}"t
3"+{6}"t
2"+{7}"t
1" …（1）
S
8＝{1}"t
1+{2}"t
2"+{3}"t
3"+{4}"t
4"+{5}t
3+{6}t
2+{7}t
1+{8}+{9}t
1+{10}t
2+{11}t
3+{12}t
4+{13}"t
3"+{14}"t
2"+{15}"t
1" …（2）
S
16＝{9}"t
1+{10}"t
2"+{11}"t
3"+{12}"t
4"+{13}t
3+{14}t
2+{15}t
1+{16}+{17}t
1+{18}t
2+{19}t
3+{20}t
4+{21}"t
3"+{22}"t
2"+{23}"t
1" …（3）
Similarly, stipulated control signal S
24, S
32, S
40And S
48Control signal S
56And S
64Be defined as follows.
S
56＝{49}"t
1"+{50}"t
2"+{51}"t
3"+{52}"t
4"+{53}t
3+{54}t
2+{55}t
5+{56}+{57}t
1+{58}t
2+{59}t
3+{60}t
4+{61}"t
3"+{62}"t
2"+{63}"t
1" …（4）
S
64＝{57}"t
1"+{58}"t
2"+{59}"t
3"+{60}"t
4"+{61}t
3+{62}t
2+{63}t
1…（5）
In the superincumbent equation, { i} is that decimally representation is represented binary data (d
5, d
4, d
3, d
2, d
1, d
0) time value.For example, { 1}=(d
5, d
4, d
3, d
2, d
1, d
0)=(0,0,0,0,0,1).In addition, " ti " expression is to signal t
1The signal that carries out paraphase and obtain.
Based on top logical equation, obtained being shown in the logical circuit of Figure 14 and 15, select control circuit SCOL to constitute by the logical circuit that is shown in Figure 14 and 15.
The logical circuit that is shown in Figure 14 is according to 6 digital video data (d
5, d
4, d
3, d
2, d
1, d
0) 64 kinds of gray shade scales selections of generation data { 0}-{63}.Select data { 0}-{63} and clock signal t according to gray shade scale
1, t
2, t
3And t
4, the logical circuit that is shown in Figure 15 produces control signal S
0, S
8, S
16, S
24, S
32, S
48, S
56And S
64For example, to video data (d
5, d
4, d
3, d
2, d
1, d
0)=(0,0,0,0,0,1) import and select the situation of control circuit SCOL to describe.In this case, the logical circuit output gray level grade that is shown in Figure 14 is selected data { 1}.The logical circuit that is shown in Figure 15 receives gray shade scale and selects data { 1} and with clock signal t
1Duty factor alternately export control signal S
0And control signal S
8Consequently, grayscale voltage V
0With grayscale voltage V
8By analog switch ASW
0And analog switch ASW
8With clock signal t
1Duty factor alternately export data line O to
n
The real data driver requires the number of selection control circuit SCOL to equal the number of data line.Like this, select the circuit size of control circuit SCOL to influence the chip size that the integrated circuit of data driver is housed to a great extent thereon.If select the size changing circuit of control circuit SCOL big, the cost of integrated circuit will increase.And if increased the figure place of video data in order to use a large amount of gray shade scales to show an image, then the circuit size of data driver will further increase.This has increased the size and the production cost of integrated circuit equally.
Driving circuit of the present invention is used to drive a display device, and described display device comprises pixel and be used for providing to pixel the data line of voltage, and its is according to the video data of being made up of multidigit, show an image with a plurality of gray shade scales.Described driving circuit comprises: oscillating voltage is determined device, its determines to have a signal in a plurality of oscillator signals of each different mutually duty factors according to containing the multidigit video data that is selected from a plurality of word bits, and be used for exporting fixed oscillator signal T and to determined oscillator signal T carry out paraphase and oscillator signal T; Grayscale voltage is determined device, it produces grayscale voltage according to the vision signal of being made up of multidigit (not being made up of the position of selecting in a plurality of positions) and determines signal, first grayscale voltage and second grayscale voltage between a plurality of grayscale voltages of determining thus to be provided by the grayscale voltage feedway; With will determine that determined first grayscale voltage of signal and second grayscale voltage export the output unit of data line to by grayscale voltage according to oscillator signal T and oscillator signal T.
In one embodiment of this invention, described first grayscale voltage and the second gray scale gray shade scale are voltage adjacent in a plurality of grayscale voltages.
In another embodiment of the present invention, a plurality of oscillator signals comprise that duty factor was respectively 8: 0,7: 1, and 6: 2,5: 3,4: 4,3: 5, the oscillator signal of 2: 6 and 1: 7.
According to another aspect of the present invention, the driving circuit that is used for driving display device that its is equipped with comprises pixel and is used for providing to pixel the data line of voltage, it according to multiword digital video data, use a plurality of gray shade scales to come display image.Driving circuit comprises: according to the control signal generating means of a plurality of control signals of video signal generating that contain a plurality of word bits; With a plurality of switchgears, with in corresponding one and a plurality of grayscale voltages that produce by the grayscale voltage generating means in a plurality of control signals corresponding one offer each switchgear in a plurality of switchgears, according to control signal, to provide the grayscale voltage of switchgear to export data line to by switchgear, wherein the control signal generating means comprises: oscillating voltage is determined device, its determines to have signal in a plurality of oscillator signals of each different mutually duty factors according to the video data of being made of the word bit that is selected from a plurality of word bits, and be used for exporting determined oscillator signal T and to determined oscillator signal T carry out paraphase and must oscillator signal T; Grayscale voltage is determined device, and its determines signal according to produced first grayscale voltage in definite a plurality of grayscale voltages and the grayscale voltage of second grayscale voltage by the video data of having selected the word bit in position to form in multidigit; And output unit, first control signal of its output to be determining that the roughly the same duty factor of the oscillator signal T of one of switchgear of first grayscale voltage that signal is determined vibrates with transporting to be added with on it by grayscale voltage, and second control signal of output determines that to be added with on it by grayscale voltage with input the roughly the same duty factor of the oscillator signal T of one of switchgear of second grayscale voltage that signal is determined vibrates.
In one embodiment of the invention, described first grayscale voltage and second grayscale voltage are voltage adjacent in a plurality of grayscale voltages.
In another embodiment of the present invention, described a plurality of oscillator signals comprise that duty factor was respectively 8: 1,7: 1, and 6: 2,5: 3,4: 4,3: 5, the oscillator signal of 2: 6 and 1: 7.
In another embodiment of the present invention, described switchgear is an analog switch.
According to driving circuit of the present invention, in a plurality of grayscale voltages, select (determining) a pair of grayscale voltage, and in definite a plurality of oscillator signals one.The voltage signal of driving circuit output vibrates between determined a pair of grayscale voltage with the oscillation frequency of determined oscillator signal.The gray shade scale that therefore, a plurality of interpolations can be provided between a plurality of grayscale voltages that provide.
According to driving circuit of the present invention, determine that by using grayscale voltage device and oscillator signal determine device, directly export one of a plurality of grayscale voltages and driving circuit at driving circuit and alternately export under the determined a pair of grayscale voltage both of these case, total energy realizes that the image of a plurality of gray shade scales shows.
Correspondingly, directly export one of a plurality of grayscale voltages and driving circuit at driving circuit and alternately export under the situation of definite a pair of grayscale voltage, need not additionally to increase driving circuit.Consequently, simplify the structure of driving circuit, and can reduce the size of driving circuit as far as possible.
Therefore, the advantage of invention described here is that the driving circuit that is used for display device that is provided has the small-scale structure of having simplified, and can come display image with a plurality of gray shade scales according to the multidigit video data.
Through reading with reference to accompanying drawing and understanding the following detailed description, those skilled in the art can understand various advantages of the present invention.
Fig. 1 is the synoptic diagram that shows the structure of liquid crystal indicator.
Fig. 2 is the timing diagram that has shown horizontal scanning period interior input data, a sampling pulse and exported interpulse relation.
Fig. 3 shows the timing diagram of the relation between input data in the vertical-scan period, output pulse, output voltage and strobe pulse.
Fig. 4 showed in a vertical-scan period, input data, output pulse, output voltage, strobe pulse and be added in the timing diagram of the relation between voltage on the pixel.
Fig. 5 shows the oscillogram of the output voltage that vibrates in an output cycle.
Fig. 6 is the synoptic diagram according to the part-structure of data driver in the driving circuit of an example of the present invention.
Fig. 7 is a synoptic diagram of selecting the part-structure of control circuit SCOL in the driving circuit of one example according to the present invention.
Fig. 8 is a synoptic diagram of selecting control circuit SCOL another part structure in the driving circuit of one example according to the present invention.
Fig. 9 is a synoptic diagram of selecting the another part-structure of control circuit SCOL in the driving circuit of one example according to the present invention.
Figure 10 is a synoptic diagram of selecting a part of structure again of control circuit SCOL in the driving circuit of one example according to the present invention.
Figure 11 is the synoptic diagram of the part-structure of data driver in the conventional driving circuit.
Figure 12 shows the synoptic diagram of the part-structure of data driver in the driving circuit of correlative technology field.
Figure 13 shows and is added in the signal t that selects on the control circuit SCOL
1-t
4Waveform.
Figure 14 shows the synoptic diagram of selecting the part-structure of control circuit SCOL in the conventional driving circuit.
Figure 15 shows the synoptic diagram of selecting another part structure of control circuit SCOL in the conventional driving circuit.
Below will be with reference to the accompanying drawings present invention is described in the mode of diagram example.In the following description, with the example of matrix liquid crystal display device as display device.Be appreciated that the present invention also is applicable to the display device of other pattern.
Fig. 1 shows the structure of matrix liquid crystal display device.Liquid crystal indicator shown in Figure 1 comprises the display part 100 of display video image, the driving circuit 101 of driving display part 100.Driving circuit 101 comprises to display part 100 provides the data driver 102 of vision signal and the scanner driver 103 that display part 100 provides sweep signal.Data driver can be described as " Source drive " or " row driver ".Scanner driver can be called as " gate driver " or " line driver ".
Among Fig. 1, with each output terminal S(i of N data lines 106 with data driver 102) (i=1,2 ..., N) be connected to corresponding on-off element 105.Similarly, with each output terminal G(j of M root sweep trace 107 with scanner driver 103) (j=1,2 ..., M) be connected to on-off element 105.On-off element 105 can adopt thin film transistor (TFT) (TFT).As a kind of replacement, can use the on-off element of other type.Data line can be described as " source line " or " alignment ".Sweep trace can be described as " select lines " or " line ".
As output terminal G(j by scanner driver 103) when the voltage that exports sweep trace 107 to is high level, be connected to output terminal G(j) on-off element 105 be in " opening " state.When on-off element 105 is in " opening " state, according to output terminal S(j by data driver 102) export the voltage of corresponding data line 106 to, to pixel 104 chargings that are connected to on-off element 105, voltage through such pixel 104 of charging remained unchanged in an about vertical-scan period, till the next voltage that is provided by data driver 102 charges once more to it.
Fig. 2 shows by horizontal scanning synchronizing signal H
SynDigital of digital video data DA, sampling pulse T during j the horizontal scanning period jH that determines
SmpiAnd the relation between output pulse signal OE.As appreciable, as sampling pulse T by Fig. 2
Smp1, T
Smp2..., T
Smpi..., and T
SmpNWhen sequentially being added to data driver 102, correspondingly with digital of digital video data DA
1, DA
2, DA
i, and DA
NFeed-in data driver 102 will be exported pulse OE by j that output pulse signal OE determines subsequently
jAdd to data driver 102.Data driver 102 1 receives j output pulse OE
j, just from its output terminal S(i) the extremely corresponding data line 106 of output voltage.
Fig. 3 shows by vertical scan synchronization signal V
SynHorizontal scanning synchronizing signal H during the vertical-scan period of determining
Syn, the relation between digital of digital video data DA, output pulse signal OE, data driver 102 output times and the scanner driver 103.Among Fig. 3, use as shown in Figure 2 timing and according to the digital of digital video data that during horizontal scanning period jH, is provided, use SOURCE(j) represented level range by data driver 102 output voltages.Rectangular area with the band shade illustrates SOURCE(j), thereby expression is by all N output terminal S(1 of data driver 102) to S(N) level range of output voltage.Will be by SOURCE(j) when the voltage of expression is added on the data line 106, j output terminal G(j by scanner driver 103) voltage that exports j root sweep trace 107 to is changed and remains on the high level, thereby connects all N on-off element 105 that is connected to j root scanning 107.Consequently, according to the voltage that adds to corresponding data line 106 by data driver 102, N the pixel 104 that is connected to this N on-off element 105 respectively charged.
Said process repeats M time, that is, from first to M root sweep trace 107, thereby demonstrate image corresponding to a vertical-scan period.In non-interlace type display device, the image that is produced presents a complete display image on its display screen.
In the present technique standard, j output pulse OE among the output pulse signal OE
jWith (j+1) individual output pulse OE
J+1Between the time interval be defined as " an output cycle ".This means that an output cycle equals by the SOURCE(j shown in Fig. 3) represented one-period.When carrying out common capable sequential scanning, should make an output cycle equal a horizontal scanning period.Its reason is presented below.When data driver 102 was exported the digital of digital video data of going corresponding to a level (scanning), it was similarly the sampling that next horizontal scan line is carried out digital of digital video data for data line 106.It is a horizontal scanning period that these voltages can allow time span from the maximum between data driver 102 period of output.And, except that special circumstances, because the output cycle is longer, so can charge to pixel more accurately.Therefore, in the described here driving circuit, an output cycle equals a horizontal scanning period.Yet,, and do not require that an output cycle must equal a horizontal scanning period according to the present invention.
Except the timing that is shown in Fig. 2 and each signal of Fig. 3, Fig. 4 show according to this timing relationship be added in pixel p (j, i) (j=1,2 ..., the M) voltage level on.
Fig. 5 shows the typical wave mode that is exported to the voltage signal of data line 106 in an output cycle by data driver 102.In the routine data driver, the voltage level that exports the voltage signal of data line 106 to is constant in an output cycle.On the other hand, in this example according to the present invention, the voltage signal that is exported to data line 106 by data driver 102 is included in the oscillating component of vibrating during the output cycle.As shown in Figure 5, described voltage signal is the signal of a pulse pattern, and with hereinafter described method to the ratio of high level period with low-level period, i.e. dutycycle n: m selects.
Fig. 6 shows the part-structure figure of data driver 102 in the driving circuit 101.Circuit shown in 6 is by n output terminal S(n) export a vision signal to data line 106.Described data driver 102 comprises the same number of circuit 60 of the data line 106 that its number and display part 100 are provided.Here suppose that video data contains 6 word bit (D
0, D
1, D
2, D
3, D
4, D
5).On the basis of this assumption, video data can have 64 kinds of numerical value of value 0-63, and the signal voltage that is added on each pixel is 9 grayscale voltage V
0, V
8, V
16, V
24, V
32, V
40, V
48, V
56And be selected from V
0, V
8, V
16, V
24, V
32, V
40, V
48, V
56And V
64In arbitrary interpolation voltage that grayscale voltage is produced in one.
Sample trigger device M
SMPWith maintenance trigger M
HCan adopt for example such trigger of D type.Be appreciated that this sampling and keep trigger also can adopt the circuit component of other pattern to make.
Next with reference to Fig. 6 the principle of work of circuit 60 is described.At sampling pulse T corresponding to n pixel
SMPnRising edge, sample trigger device M
SMPObtain video data (D
0, D
1, D
2, D
3, D
4, D
5) and keep this video data therein.After the video data sampling of having finished a horizontal cycle, output pulse signal OE is added in maintenance trigger M
HOn.When output pulse signal OE is provided, remain on sample trigger device M
SMPIn video data presented the people and kept trigger M
HAnd export to and select control circuit SCOL.Select control circuit SCOL receiving video data and produce a plurality of control signals according to the video data value.Control signal is used to change each analog switch ASW
0-ASW
8Open/close state.Use d
0, d
1, d
2, d
3, d
4And d
5Expression inputs to the video data of selecting control circuit SCOL, and uses S
0, S
8, S
16, S
24, S
32, S
40, S
48, S
56And S
64Expression is by the control signal of selecting control circuit SCOL output.
Table 2 shows low three d of 6 digital video data
2, d
1And d
0Logical table.The the 1st to the 3rd row of table 2 are represented video data position d respectively
2, d
1And d
0Value.The the 4th to the 11st tabulation of table 2 is shown by oscillator signal t
0-t
7In determined that oscillator signal.At the 4th to the 11st row of table 2, determined by the represented oscillator signal of value 1.For example, as (d
2, d
1, d
0)=(0,0,0) time, determined oscillator signal t
0In this example, oscillator signal t
0-t
7) be respectively that its duty factor is 8: 0,7: 1,6: 2,5: 3,4: 4,3: 5, the clock signal of 2: 6 and 1: 7.Here, if the duty factor of oscillator signal is K: 0 or 0: K(K is a natural number), then oscillator signal is decided to be and always is on the fixing level.Oscillator signal t
5, t
6And t
7Be by to oscillator signal t
3, t
2And t
1Carry out resulting signal after the paraphase.
Table 2
Can obtain following logical formula by the logical table shown in the table 2.
T＝（0）t
0+（1）t
1+（2）t
2+（3）t
3+（4）t
4+（5）t
5+（6）t
6+（7）t
7…（6）
In following formula, (i) expression is with the binary data (d of decimal system expression
2, d
1, d
0) value, that is, and (0)=(d
2, d
1, d
0)=(0,0,0), (1)=(d
2, d
1, d
0)=(0,0,1), (2)=(d
2, d
1, d
0)=(0,1,0), (3)=(d
2, d
1, d
0)=(0,1,1), (4)=(d
2, d
1, d
0)=(1,0,0), (5)=(d
2, d
1, d
0)=(1,0,1), (6)=(d
2, d
1, d
0)=(1,1,0) and (7)=(d
2, d
1, d
0)=(1,1,1).
Oscillator signal t
0Be in level " 1 " constantly, therefore as a kind of replacement, the available following formula of following formula (6) is represented.
T＝（0）+（1）t
1+（2）t
2+（3）t
3+（4）t
4+（5）t
5+（6）t
6+（7）t
7…（7）
Table 3 is the Senior Three position d that represented 6 digital video data
5, d
4, d
3With control signal S
0, S
8, S
16, S
24, S
32, S
40, S
48, S
56, S
64Between the relation logical table.In the table 3, variable T represents the signal T that made by equation (6) and (7).Variable T represents by signal T being carried out the negate signal T that paraphase obtains.
Table 3
Can obtain following logical equation by the logical table shown in the table 3.
S
0＝[0]T …（8）
S
8＝[0]"T"+[8]T …（9）
S
16＝[8]"T"+[16]T …（10）
S
24＝[16]"T"+[24]T …（11）
S
32＝[24]"T"+[32]T …（12）
S
40＝[32]"T"+[40]T …（13）
S
48＝[40]"T"+[48]T …（14）
S
56＝[48]"T"+[56]T …（15）
S
64＝[56]"T" …（16）
In the following formula formula, (i) expression binary data (d
5, d
4, d
3) value, wherein i=(8 * j), j is the binary data (d that decimally represents
5, d
4, d
3) value.For example, (8)=(d
5, d
4, d
3)=(0,0,1).In addition, " T " expression is carried out the signal that obtains after the paraphase to signal T.
According to each logical formula mentioned above, can obtain Fig. 7 to logical circuit 70,80,90 to 95 shown in Figure 10.Select control circuit SCOL to constitute by for example logical circuit shown in Fig. 7 to Figure 10 70,80,90 and 95.
Logical circuit 70 shown in Fig. 7 is according to low 3 d of video data
2, d
1And d
0Optionally output is used for determining a plurality of oscillator signal t
0-t
7One of oscillator signal, to determine signal (0)-(7).More particularly, with video data d
2, d
1And d
0The reversed phase signal that carries out paraphase and obtain respectively constitutes the array mode input AND circuit AG of 0-7 to adopt binary representation
0-AG
7So just, obtained as AND circuit AG
0-AG
7The oscillator signal of definite signal (0)-(7) of output.
Logical circuit 90 shown in Fig. 9 is according to the Senior Three position d of video data
5, d
4And d
3Output is used for from a plurality of grayscale voltages determining that the grayscale voltage of a pair of grayscale voltage determines signal (0), (8), (16), (24), (32), (40), (48), and (56) selectively.More specifically say, with video data d
5, d
4And d
3And use phase inverter INV
4-INV
6To video data d
5, d
4And d
3The reversed phase signal that carries out obtaining respectively after the paraphase constitutes the array mode input AND circuit DG of 0-7 to adopt binary representation
0-DG
7Obtain as AND circuit DG
0-DG
7The grayscale voltage of output determine signal (0), (8), (16), (24), (32), (40), (48) and (56).
Logical circuit 95 shown in Figure 10 is determined signal (0) according to grayscale voltage, (8), and (16), (24), (32), (40), (48) and (56), oscillator signal T and paraphase oscillator signal T export control signal S selectively
0-S
64More particularly, respectively grayscale voltage is determined signal (0), (8), (16), (24), (32), (40), (48), (56) and oscillator signal T input AND circuit EG
0, EG
2, EG
4, EG
6, EG
8, EG
10, EG
12And EG
14Respectively grayscale voltage is determined signal (0), (8), (16), (24), (32), (40), (48), (56) and paraphase oscillator signal T input AND circuit EG
1, EG
3, EG
5, EG
7, EG
9, EG
11, EG
13And EG
15AND circuit EG
1And EG
2Output be connected to OR circuit FG respectively
1Input end.AND circuit EG
3And EG
4Output be connected to OR circuit FG respectively
2Input end.AND circuit EG
5And EG
6Output terminal be connected to OR circuit FG respectively
3AND circuit EG
7And EG
8Output terminal be connected to OR circuit FG respectively
4Input end.AND circuit EG
9And EG
10Output terminal be connected to OR circuit FG respectively
5Input end.AND circuit EG
11And EG
12Output terminal be connected to OR circuit FG respectively
6Input end.AND circuit FG
13And FG
14Output terminal be connected to OR circuit FG respectively
7Input end.Obtain as AND circuit EG
0, OR circuit FG
1-FG
7And AND circuit EG
15The control signal S of output
0, S
8, S
16, S
24, S
32, S
40, S
48, S
56And S
64
Control signal S
0, S
8, S
16, S
24, S
32, S
40, S
48, S
56And S
64Be added to corresponding analog switch ASW
0-ASW
80Each control signal S
0, S
8, S
16, S
24, S
32, S
40, S
48, S
56And S
64Equal any in high value or the low level value.For example, if control signal is in high level, be in " opening " state by corresponding analog switch.Relative controlled being in of analog switch " pass " state if control signal is in low level.As a kind of replacement, the relation between the open/close state of the level of control signal and analog switch can be arranged to opposite mode.
As mentioned above, when video data contains multidigit, can determine the waveform of oscillating voltage according to containing at least one the video data of from the multiword position, selecting.Then, can be according to by except that above-mentioned other video data of forming of position definite a pair of grayscale voltage from a plurality of grayscale voltages of having selected.Consequently, for the exportable voltage signal of each value of video data with appropriate level.With oscillating voltage realize from a plurality of grayscale voltages determining determining grayscale voltage to the interpolation grayscale voltage.
When the value of video data is 8 multiple, in only exportable a plurality of grayscale voltages one.Here, the duty factor of oscillator signal or control signal is considered as K: 0 or 0: K(K is a natural number).
As a kind of replacement, whether the value of not considering video data is 8 multiple, can alternately export a pair of grayscale voltage of determining in a plurality of grayscale voltages.
As mentioned above, by Fig. 7 to logical circuit 70,80 shown in Figure 10,90 constituted according to selection control circuit SCOL of the present invention, with be shown in Figure 12, select control circuit SCOL to compare by the routine that Figure 14 and the logical circuit shown in 15 constitute, have the structure of more simplifying.According to the present invention, can by use one have more simplification structure driving circuit with a plurality of gray shade scales for example 64 gray shade scales show an image.For example, in order to come display image only to need 9 kinds of grayscale voltages with 64 gray shade scales.
Actual data driver requires the quantity of selection control circuit SCOL to equal the quantity of data line.Like this, the circuit size of selection control circuit SCOL has influenced the chip size of the integrated circuit (LSI) that data driver is housed to a great extent thereon.According to the present invention, can reduce to comprise the size of the integrated circuit of selecting control circuit SCOL significantly.Consequently reduced the production cost of integrated circuit.In order to show that with more gray shade scale thereby an image has increased under the situation of figure place of video data, the subminiaturization of the circuit size of this data driver has very big use value.Correspondingly, can reduce the size and the cost of integrated circuit further.
According to the present invention, can be by obtaining one or more interpolation voltage in the given level that voltage source provided, thus compare with the conventional driving circuit of a large amount of voltage sources of needs, can significantly reduce the quantity of voltage source.If the driving circuit outside provides voltage source, then can reduce the number of the input end of driving circuit.If driving circuit is constituted LSI, then can reduce the number of the input end of LSI.According to the present invention, can realize that the use multi-grayscale that can't realize owing to the increase of number of terminals in the example of prior art comes the driving LSI of display image.The present invention can obtain following effect: (1) greatly reduces the production cost of display device and driving circuit; (2) can produce easily since the factor such as be provided with of chip size or LSI can't actual production the multi-grayscale driving circuit; (3), thereby reduced power consumption owing to need not to use a large amount of voltage sources.
Those skilled in the art are appreciated that and easily the present invention are carried out various modifications, but these modifications all do not deviate from essential scope of the present invention.Correspondingly, the purpose of this paper and the scope that does not lie in appended claim are limited to the description that preamble is done, but are claim is carried out sensu lato elaboration.
Claims (7)
1, a kind of driving circuit that drives display device, described display device comprises pixel and the data line of voltage is provided to described pixel, it uses multi-grayscale to come display image according to the video data that contains a plurality of word bits, it is characterized in that described driving circuit comprises:
One of determine to have in a plurality of oscillator signals of each different mutually duty factors the oscillating voltage of a signal according to the video data of being made up of the word bit that is selected from a plurality of word bits and determine device, it is exported described fixed oscillator signal T and has determined that to described oscillator signal T carries out the oscillator signal T that obtains after the paraphase;
Determine that according to being created in by the video data of in described multiword position, having selected the word bit the position to form the grayscale voltage of signal determines device from the grayscale voltage of determining first grayscale voltage and second grayscale voltage between a plurality of grayscale voltages of grayscale voltage feedway; With
To determine that determined described first grayscale voltage of signal and described second grayscale voltage export the output unit of described data line to by described grayscale voltage according to described oscillator signal T and described oscillator signal T.
2, driving circuit as claimed in claim 1 is characterized in that, described first grayscale voltage and described second grayscale voltage are adjacent voltage in the described multi-grayscale voltage.
3, driving circuit as claimed in claim 1 is characterized in that, described a plurality of oscillator signals comprise that duty factor was respectively 8: 0,7: 1, and 6: 2,5: 3,4: 4,3: 5, the oscillator signal of 2: 6 and 1: 7.
4, a kind of driving circuit that drives display device, described display device comprises pixel and the data line of voltage is provided to described pixel, it comes display image according to the video data that contains the multiword position, use multi-grayscale, it is characterized in that described driving circuit comprises:
Produce the control signal generating means of a plurality of control signals according to the video data that contains a plurality of word bits; With
A plurality of switchgears, in described a plurality of switchgears each a corresponding signal in described a plurality of control signal is provided and a plurality of grayscale voltages of producing by the grayscale voltage generating means in a corresponding voltage, according to described control signal, the grayscale voltage that will be added on the described switchgear by described switchgear exports described data line to
Wherein, described control signal generating means comprises:
Oscillating voltage according to one of a plurality of oscillator signals of being determined to have each different mutually duty factors by the video data formed of position that is selected from described a plurality of word bits is determined device, and it is exported described fixed oscillator signal T and described definite oscillator signal T is carried out paraphase and the oscillator signal T that obtains;
According to by in described multiword position, having selected the video signal generating formed of word bit the position to determine that the grayscale voltage of first grayscale voltage in the described multi-grayscale voltage and second grayscale voltage determines that the grayscale voltage of signal determines device; With
Output to be being added with the output unit of being determined first control signal that the roughly the same duty factor of the described oscillator signal T of one of described switchgear of determined described first grayscale voltage of signal is vibrated by described grayscale voltage on it with input, and its output is determined second control signal that the roughly the same duty factor of the described oscillator signal T of one of described switchgear of determined described second grayscale voltage of signal is vibrated to be added with on it by described grayscale voltage with input.
5, driving circuit as claimed in claim 4 is characterized in that, described first grayscale voltage and described second grayscale voltage are adjacent voltage in the described multi-grayscale voltage.
6, driving circuit as claimed in claim 4 is characterized in that, described a plurality of oscillator signals comprise that duty factor was respectively 8: 0,7: 1, and 6: 2,5: 3,4: 4,3: 5, the oscillator signal of 2: 6 and 1: 7.
7, driving circuit as claimed in claim 4 is characterized in that, described switchgear is an analog switch.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP113465/93 | 1993-05-14 | ||
| JP113465/1993 | 1993-05-14 | ||
| JP11346593 | 1993-05-14 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1099177A true CN1099177A (en) | 1995-02-22 |
| CN1065059C CN1065059C (en) | 2001-04-25 |
Family
ID=14612937
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 94105695 Expired - Fee Related CN1065059C (en) | 1993-05-14 | 1994-05-12 | Driving circuit for display apparatus |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0624862B1 (en) |
| KR (1) | KR0127102B1 (en) |
| CN (1) | CN1065059C (en) |
| DE (1) | DE69419070T2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1322485C (en) * | 2002-12-11 | 2007-06-20 | Lg.飞利浦Lcd有限公司 | Apparatus and method for generating gamma voltage |
| CN100533528C (en) * | 1997-02-17 | 2009-08-26 | 精工爱普生株式会社 | Display device |
| CN100583208C (en) * | 1997-02-17 | 2010-01-20 | 精工爱普生株式会社 | Display device |
| CN101364395B (en) * | 2004-11-12 | 2012-04-04 | 三星电子株式会社 | Display device and driving method thereof |
| CN101136195B (en) * | 2003-03-10 | 2012-10-17 | 瑞萨电子株式会社 | Drive circuit for display apparatus with selective inactivation of amplifier units for reducing power consumption |
| US8810606B2 (en) | 2004-11-12 | 2014-08-19 | Samsung Display Co., Ltd. | Display device and driving method thereof |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5673061A (en) * | 1993-05-14 | 1997-09-30 | Sharp Kabushiki Kaisha | Driving circuit for display apparatus |
| TW306998B (en) * | 1993-11-26 | 1997-06-01 | Sharp Kk | |
| JPH08115060A (en) * | 1994-10-14 | 1996-05-07 | Sharp Corp | Driving circuit for display device and liquid crystal display device |
| JP3517503B2 (en) * | 1995-12-21 | 2004-04-12 | 株式会社日立製作所 | Driver circuit for TFT liquid crystal display |
| KR100593670B1 (en) * | 1999-08-25 | 2006-06-28 | 삼성전자주식회사 | Decoding circuit for selecting gradation voltage of source driver of thin film transistor liquid crystal display |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2642204B2 (en) * | 1989-12-14 | 1997-08-20 | シャープ株式会社 | Drive circuit for liquid crystal display |
| KR960008104B1 (en) * | 1991-05-21 | 1996-06-19 | 샤프 가부시끼가이샤 | Display apparatus, a drive circuit for a display apparatus, and a method of driving a display apparatus |
| JPH05100635A (en) * | 1991-10-07 | 1993-04-23 | Nec Corp | Integrated circuit and method for driving active matrix type liquid crystal display |
-
1994
- 1994-04-28 EP EP19940303106 patent/EP0624862B1/en not_active Expired - Lifetime
- 1994-04-28 DE DE1994619070 patent/DE69419070T2/en not_active Expired - Fee Related
- 1994-05-03 KR KR1019940009866A patent/KR0127102B1/en not_active IP Right Cessation
- 1994-05-12 CN CN 94105695 patent/CN1065059C/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100533528C (en) * | 1997-02-17 | 2009-08-26 | 精工爱普生株式会社 | Display device |
| CN100583208C (en) * | 1997-02-17 | 2010-01-20 | 精工爱普生株式会社 | Display device |
| CN101105910B (en) * | 1997-02-17 | 2010-06-23 | 精工爱普生株式会社 | Display apparatus |
| CN1506929B (en) * | 1997-02-17 | 2010-09-01 | 精工爱普生株式会社 | Display device |
| CN1322485C (en) * | 2002-12-11 | 2007-06-20 | Lg.飞利浦Lcd有限公司 | Apparatus and method for generating gamma voltage |
| CN101136195B (en) * | 2003-03-10 | 2012-10-17 | 瑞萨电子株式会社 | Drive circuit for display apparatus with selective inactivation of amplifier units for reducing power consumption |
| CN101364395B (en) * | 2004-11-12 | 2012-04-04 | 三星电子株式会社 | Display device and driving method thereof |
| US8810606B2 (en) | 2004-11-12 | 2014-08-19 | Samsung Display Co., Ltd. | Display device and driving method thereof |
| US9058787B2 (en) | 2004-11-12 | 2015-06-16 | Samsung Display Co., Ltd. | Display device and driving method thereof |
| US9390669B2 (en) | 2004-11-12 | 2016-07-12 | Samsung Display Co., Ltd. | Display device and driving method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0624862B1 (en) | 1999-06-16 |
| DE69419070D1 (en) | 1999-07-22 |
| EP0624862A2 (en) | 1994-11-17 |
| DE69419070T2 (en) | 1999-11-18 |
| KR0127102B1 (en) | 1997-12-29 |
| EP0624862A3 (en) | 1995-05-17 |
| CN1065059C (en) | 2001-04-25 |
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