CN109904880B - Identification method for high output impedance of photovoltaic inverter - Google Patents
Identification method for high output impedance of photovoltaic inverter Download PDFInfo
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- CN109904880B CN109904880B CN201910227710.0A CN201910227710A CN109904880B CN 109904880 B CN109904880 B CN 109904880B CN 201910227710 A CN201910227710 A CN 201910227710A CN 109904880 B CN109904880 B CN 109904880B
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- Y02E10/56—Power conversion systems, e.g. maximum power point trackers
Abstract
The invention discloses a method for identifying high output impedance of a photovoltaic inverter, which can automatically match according to different impedances so as to output a high-quality power grid. The identification method comprises the following steps: A. the inverter enters a wait state to carry out grid-connected self-detection; B. sampling and accessing a voltage value of unknown inductance by taking a positive zero-crossing signal of a power grid as a reference; when the system is connected with unknown impedance, in 1/4 or 1/2 power grid periods in a Check state or a Normal state, acquiring power grid voltage values of two continuous beats and two continuous beats, filtering the power grid voltage values of the two beats, and calculating the difference value of the two beats, wherein if the difference value meets the following conditions: 1/4, if the grid period grid voltage difference is greater than NumA or 1/2 grid period grid voltage difference is greater than NumB, setting the high impedance flag bit to be 1; if the difference value is larger than the NumC, setting the high impedance flag bit as 2; C. and according to different high-impedance zone bits, introducing a virtual capacitor and adopting a virtual capacitor compensation algorithm to re-set the PI control loop of the inverter.
Description
Technical Field
The invention belongs to the field of photovoltaic inverters, and relates to a method for identifying high output impedance of a photovoltaic inverter.
Background
At present, in the photovoltaic inverter, especially in the distributed field, because the inverter and the alternating current transformer are far away from each other, a large inductance value is formed between long output AC lines, if the inverter cannot identify the working condition, the machine is easy to generate an overcurrent state, so that the power generation amount is low, and the serious inverter can be directly disconnected from the grid or cannot be connected to the grid for work. This problem is often more pronounced in remote village-level power stations.
Disclosure of Invention
In order to solve the above technical problems, an object of the present invention is to provide a method for identifying high output impedance of a photovoltaic inverter, which can perform automatic matching according to different impedances, so as to output a high-quality power grid.
In order to achieve the purpose, the invention adopts the technical scheme that:
a method for identifying high output impedance of a photovoltaic inverter comprises the following steps:
A. the inverter enters a wait state to carry out grid-connected self-detection, and the current high-impedance flag bit is cleared;
B. sampling and accessing a voltage value of unknown inductance by taking a positive zero-crossing signal of a power grid as a reference;
when the system is accessed to unknown inductance, in 1/4 or 1/2 power grid periods in a Check state or a Normal state, acquiring power grid voltage values of two continuous beats and two continuous beats, filtering the power grid voltage values of the two beats, and calculating the difference value of the two beats, wherein if the difference value meets the following conditions: 1/4, if the grid period grid voltage difference is greater than NumA or 1/2 grid period grid voltage difference is greater than NumB, setting the high impedance flag bit to be 1;
if the oscillation amplitude of the power grid is obviously increased in a Check state or a Normal state, firstly setting a high-impedance flag bit to be 1, then comparing the voltage variation of two beats before and after in 1/2 power grid periods, similarly filtering and calculating the difference value again, and if the difference value is larger than NumC, setting the high-impedance flag bit to be 2;
the NumA, NumB and NumC are bases for determining which high-impedance flag bit, the larger the accessed impedance is, the larger the Num value is theoretically, and if the accessed impedance is smaller, the vibration of the power grid may not be obvious, so that under the condition that the high-impedance flag is 1, 1/4 cycles (corresponding to NumA) and 1/2 cycles (corresponding to NumB) judgment mechanisms are introduced. The acquisition method of the Num value: when unknown impedance is accessed, the sampled power grid voltage accessed to different impedances is obtained by programming an upper computer program and is obtained by compensating a certain margin. The analysis theoretically relates to the fuzzy control category.
C. And introducing a virtual capacitor which can be matched with the unknown inductance value according to different high-impedance zone bits, and re-setting the PI control loop of the inverter by adopting a virtual capacitor compensation algorithm.
Further, if the high impedance flag bit cannot be identified at the moment of grid connection, continuing the steps B and C; and if the identification is normal, keeping the state of the high-impedance flag bit identified in the step B to continue running.
Further, the high impedance flag is set according to different identified inductance values.
Further, in the step a, a check state is performed by countdown, and the high impedance flag, the 1/2 grid period grid voltage difference value and the 1/4 grid period grid voltage difference value are all zero;
said step B is performed when the countdown is over.
Further, in the step B, HPF filtering is performed on the collected grid voltage value.
Further, in the step C, if the high impedance flag bit is 1, a first virtual capacitor is introduced to adjust a PI control loop of the inverter; and if the high impedance flag bit is 2, introducing a second virtual capacitor and adjusting a PI control loop of the inverter.
Compared with the prior art, the invention has the following advantages by adopting the scheme:
a method for identifying high impedance output by a photovoltaic inverter can automatically match according to different impedances, introduce a virtual capacitor which can be matched with inductance, and reset an inverter PI control loop by adopting a virtual capacitor compensation algorithm, so that the output characteristic of the photovoltaic inverter is improved, and a high-quality power grid is output.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
FIG. 1 is a flow chart of a method of identifying high impedance output by a photovoltaic inverter according to the present application;
FIG. 2a is a graph showing the values of flag bit 1 and DeltaGridHalf when a 0.5MH impedance is switched in;
FIG. 2b is the voltage and current waveforms switched into a 0.5MH impedance;
FIG. 2c is an expanded view of FIG. 2 b;
FIG. 3a is a graph showing the values of flag bit 2 and DeltaGridHalf when a 3.0MH impedance is switched in;
FIG. 3b is a voltage and current waveform switched into a 3.0MH impedance;
fig. 3c is an expanded view of fig. 3 b.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings so that the advantages and features of the invention may be more readily understood by those skilled in the art. It should be noted that the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
The embodiment provides a method for identifying high impedance output by a photovoltaic inverter, which mainly comprises the following steps:
1. when the inverter enters the Wait state, the current high-impedance flag bit needs to be cleared, and the flag bit is set mainly for identifying different inductance values;
2. the identification process comprises the following steps: and taking the positive zero-crossing signal of the power grid as a reference, accessing a voltage AD value of unknown inductance through DSP sampling, and adopting a fuzzy control algorithm.
If the system is connected with unknown inductance, in 1/4 or 1/2 power grid cycles of a Check state or a Normal state, acquiring continuous front and back two-beat voltage AD values, calculating the difference value of the two-beat AD values after passing through HPF (high pass filtering), and if the difference value meets the following conditions: 1/4, the difference value of the grid voltage in the grid period is larger than NumA or the difference value of the grid voltage in the grid period is 1/2, namely Highimpieference =1, and at the moment, the access impedance is considered to be smaller than 1.5 Mh;
if the grid oscillation amplitude is obviously increased in the Check state or the Normal state, setting the high impedance =1, then comparing the AD variation of two beats before and after in 1/2 grid cycles, similarly filtering and calculating the difference again, if the value meets the requirement of being more than NumC, setting the high impedance =2, and then considering that the access impedance exceeds 1.5 Mh;
3. and (4) re-setting the PI control loop according to different high-impedance zone bits, and simultaneously providing the concept of using a virtual capacitance compensation algorithm to ensure that the PI control loop can be matched with unknown inductance value.
4. If the high-impedance flag bit cannot be identified at the moment of grid connection, continuing to step 2, and if the high-impedance flag bit is normally identified, keeping the state of the flag bit to continue running.
Fig. 1 shows a specific flow of the above-described identification method. Referring to fig. 1, the specific process of the identification method is as follows:
starting;
entering a wait state;
self-checking is carried out within 30 seconds by counting down, the high-impedance flag bit is zero, the difference value of 1/2 grid period grid voltage is zero, and the difference value of 1/4 grid period grid voltage is zero;
after the countdown is finished (namely, timer = 0), entering a check state or a normal state;
collecting voltage AD values of two continuous beats in front and back in 1/4 or 1/2 grid cycles of a Check state or a Normal state, calculating the difference value of the AD values of the two beats after HPF (high pass filtering), wherein the difference value of the grid voltage of 1/4 grid cycles is recorded as DeltaGridQuarter = (GridSampAD [0] -GridSampAD [1]), and the difference value of the grid voltage of 1/2 grid cycles is recorded as DeltaGridHalf = (GridSampAD [0] -GridSampAD [1 ]);
and carrying out fuzzy control according to the obtained difference, specifically:
when DeltaGridQuarter > NumA or DeltaGridHalf > NumB, setting Highimpieference = 1; introducing a first virtual capacitor C1, adjusting an inverter PI control loop, and repeatedly controlling to improve the output characteristics of the photovoltaic inverter;
when DeltaGridHalf > NumC, setting Highimpieference = 2; and a second virtual capacitor C2 is introduced to adjust the PI control loop of the inverter, so that the control is repeated, and the output characteristic of the photovoltaic inverter is improved.
Fig. 2a to 2c and fig. 3a to 3c show the test results of the identification method of the output impedance of the photovoltaic inverter according to the present invention when the impedances of 0.5MH and 3.0MH are switched in, respectively. It can be seen from the figure that different impedances are connected, the grid voltage also has different oscillations, and the representation in fig. 2a is that deltagridhaf is equal to 27765, and the high impedance flag bit 1 is set; in FIG. 3a, DeltaGridHalf equals 43326, setting the high impedance flag 2.
The above embodiments are merely illustrative of the technical ideas and features of the present invention, and are preferred embodiments, which are intended to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and not to limit the scope of the present invention. All equivalent changes or modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.
Claims (6)
1. A method for identifying high impedance output by a photovoltaic inverter is characterized by comprising the following steps:
A. the inverter enters a wait state to carry out grid-connected self-detection, and the current high-impedance flag bit is cleared;
B. sampling and accessing a voltage value of unknown inductance by taking a positive zero-crossing signal of a power grid as a reference;
when the system is accessed to unknown inductance, in 1/4 or 1/2 power grid periods in a Check state or a Normal state, acquiring power grid voltage values of two continuous beats and two continuous beats, filtering the power grid voltage values of the two beats, and calculating the difference value of the two beats, wherein if the difference value meets the following conditions: 1/4, if the grid period grid voltage difference is greater than NumA or 1/2 grid period grid voltage difference is greater than NumB, setting the high impedance flag bit to be 1;
if the oscillation amplitude of the power grid is obviously increased in a Check state or a Normal state, firstly setting a high-impedance flag bit to be 1, then comparing the voltage variation of two beats before and after in 1/2 power grid periods, similarly filtering and calculating the difference value again, and if the difference value is larger than NumC, setting the high-impedance flag bit to be 2;
C. according to different high-impedance zone bits, virtual capacitors which can be matched with unknown inductance values are introduced, and a virtual capacitor compensation algorithm is adopted to re-set the PI control loop of the inverter.
2. The identification method according to claim 1, characterized in that if the high impedance flag is not identified at the moment of grid connection, the steps B and C are continued; and if the identification is normal, keeping the state of the high-impedance flag bit identified in the step B to continue running.
3. The identification method according to claim 1, wherein the high impedance flag is set according to the identified inductance value.
4. The identification method according to claim 1, wherein in the step a, a check state is performed by counting down, and the high impedance flag, the 1/2 grid period grid voltage difference value and the 1/4 grid period grid voltage difference value are all zero;
said step B is performed when the countdown is over.
5. The identification method according to claim 1, wherein in step B, HPF filtering is performed on the collected grid voltage value.
6. The identification method according to claim 1, wherein in the step C, if the high impedance flag is 1, a first virtual capacitor is introduced to adjust an inverter PI control loop; and if the high impedance flag bit is 2, introducing a second virtual capacitor and adjusting a PI control loop of the inverter.
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| CN103401463A (en) * | 2013-07-25 | 2013-11-20 | 天津大学 | Miniature photovoltaic grid-connected inverter with optimized DC (Direct Current) bus capacitor and control method |
| EP2672621A1 (en) * | 2012-06-07 | 2013-12-11 | ABB Research Ltd. | Method for zero-sequence damping and voltage balancing in a three-level converter with spilt dc-link capacitors and virtually grounded LCL filter |
| CN104104255A (en) * | 2014-08-07 | 2014-10-15 | 江苏兆伏新能源有限公司 | Photovoltaic inverter inductance compensation control method |
| CN104158220A (en) * | 2014-08-28 | 2014-11-19 | 哈尔滨工业大学 | Method for controlling virtual reactance of photovoltaic grid-connected inverter |
| CN108880316A (en) * | 2018-07-17 | 2018-11-23 | 西安理工大学 | The grid-connection converter Predictive Control System and control method of compensation with voltage |
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| US9088178B2 (en) * | 2006-12-06 | 2015-07-21 | Solaredge Technologies Ltd | Distributed power harvesting systems using DC power sources |
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|---|---|---|---|---|
| EP2672621A1 (en) * | 2012-06-07 | 2013-12-11 | ABB Research Ltd. | Method for zero-sequence damping and voltage balancing in a three-level converter with spilt dc-link capacitors and virtually grounded LCL filter |
| CN103401463A (en) * | 2013-07-25 | 2013-11-20 | 天津大学 | Miniature photovoltaic grid-connected inverter with optimized DC (Direct Current) bus capacitor and control method |
| CN104104255A (en) * | 2014-08-07 | 2014-10-15 | 江苏兆伏新能源有限公司 | Photovoltaic inverter inductance compensation control method |
| CN104158220A (en) * | 2014-08-28 | 2014-11-19 | 哈尔滨工业大学 | Method for controlling virtual reactance of photovoltaic grid-connected inverter |
| CN108880316A (en) * | 2018-07-17 | 2018-11-23 | 西安理工大学 | The grid-connection converter Predictive Control System and control method of compensation with voltage |
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