CN109904289A - LED and preparation method thereof based on superlattices potential barrier quantum well structure - Google Patents

LED and preparation method thereof based on superlattices potential barrier quantum well structure Download PDF

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CN109904289A
CN109904289A CN201910235635.2A CN201910235635A CN109904289A CN 109904289 A CN109904289 A CN 109904289A CN 201910235635 A CN201910235635 A CN 201910235635A CN 109904289 A CN109904289 A CN 109904289A
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CN109904289B (en
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董海亮
贾志刚
关永莉
梁建
米洪龙
许并社
陈永寿
陕志芳
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Liu Songlin
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SHANXI FEIHONG MICRO-NANO PHOTOELECTRONICS &TECHNOLOGY Co Ltd
Taiyuan University of Technology
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Abstract

The present invention provides a kind of LED and preparation method thereof based on superlattices potential barrier quantum well structure, belongs to technical field of semiconductors.It include: Sapphire Substrate;GaN forming core layer above Sapphire Substrate;Undoped GaN layer above GaN forming core layer;N-type GaN layer above undoped GaN layer;Quantum well region above n-type GaN layer, quantum well region include first area and the second area in 3~10 periods in 8~15 periods from bottom to up, and first area includes the superlattices Al in 3~10 periods set from bottom to upxInyGa1‑x‑yN/GaN barrier layer and InGaN potential well layer, second area include the Al in 3~10 periodsxInyGa1‑x‑yN/GaN barrier layer;P-type AlGaN electronic barrier layer above second area;P-type GaN layer above p-type AlGaN electronic barrier layer;Contact electrode layer above p-type GaN layer.The embodiment of the present invention improves the injection efficiency of electrons and holes and increases the constraint ability to electronics, reduces electronics leakage, increases the radiation recombination efficiency of electrons and holes.

Description

LED and preparation method thereof based on superlattices potential barrier quantum well structure
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of LED based on superlattices potential barrier quantum well structure and Preparation method.
Background technique
Currently, LED (Light Emitting Diode, light emitting diode) has become the important composition portion of energy-saving illumination Point, it is substituted traditional incandescent lamp and fluorescent lamp bulb in many places, the extensive concern by various countries scientific and technical personnel.Through passing away The effort of various countries, boundary is studied, and the luminous efficiency of present LED has significantly improved.
Current LED include Sapphire Substrate, GaN forming core layer, undoped with type GaN layer, n-type GaN layer, GaN (AlGaN)/ The quantum well region InGaN, p-type AlGaN electronic barrier layer, p-type GaN layer and contact electrode layer.Although the LED of this structure is to LED Luminous efficiency improve, but the high indium content in this kind of quantum well region structure LED can not only generate a large amount of mismatches Dislocation and very big piezoelectric polarization effect also make quantum well layer and increase with the lattice mismatch of barrier layer;Also increase simultaneously Electronics leakage rate, to improve non-radiative recombination probability, thus reduces internal quantum efficiency and luminous efficiency.
The conventional method of raising LED internal quantum efficiency and luminous efficiency has doping GaN potential barrier and quantum well region potential well is super The method of lattice structure.Although these methods are added to superlattices potential well layer in traditional quantum well structure, to a certain extent Reduce lattice mismatch, while also increasing the injection efficiency in hole in Quantum Well, hole concentration increases, to improve interior amount Sub- efficiency, is very significantly improved luminous efficiency, but there is no the leakages for reducing electronics in Quantum Well.In addition, though passing The AlGaN potential barrier of system can provide higher potential barrier to limit the leakage of carrier in Quantum Well.However, due to AlGaN/ Lattice mismatch ratio GaN/InGaN's between InGaN is big, and therefore, AlGaN potential barrier can generate stronger pole in the active areas Change effect, the Quantum Confined Stark effect enhancing of LED component, wavelength temperature is deteriorated.
Summary of the invention
In order to solve the problems, such as that current LED is low there are the injection efficiency in the hollow cave of active layer and electronics leakage is high, this hair It is bright that a kind of LED and preparation method thereof based on superlattices potential barrier quantum well structure is provided.
In order to solve the above technical problems, the technical solution adopted by the present invention is that:
A kind of LED based on superlattices potential barrier quantum well structure comprising:
Sapphire Substrate;The GaN forming core layer being set to above Sapphire Substrate;It is set to not mixing above GaN forming core layer Miscellaneous GaN layer;The n-type GaN layer being set to above undoped GaN layer;It is set to the quantum well region above n-type GaN layer, it is described Quantum well region includes first area and the second area in 3~10 periods in 8~15 periods from bottom to up, and the first area includes The superlattices Al in 3~10 periods being arranged from bottom to upxInyGa1-x-yN/GaN barrier layer and InGaN potential well layer, secondth area Domain includes the Al in 3~10 periodsxInyGa1-x-yN/GaN barrier layer;The p-type AlGaN electronic blocking being set to above second area Layer;The p-type GaN layer being set to above p-type AlGaN electronic barrier layer;The contact electrode layer being set to above p-type GaN layer.
Optionally, the n-type GaN layer is the n-type GaN layer of Si doping.
Optionally, the p-type GaN layer is the p-type GaN layer of Mg doping.
Optionally, the Sapphire Substrate with a thickness of 300~400 μm;The GaN forming core layer with a thickness of 20~ 30nm;The undoped GaN layer with a thickness of 1.5~2.5 μm;The n-type GaN layer with a thickness of 1~2 μm;Each period Superlattices AlxInyGa1-x-ySuperlattices Al in N/GaN barrier layerxInyGa1-x-yN barrier layer with a thickness of 3~10nm, superlattices GaN layer with a thickness of 3~10nm, the InGaN potential well layer with a thickness of 3~10nm;The p-type AlGaN electronic barrier layer With a thickness of 40~80nm;The p-type GaN layer with a thickness of 200~300nm;The contact electrode layer with a thickness of 50~ 100nm。
Optionally, the superlattices AlxInyGa1-x-yIn N/GaN barrier layer, 0 < x < 0.5,0 < y < 0.5, and from N-shaped GaN The numerical value of layer to p-type AlGaN electronic barrier layer direction x are incremented by, the number decrements of y.
A kind of preparation method of the LED based on superlattices potential barrier quantum well structure comprising:
S1, at a temperature of 900~1200 DEG C, in H2Impurity first is carried out to the surface of patterned Sapphire Substrate in atmosphere Or 300~500s of reduction treatment of oxide, then to treated, sapphire substrate surface carries out nitrogen treatment, obtains blue treasured Stone lining bottom;
S2 uses trimethyl gallium for gallium source, NH3For nitrogen source, H2For carrier gas, the growth temperature for controlling reaction chamber is 400~ 900 DEG C, growth time be 100~200s, pressure is 500~700mbar, the growth of sapphire substrate surface after nitrogen treatment Initial GaN nucleating layer, and 150~250s of initial GaN nucleating layer annealing is formed under conditions of temperature is 1000~1200 DEG C GaN nucleating layer;
S3 uses trimethyl gallium for gallium source, NH3For nitrogen source, H2For carrier gas, the growth temperature for controlling reaction chamber is 1000~ 1200 DEG C, growth time be 3400~3800s, pressure is 500~700mbar, GaN nucleation layer surface growth it is undoped GaN layer;
S4 uses trimethyl gallium for gallium source, SiH4For silicon source, NH3For nitrogen source, H2For carrier gas, the growth temperature of reaction chamber is controlled Degree is 1000~1200 DEG C, growth time is 1700~1900s, pressure is 500~700mbar, on undoped GaN layer surface Grow the n-type GaN layer of Si doping;
S5, including 5.1,5.2 and 5.3;5.1, use triethyl-gallium for gallium source, trimethyl aluminium is silicon source, and TMln is indium source, NH3For nitrogen source, N2For carrier gas, the growth temperature for controlling reaction chamber is 800~900 DEG C, growth time is 200~400s, pressure is 300~500mbar grows superlattices Al on n-type GaN layer surfacexInyGa1-x-yN barrier layer;5.2, use triethyl-gallium for gallium source, NH3For nitrogen source, N2For carrier gas, the growth temperature for controlling reaction chamber is 800~900 DEG C, growth time is 250~350s, pressure is 300~500mbar, in superlattices AlxInyGa1-x-ySuperlattices GaN layer is grown in N barrier layer;5.3, it repeats 3~10 times 5.1 With 5.2;
S6, using triethyl-gallium as gallium source, TMln is indium source, NH3For nitrogen source, N2For carrier gas, the growth temperature of reaction chamber is controlled For 700~800 DEG C, growth time be 150~250s, pressure is 300~500mbar, on the superlattices GaN layer surface of top layer Grow InGaN potential well layer;
S7 repeats 8~15 S5 and S6;
S8 continues 3~10 times 5.1 and 5.2 in the InGaN potential well layer surface of top layer, obtains quantum well region;
S9 uses trimethyl gallium for gallium source, and trimethyl aluminium is silicon source, and two luxuriant magnesium are magnesium source, NH3For nitrogen source, N2For carrier gas, The growth temperature for controlling reaction chamber is 900~1000 DEG C, growth time is 250~350s, pressure is 100~300mbar, is being measured Sub- well region surface grows p-type AlGaN electronic barrier layer;
S10 uses trimethyl gallium for gallium source, and two luxuriant magnesium are magnesium source, NH3For nitrogen source, N2For carrier gas, the life of reaction chamber is controlled Long temperature is 900~1000 DEG C, growth time is 2500~3500s, pressure is 200~400mbar, is hindered in p-type AlGaN electronics Barrier surface grows the p-type GaN layer of Mg doping;
S11 uses trimethyl gallium for gallium source, and TMln is indium source, and two luxuriant magnesium are magnesium source, NH3For nitrogen source, N2For carrier gas, control The growth temperature of reaction chamber is 500~800 DEG C, growth time is 100~200s, pressure is 200~400mbar, in p-type GaN Layer surface grows contact electrode layer;
S12, N of the structure that step S11 is obtained at a temperature of 600~700 DEG C2Anneal 800~1000s in atmosphere, so After be down to room temperature, obtain the LED based on superlattices potential barrier quantum well structure.
Optionally, the Sapphire Substrate with a thickness of 300~400 μm;The GaN forming core layer with a thickness of 20~ 30nm;The undoped GaN layer with a thickness of 1.5~2.5 μm;The n-type GaN layer with a thickness of 1~2 μm;Each period Superlattices AlxInyGa1-x-ySuperlattices Al in N/GaN barrier layerxInyGa1-x-yN barrier layer with a thickness of 3~10nm, superlattices GaN layer with a thickness of 3~10nm, the InGaN potential well layer with a thickness of 3~10nm;The p-type AlGaN electronic barrier layer With a thickness of 40~80nm;The p-type GaN layer with a thickness of 200~300nm;The contact electrode layer with a thickness of 50~ 100nm。
Optionally, the superlattices AlxInyGa1-x-yIn N/GaN barrier layer, 0 < x < 0.5,0 < y < 0.5, and from N-shaped GaN The numerical value of layer to p-type AlGaN electronic barrier layer direction x are incremented by, the number decrements of y.
All the above alternatives can any combination, the present invention not to one by one combine after structure carry out specifically It is bright.
The technical solution that the embodiment of the present invention provides can include the following benefits:
The present invention is by being arranged the of first area and 3~10 periods that quantum well region included 8~15 periods from bottom to up Two regions, and first area includes the superlattices Al in 3~10 periods being arranged from bottom to upxInyGa1-x-yN/GaN barrier layer and InGaN potential well layer, second area include the Al in 3~10 periodsxInyGa1-x-yN/GaN barrier layer can not only reduce quantum well region In a large amount of misfit dislocations are generated due to high In content, and the barrier layer construction can also improve conduction band band rank and reduce low potential barrier Valence-band Offsets reduce electronics to improve the injection efficiency of electrons and holes and increase to the constraint ability of electronics and let out Leakage, increases the radiation recombination efficiency of electrons and holes, to improve the internal quantum efficiency of LED, while also improving LED device The luminous efficiency of part.By using AlxInyGa1-x-yN/GaN superlattices barrier layer, it can not only be effectively reduced active layer Trap builds the lattice mismatch at interface, reduces crystal defect, moreover it is possible to improve the piezoelectric polarization effect generated due to lattice mismatch, subtract The weak Quantum Confined Stark effect of LED component, improves wavelength temperature.
Detailed description of the invention
The drawings herein are incorporated into the specification and forms part of this specification, and shows and meets implementation of the invention Example, and be used to explain the principle of the present invention together with specification.
Fig. 1 is the structural schematic diagram of the LED provided in an embodiment of the present invention based on superlattices potential barrier quantum well structure.
Specific embodiment
With reference to the accompanying drawings and examples, specific embodiments of the present invention will be described in further detail.
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention Formula is described in further detail.
As shown in Figure 1, the LED provided in an embodiment of the present invention based on superlattices potential barrier quantum well structure includes sapphire lining Bottom 1;The GaN forming core layer 2 being set to above Sapphire Substrate 1;The undoped GaN layer 3 being set to above GaN forming core layer 2;If The n-type GaN layer 4 being placed in above undoped GaN layer 3;It is set to the quantum well region above n-type GaN layer 4, the quantum well region The second area 6 in the period of first area 5 and 3~10 including 8~15 periods from bottom to up, the first area 5 includes under The superlattices Al in 3~10 periods of supreme settingxInyGa1-x-yN/GaN barrier layer 7 and InGaN potential well layer 8, the second area 6 include the Al in 3~10 periodsxInyGa1-x-yN/GaN barrier layer 7;The p-type AlGaN electronic blocking being set to above second area 6 Layer 9;The p-type GaN layer 10 being set to above p-type AlGaN electronic barrier layer 9;The electrode contact being set to above p-type GaN layer 10 Layer 11.
Optionally, the n-type GaN layer 4 is the n-type GaN layer of Si doping;The p-type GaN layer 10 is the p-type GaN of Mg doping Layer.
Wherein, the Sapphire Substrate 1 with a thickness of 300~400 μm (preferably 350 μm);The GaN forming core layer 2 With a thickness of 20~30nm;The undoped GaN layer 3 with a thickness of 1.5~2.5 μm;Described N-shaped GaN4 layers with a thickness of 1~2 μm;The superlattices Al in each periodxInyGa1-x-ySuperlattices Al in N/GaN barrier layer 7xInyGa1-x-yN barrier layer with a thickness of 3~ 10nm, superlattices GaN layer with a thickness of 3~10nm, the InGaN potential well layer 8 with a thickness of 3~10nm;The p-type AlGaN Electronic barrier layer 9 with a thickness of 40~80nm;The p-type GaN layer 10 with a thickness of 200~300nm;The contact electrode layer 11 With a thickness of 50~100nm.It should be noted that Fig. 1 be only used for illustrating it is provided in an embodiment of the present invention based on superlattices potential barrier The thickness of the composed structure of the LED of quantum well structure, each layer shown in FIG. 1 does not represent the actual (real) thickness of each layer.
Optionally, the superlattices AlxInyGa1-x-yIn N/GaN barrier layer 7,0 < x < 0.5,0 < y < 0.5, and from N-shaped GaN The numerical value of layer 4 to 9 layers of direction x of p-type AlGaN electronic blocking are incremented by, the number decrements of y, to improve the energy band height of potential barrier, reduce Electronics leakage.
The preparation method of the above-mentioned LED based on superlattices potential barrier quantum well structure comprising following steps S1 to S12:
S1, at a temperature of 900~1200 DEG C, in H2Impurity first is carried out to the surface of patterned Sapphire Substrate in atmosphere Or 300~500s of reduction treatment of oxide, then to treated, sapphire substrate surface carries out nitrogen treatment, obtains blue treasured Stone lining bottom.
S2 uses trimethyl gallium for gallium source, NH3For nitrogen source, H2For carrier gas, the growth temperature for controlling reaction chamber is 400~ 900 DEG C, growth time be 100~200s, pressure is 500~700mbar, the growth of sapphire substrate surface after nitrogen treatment Initial GaN nucleating layer, and 150~250s of initial GaN nucleating layer annealing is formed under conditions of temperature is 1000~1200 DEG C GaN nucleating layer.
S3 uses trimethyl gallium for gallium source, NH3For nitrogen source, H2For carrier gas, the growth temperature for controlling reaction chamber is 1000~ 1200 DEG C, growth time be 3400~3800s, pressure is 500~700mbar, GaN nucleation layer surface growth it is undoped GaN layer.
S4 uses trimethyl gallium for gallium source, SiH4For silicon source, NH3For nitrogen source, H2For carrier gas, the growth temperature of reaction chamber is controlled Degree is 1000~1200 DEG C, growth time is 1700~1900s, pressure is 500~700mbar, on undoped GaN layer surface Grow the n-type GaN layer of Si doping.
S5, including 5.1,5.2 and 5.3;5.1, use triethyl-gallium for gallium source, trimethyl aluminium is silicon source, and TMln is indium source, NH3For nitrogen source, N2For carrier gas, the growth temperature for controlling reaction chamber is 800~900 DEG C, growth time is 200~400s, pressure is 300~500mbar grows superlattices Al on n-type GaN layer surfacexInyGa1-x-yN barrier layer;5.2, use triethyl-gallium for gallium source, NH3For nitrogen source, N2For carrier gas, the growth temperature for controlling reaction chamber is 800~900 DEG C, growth time is 250~350s, pressure is 300~500mbar, in superlattices AlxInyGa1-x-ySuperlattices GaN layer is grown in N barrier layer;5.3, it repeats 3~10 times 5.1 With 5.2.
S6, using triethyl-gallium as gallium source, TMln is indium source, NH3For nitrogen source, N2For carrier gas, the growth temperature of reaction chamber is controlled For 700~800 DEG C, growth time be 150~250s, pressure is 300~500mbar, on the superlattices GaN layer surface of top layer Grow InGaN potential well layer.
S7 repeats 8~15 S5 and S6.
S8 continues 3~10 times 5.1 and 5.2 in the InGaN potential well layer surface of top layer, obtains quantum well region.
S9 uses trimethyl gallium for gallium source, and trimethyl aluminium is silicon source, and two luxuriant magnesium are magnesium source, NH3For nitrogen source, N2For carrier gas, The growth temperature for controlling reaction chamber is 900~1000 DEG C, growth time is 250~350s, pressure is 100~300mbar, is being measured Sub- well region surface grows p-type AlGaN electronic barrier layer.
S10 uses trimethyl gallium for gallium source, and two luxuriant magnesium are magnesium source, NH3For nitrogen source, N2For carrier gas, the life of reaction chamber is controlled Long temperature is 900~1000 DEG C, growth time is 2500~3500s, pressure is 200~400mbar, is hindered in p-type AlGaN electronics Barrier surface grows the p-type GaN layer of Mg doping.
S11 uses trimethyl gallium for gallium source, and TMln is indium source, and two luxuriant magnesium are magnesium source, NH3For nitrogen source, N2For carrier gas, control The growth temperature of reaction chamber is 500~800 DEG C, growth time is 100~200s, pressure is 200~400mbar, in p-type GaN Layer surface grows contact electrode layer.
S12, N of the structure that step S11 is obtained at a temperature of 600~700 DEG C2Anneal 800~1000s in atmosphere, so After be down to room temperature, obtain the LED based on superlattices potential barrier quantum well structure.
It should be noted that temperature, pressure and the time being related in each step can when above-mentioned steps are embodied To take any numerical value in corresponding range, such as when growth temperature is 500~800 DEG C, the temperature of specific implementation can be 500 DEG C, or 800 DEG C.It can also be any temperature in 500~800 DEG C.
The above embodiments are only used to illustrate the present invention, and not limitation of the present invention, in relation to the common of technical field Technical staff can also make a variety of changes and modification without departing from the spirit and scope of the present invention, therefore all Equivalent technical solution also belongs to scope of the invention, and scope of patent protection of the invention should be defined by the claims.

Claims (8)

1. a kind of LED based on superlattices potential barrier quantum well structure characterized by comprising
Sapphire Substrate;
The GaN forming core layer being set to above Sapphire Substrate;
The undoped GaN layer being set to above GaN forming core layer;
The n-type GaN layer being set to above undoped GaN layer;
It is set to the quantum well region above n-type GaN layer, the quantum well region includes the first area in 8~15 periods from bottom to up With the second area in 3~10 periods, the first area includes the superlattices in 3~10 periods being arranged from bottom to up AlxInyGa1-x-yN/GaN barrier layer and InGaN potential well layer, the second area include the Al in 3~10 periodsxInyGa1-x-yN/ GaN barrier layer;
The p-type AlGaN electronic barrier layer being set to above second area;
The p-type GaN layer being set to above p-type AlGaN electronic barrier layer;
The contact electrode layer being set to above p-type GaN layer.
2. the LED according to claim 1 based on superlattices potential barrier quantum well structure, which is characterized in that the N-shaped GaN Layer is the n-type GaN layer of Si doping.
3. the LED according to claim 1 based on superlattices potential barrier quantum well structure, which is characterized in that the p-type GaN Layer is the p-type GaN layer of Mg doping.
4. the LED according to claim 1 based on superlattices potential barrier quantum well structure, which is characterized in that the sapphire Substrate with a thickness of 300~400 μm;The GaN forming core layer with a thickness of 20~30nm;The thickness of the undoped GaN layer It is 1.5~2.5 μm;The n-type GaN layer with a thickness of 1~2 μm;The superlattices Al in each periodxInyGa1-x-yN/GaN potential barrier Superlattices Al in layerxInyGa1-x-yN barrier layer with a thickness of 3~10nm, superlattices GaN layer with a thickness of 3~10nm, it is described InGaN potential well layer with a thickness of 3~10nm;The p-type AlGaN electronic barrier layer with a thickness of 40~80nm;The p-type GaN Layer with a thickness of 200~300nm;The contact electrode layer with a thickness of 50~100nm.
5. the LED according to claim 1 based on superlattices potential barrier quantum well structure, which is characterized in that the superlattices AlxInyGa1-x-yIn N/GaN barrier layer, 0 < x < 0.5,0 < y < 0.5, and from n-type GaN layer to p-type AlGaN electronic barrier layer direction The numerical value of x is incremented by, the number decrements of y.
6. a kind of preparation method of the LED based on superlattices potential barrier quantum well structure characterized by comprising
S1, at a temperature of 900~1200 DEG C, in H2Impurity or oxygen first are carried out to the surface of patterned Sapphire Substrate in atmosphere 300~500s of reduction treatment of compound, then to treated, sapphire substrate surface carries out nitrogen treatment, obtains sapphire lining Bottom;
S2 uses trimethyl gallium for gallium source, NH3For nitrogen source, H2For carrier gas, the growth temperature for controlling reaction chamber is 400~900 DEG C, Growth time is 100~200s, pressure is 500~700mbar, and the sapphire substrate surface growth after nitrogen treatment is initial GaN nucleating layer, and temperature be 1000~1200 DEG C under conditions of to initial GaN nucleating layer anneal 150~250s formed GaN at Stratum nucleare;
S3 uses trimethyl gallium for gallium source, NH3For nitrogen source, H2For carrier gas, the growth temperature for controlling reaction chamber is 1000~1200 DEG C, growth time be 3400~3800s, pressure is 500~700mbar, grow undoped GaN layer in GaN nucleation layer surface;
S4 uses trimethyl gallium for gallium source, SiH4For silicon source, NH3For nitrogen source, H2For carrier gas, the growth temperature for controlling reaction chamber is 1000~1200 DEG C, growth time be 1700~1900s, pressure is 500~700mbar, undoped GaN layer surface grow The n-type GaN layer of Si doping;
S5, including 5.1,5.2 and 5.3;5.1, use triethyl-gallium for gallium source, trimethyl aluminium is silicon source, and TMln is indium source, NH3For Nitrogen source, N2For carrier gas, the growth temperature for controlling reaction chamber is 800~900 DEG C, growth time is 200~400s, pressure 300 ~500mbar grows superlattices Al on n-type GaN layer surfacexInyGa1-x-yN barrier layer;5.2, use triethyl-gallium for gallium source, NH3 For nitrogen source, N2For carrier gas, the growth temperature for controlling reaction chamber is 800~900 DEG C, growth time is 250~350s, pressure is 300~500mbar, in superlattices AlxInyGa1-x-ySuperlattices GaN layer is grown in N barrier layer;5.3, it repeats 3~10 times 5.1 With 5.2;
S6, using triethyl-gallium as gallium source, TMln is indium source, NH3For nitrogen source, N2For carrier gas, the growth temperature for controlling reaction chamber is 700~800 DEG C, growth time be 150~250s, pressure is 300~500mbar, raw on the superlattices GaN layer surface of top layer Long InGaN potential well layer;
S7 repeats 8~15 S5 and S6;
S8 continues 3~10 times 5.1 and 5.2 in the InGaN potential well layer surface of top layer, obtains quantum well region;
S9 uses trimethyl gallium for gallium source, and trimethyl aluminium is silicon source, and two luxuriant magnesium are magnesium source, NH3For nitrogen source, N2For carrier gas, control The growth temperature of reaction chamber is 900~1000 DEG C, growth time is 250~350s, pressure is 100~300mbar, in Quantum Well Area surface grows p-type AlGaN electronic barrier layer;
S10 uses trimethyl gallium for gallium source, and two luxuriant magnesium are magnesium source, NH3For nitrogen source, N2For carrier gas, the growth temperature of reaction chamber is controlled Degree is 900~1000 DEG C, growth time is 2500~3500s, pressure is 200~400mbar, in p-type AlGaN electronic barrier layer Surface grows the p-type GaN layer of Mg doping;
S11 uses trimethyl gallium for gallium source, and TMln is indium source, and two luxuriant magnesium are magnesium source, NH3For nitrogen source, N2For carrier gas, control reaction The growth temperature of room is 500~800 DEG C, growth time is 100~200s, pressure is 200~400mbar, in p-type GaN layer table It looks unfamiliar long electrode contact layer;
S12, N of the structure that step S11 is obtained at a temperature of 600~700 DEG C2Anneal 800~1000s in atmosphere, is then down to Room temperature obtains the LED based on superlattices potential barrier quantum well structure.
7. the LED according to claim 6 based on superlattices potential barrier quantum well structure, which is characterized in that the sapphire Substrate with a thickness of 300~400 μm;The GaN forming core layer with a thickness of 20~30nm;The thickness of the undoped GaN layer It is 1.5~2.5 μm;The n-type GaN layer with a thickness of 1~2 μm;The superlattices Al in each periodxInyGa1-x-yN/GaN potential barrier Superlattices Al in layerxInyGa1-x-yN barrier layer with a thickness of 3~10nm, superlattices GaN layer with a thickness of 3~10nm, it is described InGaN potential well layer with a thickness of 3~10nm;The p-type AlGaN electronic barrier layer with a thickness of 40~80nm;The p-type GaN Layer with a thickness of 200~300nm;The contact electrode layer with a thickness of 50~100nm.
8. the LED according to claim 6 based on superlattices potential barrier quantum well structure, which is characterized in that the superlattices AlxInyGa1-x-yIn N/GaN barrier layer, 0 < x < 0.5,0 < y < 0.5, and from n-type GaN layer to p-type AlGaN electronic barrier layer direction The numerical value of x is incremented by, the number decrements of y.
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* Cited by examiner, † Cited by third party
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CN114256394A (en) * 2021-12-30 2022-03-29 淮安澳洋顺昌光电技术有限公司 Light emitting diode and preparation method thereof

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CN113851546A (en) * 2021-09-22 2021-12-28 陕西科技大学 Green-light nitride laser cell epitaxial wafer and preparation method thereof
CN114256394A (en) * 2021-12-30 2022-03-29 淮安澳洋顺昌光电技术有限公司 Light emitting diode and preparation method thereof
CN114256394B (en) * 2021-12-30 2023-09-19 淮安澳洋顺昌光电技术有限公司 Light-emitting diode and preparation method thereof

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