CN109874097A - Active noise reduction earphone and its test macro - Google Patents

Active noise reduction earphone and its test macro Download PDF

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Publication number
CN109874097A
CN109874097A CN201711269879.XA CN201711269879A CN109874097A CN 109874097 A CN109874097 A CN 109874097A CN 201711269879 A CN201711269879 A CN 201711269879A CN 109874097 A CN109874097 A CN 109874097A
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China
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signal
module
counter
contact pin
noise reduction
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CN201711269879.XA
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Chinese (zh)
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CN109874097B (en
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陶永耀
熊江
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炬芯(珠海)科技有限公司
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Abstract

The present invention relates to a kind of active noise reduction earphone and its test macros, the active noise reduction earphone includes the interface module being connected and audio effect processing module, audio effect processing module further include: the first detecting module, for carrying out feature detecting to the signal on two contact pins respectively, and identify the signal type on two contact pins;Address acquisition module obtains address corresponding to recognition result for the corresponding relationship of signal type according to the pre-stored data and processing chip address;Module is adjusted, for being adjusted to the line sequence of the signal on two contact pins according to recognition result;First protocol resolution module is added in the signal after parsing for parsing to adjusted two signals of line sequence, and by acquired address, and exports to two processing chips.Implement technical solution of the present invention, need to only pass through the connection type of change active noise reduction earphone and test device, so that it may the configuration to different disposal chip is realized, moreover, without the cost for increasing processing chip.

Description

Active noise reduction earphone and its test macro

Technical field

The present invention relates to IC design field more particularly to a kind of active noise reduction earphone and its test macros.

Background technique

Between existing integrated circuit (IC) in communication interface, I2C (Inter-Integrated Circuit) is that one kind is answered With extremely wide bus mode, it is to have multi-host system institute that I2C bus, which is a kind of universal serial bus that PHLIPS company releases, The high performance serial bus including bus ruling and high low speed device synchronization function needed.

I2C bus only has two bidirectional signal lines.One is SDA data line, and another is SCL clock line, for connecting Single-chip microcontroller and peripheral equipment, for example, as shown in Figure 1, Chip Microcomputer A, B pass through respectively I2C bus connection SARM, E2PROM, A/D, D/A, calendar clock or other peripheral equipments.

The process timing that I2C bus sends data is as shown in Figure 2 A, and whole process includes following communication state:

Idle: SDA data line and SCL clock line are all high level.After receiving device receives a complete data byte, It is likely to require and completes some other work, such as processing internal interrupt service, possibly can not receive next byte at once, this When receiving device SCL clock line can be pulled into low level, so that host be made to be waited for.Until receiving device is ready to It when receiving next byte, then discharges SCL line and is allowed to as high level, so that data transmission be allow to continue.

Starting: as shown in Figure 2 B, SCL clock line is between high period, and SDA data line is from high level to low level variation Indicate initial signal;

Stop: as shown in Figure 2 C, SCL clock line is between high period, variation of the SDA data line from low level to high level Indicate termination signal;

Transmission data: transmission logical zero as shown in Figure 2 D, transmission logical one as shown in Figure 2 E, it should be noted that, During the level signal jump on SCL clock line is read, the stabilization of level signal on SDA data line is kept.

In addition, for active noise reduction earphone, inside need integrated circuit noise handled, to reach noise reduction Effect.And the usual very little of volume of Portable earphone, the acoustics cavity of circumaural earphone have the measurement of noise reduction effect very big It influences, so, it measures and calibrates only under true service condition and is just meaningful.Following manner is generallyd use to active noise reduction Earphone is tested: is added in a manner of antiphase on electroacoustic unit loudspeaker by microphone acquisition noise, after processing.And ear The left and right acoustic channels of machine carry out audio effect processing by mutually isostructural circuit, and L channel is controlled by a chips on circuit structure, right sound Road is by another chip controls with model.But due to the difference of the peripheral cells such as left and right acoustic channels loudspeaker unit, left and right acoustic channels Needing to carry out different degrees of equalizer configuration can be only achieved preferable effect.

Earphone interface is usually four core plugs for having fixed specification, such as meeting two kinds of standards of specification OMTP and CTIA, such as Fruit will realize the test to earphone, need to carry out innovative design on this interface, be communicated to reach with inside chip Purpose, in addition, making two chips have different addresses to distinguish the two of same model chips, needing to take There is the mode of cost price.For example, 1. chips have additional Pin foot, specifically connected on PCB, so that system be allowed to match Different addresses is set, but the increase of hardware cost can be brought in this way;2. different firmware built in, firmware go configuration to assist in systems Resolver is discussed, different firmwares bring the increase of management cost;There is the circuit of hardware cost by differentiation with Efuse etc. inside 3. Address carries out burning, but more troublesome is the increase that can bring stock control cost.

Summary of the invention

The technical problem to be solved in the present invention is that providing one kind for above-mentioned defect at high cost in the prior art Active noise reduction earphone and its test macro can reduce cost.

The technical solution adopted by the present invention to solve the technical problems is: constructing a kind of active noise reduction earphone, including is connected The interface module and audio effect processing module connect, wherein the interface module includes two contact pins corresponding with left and right acoustic channels respectively, The audio effect processing module includes two processing chip corresponding with left and right acoustic channels respectively, the audio effect processing module further include:

First detecting module, when two contact pins for passing through interface module in test device send configuration signal, respectively Feature detecting is carried out to the signal on two contact pins, and is identified according to the characteristic information of the signal on described two contact pins described Signal type on two contact pins;

Address acquisition module is obtained for the corresponding relationship of signal type according to the pre-stored data and processing chip address Address corresponding to recognition result;

Module is adjusted, for being adjusted to the line sequence of the signal on described two contact pins according to recognition result;

First protocol resolution module, for being parsed to adjusted two signals of line sequence, and by acquired address In signal after being added to parsing, and export to two processing chips.

Preferably, first detecting module includes:

First counter, carry out by the edge number within a preset time to the level signal on one of contact pin based on Number;

Second counter, carry out by the edge number within a preset time to the level signal on another contact pin based on Number;

First recognition unit, for according to the count results of first counter and second counter to identify Stating the signal on two contact pins is SDA data-signal or SCL clock signal.

Preferably, the edge number is rising edge number, moreover, the input terminal connection of first counter it is described its In a contact pin, the input terminal of second counter connects another described contact pin.

Preferably, the edge number is failing edge number, moreover, the detecting module further includes the first NOT gate and second NOT gate, the input terminal of first NOT gate connect one of contact pin, the output end connection of first NOT gate described the The input terminal of one counter;The input terminal of second NOT gate connects another described contact pin, the output end of second NOT gate Connect the input terminal of second counter.

Preferably, the edge number be rising edge number and failing edge number and, moreover, the detecting module also wraps The first delay unit, the second delay unit, the first XOR gate and the second XOR gate are included, moreover, first delay unit is defeated Enter end and connect one of contact pin, two input terminals of first XOR gate be separately connected one of contact pin and The output end of first delay unit, the output end of first XOR gate connect the input terminal of first counter;Institute The input terminal for stating the second delay unit connects another contact pin, and two input terminals of second XOR gate are separately connected described The output end of another contact pin and second delay unit, the output end of second XOR gate connect second counter Input terminal.

Preferably, first recognition unit is comparator or divider.

Preferably, the adjustment module includes the first switching switch, the second switching switch, wherein first switching is opened Second static contact of the first static contact and the second switching switch that close is separately connected one of contact pin, and described first First static contact of the second static contact and the second switching switch that switch switch is separately connected another described contact pin, described The moving contact of the moving contact of first switching switch and the second switching switch is separately connected first protocol resolution module SCL clock line and SDA data line, moreover, the control terminal of the control terminal of the first switching switch and the second switching switch It is separately connected the first detecting module.

The present invention also constructs a kind of active noise reduction earphone, including interface module and respectively at two corresponding with left and right acoustic channels Chip is managed, the interface module includes two contact pins corresponding with left and right acoustic channels respectively, which is characterized in that the first processing chip First end and the second end of second processing chip are connected with the first contact pin respectively, the first processing second end of chip and described The first end of second processing chip is connected with the second contact pin respectively, moreover, each processing chip includes:

Second detecting module, when two contact pins for passing through interface module in test device send configuration signal, respectively Feature detecting is carried out to the signal in its first end and second end, and according to the feature of the signal in the first end and second end Information identifies the signal type in the first end and the second end;

Judgment module, the signal type in the first end and the second end for judging to be identified whether in advance If signal type it is consistent;

Second protocol parsing module, for when the signal type identified is consistent with preset signal type, to institute The signal stated in first end and the second end is parsed.

Preferably, second detecting module includes:

Third counter, carry out by the edge number within a preset time to the level signal in the first end based on Number;

Four-counter, carry out by the edge number within a preset time to the level signal in the second end based on Number;

Second recognition unit, for being known respectively according to the count results of first counter and second counter Signal in the not described first end and the second end is SDA data-signal or SCL clock signal.

The present invention also constructs a kind of test macro of active noise reduction earphone characterized by comprising

Above-described active noise reduction earphone;

Test device sends configuration signal for two contact pins by interface module.

Implement technical solution of the present invention, test device is when configuring active noise reduction earphone, without knowing in advance The address of two processing chip therein, only need to be by the connection type of change active noise reduction earphone and test device, alternatively, only The signal type of two ports of test device output need to be adjusted, so that it may the configuration to different disposal chip is realized, moreover, at two Reason chip does not need the processing of the differentiation on any other hardware, can accomplish same model stock control, there is no need to increase Handle the cost of chip.

Detailed description of the invention

In order to illustrate the embodiments of the present invention more clearly, attached drawing needed in describing below to embodiment makees letter Singly introduce, it should be apparent that, drawings in the following description are only some embodiments of the invention, skill common for this field For art personnel, without creative efforts, it is also possible to obtain other drawings based on these drawings.Attached drawing In:

Fig. 1 is the schematic diagram that single-chip microcontroller and peripheral equipment are connected by I2C bus;

Fig. 2A is the timing diagram of I2C bus;

Fig. 2 B is the timing diagram of the initial state of I2C bus;

Fig. 2 C is the timing diagram of the halted state of I2C bus;

Fig. 2 D is the timing diagram of the transmission logical zero state of I2C bus;

Fig. 2 E is the timing diagram of 1 state of transmission logic of I2C bus;

Fig. 3 is the building-block of logic of the test macro embodiment one of active noise reduction earphone of the present invention;

Fig. 4 is the building-block of logic of the first detecting module embodiment one in Fig. 3;

Fig. 5 is the building-block of logic that module embodiments one are adjusted in Fig. 3;

Fig. 6 is the building-block of logic of the test macro embodiment two of active noise reduction earphone of the present invention;

Fig. 7 is the building-block of logic that chip embodiment one is handled in Fig. 6.

Specific embodiment

Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other Embodiment shall fall within the protection scope of the present invention.

Illustrate first, for the interface module of earphone, either meet OMTP specification and still meet CTIA specification, On be provided with two contact pins corresponding with left and right acoustic channels respectively, in addition there are also contact pin corresponding with microphone and connect with ground wire Contact pin.In test macro of the invention, for the interface module of earphone, it is arranged in test device and is connect for being inserted into earphone The jack of mouth mold block, moreover, carrying out analog signal and digital signal to two contact pins corresponding with left and right acoustic channels in interface module Multiplexing, make its test when can receive configuration signal, the configuration signal be used for corresponding with left and right acoustic channels respectively in earphone Two processing chips are configured accordingly.In addition, in earphone, since two processing chips occur in pairs, and logical construction And function is almost, generally selects two duplicate chips of model, so, test device can not have to know two The address of chip is handled, the connection type (just connect or be reversely connected) of the interface module of test device and earphone is only changed, alternatively, test Device carries out type adjustment to its signal exported to two contact pins of earphone interface module.

In addition, when active noise reduction earphone carries out calibration test after plant produced, due to not needing complicated communication, so The communications protocol of similar I2C can be used, that is, only with a part of communications protocol of I2C, it is only necessary to which it is true that the port Salve carries out ACK Recognize, without replying.

Fig. 3 is the building-block of logic of the test macro embodiment one of active noise reduction earphone of the present invention, the test of the embodiment System includes active noise reduction earphone and test device 200 to be tested, wherein active noise reduction earphone includes the interface mould being connected Block 110 and audio effect processing module 120, the interface module 110 include two contact pins A, B corresponding with left and right acoustic channels respectively, this two A contact pins A, B and jack C, D corresponding in test device 200 are connected (just connect or be reversely connected), herein it should be noted that, the interface mould The another two contact pin of block 110 is not shown.Audio effect processing module 120 includes two processing chip corresponding with left and right acoustic channels respectively, That is, the first processing chip 125 and second processing chip 126, in addition, the audio effect processing module 120 further includes the first detecting module 121, address acquisition module 122, adjustment module 123 and the first protocol resolution module 124, moreover, the first protocol resolution module 124 The first output end be connected respectively with the first end of the first processing chip 125 and the first end of second processing chip 125, first assists The second of second end and second processing chip 125 that the second output terminal for discussing parsing module 124 handles chip 125 with first respectively End is connected.

Moreover, in this embodiment, the first detecting module 121 is used to pass through two contact pins of interface module in test device A, when B sends configuration signal, feature detecting is carried out to the signal on two contact pins As, B respectively, and according on two contact pins As, B The characteristic information of signal come identify two contact pins As, the signal type on B;Address acquisition module 122 is for according to the pre-stored data The corresponding relationship of signal type and processing chip address, obtains address corresponding to recognition result;It adjusts module 123 and is used for basis Recognition result is adjusted the line sequence of the signal on two contact pins As, B;First protocol resolution module 124 is used for line sequence tune Two signals after whole are parsed, and acquired address is added in the signal after parsing, and are exported to two and handled Chip.

Illustrate the working principle of the test macro of the active noise reduction earphone below with reference to Fig. 3:

For example, setting in address acquisition module 122 in advance: if contact pins A is connected with jack C, contact pin B is connected with jack D, Then correspond to the address of the first processing chip 125;If contact pins A is connected with jack D, contact pin B is connected with jack C, then corresponds at second Manage the address of chip 126.

It, can be by contact pins A and jack C phase when test device 200 needs to send configuration signal to the first processing chip 125 Even, contact pin B is connected with jack D, as shown in figure 3, at this point, the first detecting module 121 may recognize that contact pins A, B by feature detecting On signal type, so that address acquisition module 122 just can determine that the address of the first processing chip 125, the first protocol analysis 124 pairs of module are added to the signal after parsing after line sequence signal adjusted parses, by the address, and export to two Handle chip 125,126.For the first processing chip 125, in the signal for receiving the transmission of the first protocol resolution module 124 Afterwards, judge that the signal is intended for oneself according to address therein, so that it may perform corresponding processing;And for second processing chip 126, after the signal for receiving the transmission of the first protocol resolution module 124, judge that the signal is not according to address therein Oneself is issued, just abandons and is not processed.

It, can be by contact pins A and jack D phase when test device 200 needs to send configuration signal to second processing chip 126 Even, contact pin B is connected with jack C, is not shown in the figure, at this point, the first detecting module 121 detected by feature may recognize that contact pins A, Signal type on B, so that address acquisition module 122 just can determine that the address of second processing chip 125, the first protocol analysis 124 pairs of module are added to the signal after parsing after line sequence signal adjusted parses, by the address, and export to two Handle chip 125,126.For the first processing chip 125, in the signal for receiving the transmission of the first protocol resolution module 124 Afterwards, judge that the signal is not intended for oneself according to address therein, just abandon and be not processed;And for second processing chip 126, after the signal for receiving the transmission of the first protocol resolution module 124, judge that the signal is intended for according to address therein Oneself, so that it may it performs corresponding processing.

It can to sum up obtain, test device 200 is when configuring two processing chips 125,126, without knowing this in advance The address of two processing chips 125,126, by carrying out two jacks of two contact pins of interface module 110 and test device It just connects or is reversely connected, so that it may realize the configuration to different processing chips 125,126.

In a specific embodiment, when being configured using I2C communications protocol to active noise reduction earphone, for left and right Two contact pins of sound channel, one of them is used to transmit clock signal;Another is used to transmit data or address.I2C bus has several A communication state: idle, starting stops, the transmission of logic ' 0 ' and ' 1 '.Such as bus address width is 7 Bit, in conjunction with figure The edge transition number ratio SDA data line of 2D and Fig. 2 E, SCL clock line are more, moreover, at least twice of SDA data line with On.Therefore, which connecting line can be identified according to the frequency of the edge transition of level signal on SCL clock line and SDA data line It is SCL clock line, which connecting line is SDA data line.

In this embodiment, the first detecting module 121 includes the first counter, the second counter and the first recognition unit, Wherein, the first counter is within a preset time counting the edge number of the level signal on one of contact pin; Second counter is within a preset time counting the edge number of the level signal on another contact pin;First identification Unit is used to identify the letter on described two contact pins according to the count results of first counter and second counter Number be SDA data-signal or SCL clock signal.Preferably, the first recognition unit is, for example, comparator or divider, to compare When device, which is compared by the size of the edge number to two connecting lines, and determines the biggish company of edge number Wiring is SCL clock line, and number lesser connecting line in edge is SDA clock line;When for divider, the comparator is by by The edge number of one connecting line is divided by with the edge number of the second connecting line, if result is more than or equal to 2, then it is assumed that first connects Wiring is SCL connecting line, and the second connecting line is SDA data line, and vice versa.

In a concrete application, characteristic information is rising edge number.In addition, detecting module includes the first counter, the Two counters and the first recognition unit, moreover, the input terminal of the first counter connects one of contact pin, second meter The output end of another described contact pin of input terminal connection of number device, the first counter and the second counter is separately connected the first identification Unit.In this embodiment, after such as sometime resetting, the first counter and the second counter are respectively on two contact pins The rising edge of signal is counted, and then comparator is compared the count value of two counters, when the first count value is than When two count values fall behind certain numerical value (such as with 8 be numeric threshold), it may indicate that the signal type of the second contact pin is SCL letter Number.After sending signal to slave due to host, slave needs to reply ACK, therefore before not establishing reliable recognition, and slave can be with Obtain enough counter values difference.

In another concrete application, characteristic information is failing edge number.In addition, the first detecting module includes first non- Door, the second NOT gate, the first counter, the second counter and the first recognition unit, the input terminal of the first NOT gate connect one of them Contact pin, the output end of the first NOT gate connect the input terminal of the first counter;The input terminal of second NOT gate connects another contact pin, the The output end of two NOT gates connects the input terminal of second counter, and the output end of the first counter and the second counter connects respectively Connect the first recognition unit.The working principle of the embodiment is similar with a upper embodiment, the only difference is that on each contact pin The failing edge of level signal is counted.

In another concrete application, characteristic information is the sum of rising edge number and failing edge number.In addition, in conjunction with Fig. 4, First detecting module includes the first delay unit 1214, the second delay unit 1215, the first XOR gate 1216, the second XOR gate 1217, the first counter 1211, the second counter 1212 and the first recognition unit 1213, moreover, the first delay unit 1214 Input terminal connects one of contact pin, and two input terminals of the first XOR gate 1216 are separately connected one of contact pin and first and prolong The output end of Shi Danyuan 1214, the output end of the first XOR gate 1216 connect the input terminal of the first counter 1211;Second delay The input terminal of unit 1215 connects another contact pin, and two input terminals of the second XOR gate 1217 are separately connected another contact pin and second The output end of delay unit 1215, the output end of the second XOR gate 1217 connect the input terminal of the second counter 1212.The implementation The working principle of example is similar with the first two embodiment, the only difference is that the counter of the first two embodiment is single edging trigger, And the counter of the present embodiment be double edge trigger, that is, the sum of rising edge and failing edge to the level signal on connecting line into Row counts.

Fig. 5 is the building-block of logic that module embodiments one are adjusted in Fig. 3, and the adjustment module of the embodiment includes the first switching Switch K1, the second switching switch K2, wherein the first static contact of the first switching switch K1 and second switch the second quiet of switch K2 Contact is separately connected contact pins A, the first static contact difference of the second static contact of the first switching switch K1 and the second switching switch K2 The moving contact of connecting contact pin B, the moving contact of the first switching switch K1 and the second switching switch K2 are separately connected the first protocol analysis The SCL clock line and SDA data line of module, moreover, the control of the control terminal of the first switching switch K1 and the second switching switch K2 End is separately connected the first detecting module.For example, as shown in figure 5, working as the signal type in contact pins A for SCL signal, on contact pin B Signal type is SDA signal, and the moving contact for controlling two switchings switch K1, K2 is connected with its first static contact respectively, that is, at this time Without cross processing;When the signal type in contact pins A is SDA signal, the signal type on contact pin B is SCL signal, control two The moving contact of a switching switch K1, K2 are connected with its second static contact respectively, that is, carry out cross processing at this time.

Further, adjustment module may also include control unit, and the detecting result of detecting module is sent into control unit, control Unit is after receiving detecting result, and the specific time that can also be delayed controls the movement of two switchings switch K1, K2 again, to prevent Shake.Further, the start and stop state of also controllable two counters of the control unit, for example, not adjusted adaptively When, enable signal is sent to two counters, is started counting with starting counter;After adaptively adjust, it can control two A counter stops counting.Certainly, counter can also be controlled by late-class circuit, or always enablement count device in working condition.

Fig. 6 is the building-block of logic of the test macro embodiment two of active noise reduction earphone of the present invention, the test of the embodiment System includes active noise reduction earphone and test device 200 to be tested, wherein active noise reduction earphone include interface module 110 and Two processing chip corresponding with left and right acoustic channels respectively, that is, the first processing chip 130 and second processing chip 130 '.Interface mould Block 110 includes that two contact pins A, B corresponding with left and right acoustic channels, two contact pins As, B are corresponding in test device 200 slotting respectively Hole C, D are connected.In addition, the first processing chip 130 and second processing chip 130 ' are the same chip of two models, and have respectively There are two hold E (E '), F (F '), wherein the first end E of the first processing chip 130 and second end F ' of second processing chip 130 ' It is connected respectively with the first contact pins A, the second end F of the first processing chip 130 and the first end E ' difference of second processing chip 130 ' It is connected with the second contact pin B.

Fig. 7 is the building-block of logic that chip embodiment one is handled in Fig. 6, and in this embodiment, processing chip includes the Two detecting modules 131, judgment module 132 and second protocol parsing module 133.Wherein, the second detecting module 131 is for testing When device sends configuration signal by two contact pins of interface module, the signal in its first end and second end is carried out respectively special Sign detecting, and the first end and the second end are identified according to the characteristic information of the signal in the first end and second end On signal type;The signal type in the first end and the second end that judgment module 132 is used to judge to be identified It is whether consistent with preset signal type;Second protocol parsing module 133 be used for the signal type identified with it is preset When signal type is consistent, the signal in the first end and the second end is parsed.

Illustrate the working principle of the test macro of the active noise reduction earphone below with reference to Fig. 6 and Fig. 7:

For two processing chips 130,130 ', if setting the signal type of its first end E, E ' as the first kind, second Hold F, F ' signal type be Second Type when, just think that received signal is intended for itself.Moreover, according to shown in Fig. 6 Connection type connecting test device and two processing chips 130,130 '.

When test device 200 needs to send configuration signal to the first processing chip 130, its C-terminal can be made to export the first kind The signal of type, the end D export the signal of Second Type, at this point, second detecting module 131 passes through in the first processing chip 130 Feature detecting may recognize that the signal type on the end E is the first kind, and the signal type on the end F is Second Type.Then, judge Module 132 can determine whether out that the end E, the signal type on the end F are consistent with preset signal type respectively, that is, determine the configuration signal It is intended for oneself, and then can trigger protocol resolution module 133 and the signal on the end E, F is parsed;And for second processing Chip 130 ', after being detected to the signal characteristic on the end its E ', F ', judge signal type on the end the E ', F ' with Preset signal type is inconsistent, and then determines that the signal is not intended for oneself, just abandons and is not processed.

When test device 200 needs to send configuration signal to second processing chip 130 ', its C-terminal can be made to export the second class The signal of type, the end D export the signal of the first kind, at this point, the second detecting module 131 is logical in second processing chip 130 ' Crossing feature detecting may recognize that the signal type on the end E ' is the first kind, and the signal type on the end F ' is Second Type.Then, Judgment module 132 can determine whether out that the end E ', the signal type on the end F ' are consistent with preset signal type respectively, that is, determine that this is matched Confidence number is intended for oneself, and then can trigger protocol resolution module 133 and parse to the signal on the end E ', F ';And for First processing chip 130 judges that the signal type on the end E, F is equal after detecting to the signal characteristic on its end E, F It is inconsistent with preset signal type, and then determine that the signal is not intended for oneself, it just abandons and is not processed.

It can to sum up obtain, test device 200 is when configuring two processing chips 130,130 ', without knowing this in advance Two two processing chips 130,130 ' address, only need to test device the both ends C, D output signal carry out type adjustment, Achieve that the configuration to different processing chips 130,130 '.

In a specific embodiment, when being configured using I2C communications protocol to active noise reduction earphone, for left and right Two contact pins of sound channel, one of them is used to transmit clock signal;Another is used to transmit data or address.I2C bus has several A communication state: idle, starting stops, the transmission of logic ' 0 ' and ' 1 '.Such as bus address width is 7 Bit, in conjunction with figure The edge transition number ratio SDA data line of 2D and Fig. 2 E, SCL clock line are more, moreover, at least twice of SDA data line with On.Therefore, which connecting line can be identified according to the frequency of the edge transition of level signal on SCL clock line and SDA data line It is SCL clock line, which connecting line is SDA data line.

In this embodiment, the second detecting module includes third counter, four-counter and the second recognition unit, In, third counter is within a preset time counting the edge number of the level signal in the first end;4th Counter is within a preset time counting the edge number of the level signal in the second end;Second identification is single Member, for identifying the first end and described respectively according to the count results of first counter and second counter Signal in second end is SDA data-signal or SCL clock signal.Preferably, the first recognition unit is, for example, comparator or removes Musical instruments used in a Buddhist or Taoist mass, when for comparator, which is compared by the size of the edge number to two connecting lines, and determines edge The biggish connecting line of number is SCL clock line, and number lesser connecting line in edge is SDA clock line;When for divider, the ratio Compared with device by the way that the edge number of the first connecting line and the edge number of the second connecting line are divided by, if result is more than or equal to 2, Then think that the first connecting line is SCL connecting line, the second connecting line is SDA data line, and vice versa.

In a concrete application, characteristic information can be rising edge number, failing edge number, rising edge number and failing edge The sum of number.The logical construction of second detecting module can refer to the logical construction of previously described first detecting module, herein not It repeats.

The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any bun Change, equivalent replacement, improvement etc., should be included within scope of the presently claimed invention.

Claims (10)

1. a kind of active noise reduction earphone, including the interface module and audio effect processing module being connected, wherein the interface module packet Two contact pins corresponding with left and right acoustic channels respectively are included, the audio effect processing module is including at two corresponding with left and right acoustic channels respectively Manage chip, which is characterized in that the audio effect processing module further include:
First detecting module, when two contact pins for passing through interface module in test device send configuration signal, respectively to two Signal on a contact pin carries out feature detecting, and is identified according to the characteristic information of the signal on described two contact pins described two Signal type on contact pin;
Address acquisition module obtains identification for the corresponding relationship of signal type according to the pre-stored data and processing chip address As a result corresponding address;
Module is adjusted, for being adjusted to the line sequence of the signal on described two contact pins according to recognition result;
First protocol resolution module is added for parsing to adjusted two signals of line sequence, and by acquired address In signal after to parsing, and export to two processing chips.
2. active noise reduction earphone according to claim 1, which is characterized in that first detecting module includes:
First counter is counted for the edge number within a preset time to the level signal on one of contact pin;
Second counter is counted for the edge number within a preset time to the level signal on another contact pin;
First recognition unit, for identifying described two according to the count results of first counter and second counter Signal on a contact pin is SDA data-signal or SCL clock signal.
3. active noise reduction earphone according to claim 2, which is characterized in that the edge number is rising edge number, and And the input terminal of first counter connects one of contact pin, described in the input terminal connection of second counter Another contact pin.
4. active noise reduction earphone according to claim 2, which is characterized in that the edge number is failing edge number, and And the detecting module further includes the first NOT gate and the second NOT gate, the input terminal connection of first NOT gate it is described one of them Contact pin, the output end of first NOT gate connect the input terminal of first counter;The input terminal of second NOT gate connects Another described contact pin, the output end of second NOT gate connect the input terminal of second counter.
5. active noise reduction earphone according to claim 2, which is characterized in that the edge number is rising edge number under Sum along number drops, moreover, the detecting module further includes the first delay unit, the second delay unit, the first XOR gate and the Two XOR gates, moreover, input terminal connection one of contact pin of first delay unit, the two of first XOR gate A input terminal is separately connected the output end of one of contact pin and first delay unit, first XOR gate it is defeated Outlet connects the input terminal of first counter;The input terminal of second delay unit connects another contact pin, described Two input terminals of the second XOR gate are separately connected the output end of another contact pin and second delay unit, and described second The output end of XOR gate connects the input terminal of second counter.
6. active noise reduction earphone according to claim 2, which is characterized in that first recognition unit is comparator or removes Musical instruments used in a Buddhist or Taoist mass.
7. active noise reduction earphone according to claim 1, which is characterized in that the adjustment module includes that the first switching is opened It closes, the second switching switch, wherein the second stationary contact of the first static contact of the first switching switch and the second switching switch Head is separately connected one of contact pin, and the of the second static contact of the first switching switch and the second switching switch One static contact is separately connected another described contact pin, the moving contact of the first switching switch and moving for the second switching switch Contact is separately connected the SCL clock line and SDA data line of first protocol resolution module, moreover, the first switching switch Control terminal and it is described second switching switch control terminal be separately connected the first detecting module.
8. a kind of active noise reduction earphone, including interface module and two processing chip corresponding with left and right acoustic channels respectively, it is described to connect Mouth mold block includes two contact pins corresponding with left and right acoustic channels respectively, which is characterized in that the first end and second of the first processing chip The second end of processing chip is connected with the first contact pin respectively, the second end of the first processing chip and the second processing chip First end be connected respectively with the second contact pin, moreover, each processing chip includes:
Second detecting module, when two contact pins for passing through interface module in test device send configuration signal, respectively to it Signal in first end and second end carries out feature detecting, and according to the characteristic information of the signal in the first end and second end To identify the signal type in the first end and the second end;
Judgment module, the signal type in the first end and the second end for judging to be identified whether with it is preset Signal type is consistent;
Second protocol parsing module, for when the signal type identified is consistent with preset signal type, to described Signal on one end and the second end is parsed.
9. active noise reduction earphone according to claim 8, which is characterized in that second detecting module includes:
Third counter is counted for the edge number within a preset time to the level signal in the first end;
Four-counter is counted for the edge number within a preset time to the level signal in the second end;
Second recognition unit, for identifying institute respectively according to the count results of first counter and second counter Stating the signal in first end and the second end is SDA data-signal or SCL clock signal.
10. a kind of test macro of active noise reduction earphone characterized by comprising
The described in any item active noise reduction earphones of claim 1-9;
Test device sends configuration signal for two contact pins by interface module.
CN201711269879.XA 2017-12-05 2017-12-05 Active noise reduction earphone and test system thereof CN109874097B (en)

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