CN109684264A - IIC exchange system and its control method - Google Patents
IIC exchange system and its control method Download PDFInfo
- Publication number
- CN109684264A CN109684264A CN201811612235.0A CN201811612235A CN109684264A CN 109684264 A CN109684264 A CN 109684264A CN 201811612235 A CN201811612235 A CN 201811612235A CN 109684264 A CN109684264 A CN 109684264A
- Authority
- CN
- China
- Prior art keywords
- iic
- different
- peripheral hardware
- controller
- exchange system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 18
- 230000002093 peripheral effect Effects 0.000 claims abstract description 68
- 238000004891 communication Methods 0.000 claims abstract description 25
- 238000010586 diagram Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000012512 characterization method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Small-Scale Networks (AREA)
Abstract
The invention discloses a kind of IIC exchange system and its control method, IIC exchange system includes: SOC controller, and inside includes at least one IIC controller；Several switches are connected between the output end of all IIC controllers and the input terminal of IIC peripheral hardware；Logic control module, distributes different IIC peripheral hardware addresses for the output end of different IIC controllers to be connected from different switches, and for different switches, establishes individually communication from different IIC peripheral hardwares with the IIC controller for controlling different.The present invention realizes that the controller of one or more IIC and the equipment of numerous IIC carry out information exchange in a manner of a kind of exchange, not only communication speed and efficiency ensure that but also saved PCB surface product and small product size, the purchase quantity for reducing application-specific integrated circuit, greatly reduces cost.
Description
Technical field
The present invention relates to IIC controller field, in particular to a kind of IIC exchange system and its control method.
Background technique
Mainstream SOC (system level chip) controller generally comprises the controller of 2 to 3 IIC (IC bus) at present,
The application-specific integrated circuit (integrated circuit) of addition bus extension IIC, in this way meeting are generally required when handling up to 32 to 128 IIC peripheral hardwares
The purchase quantity for influencing communication speed and efficiency, and will lead to application-specific integrated circuit becomes more, very cost of idleness.
Summary of the invention
The technical problem to be solved by the present invention is in order to overcome in the prior art SOC controller handling multiple IIC peripheral hardwares
When need to add the application-specific integrated circuit of bus extension IIC, cause to influence communication speed and efficiency, the defect of cost of idleness provide one kind
IIC exchange system and its control method.
The present invention is to solve above-mentioned technical problem by following technical proposals:
The present invention provides a kind of IIC exchange systems, comprising:
SOC controller, inside include at least one IIC controller；
Several switches are connected between the output end of all IIC controllers and the input terminal of IIC peripheral hardware；
Logic control module for the output end of different IIC controllers to be connected from different switches, and is difference
Switch distribute different IIC peripheral hardware address, established with the IIC controller for controlling different with different IIC peripheral hardwares and individually communicated.
Preferably, the Logic control module is also used to after IIC controller completes communication with corresponding IIC peripheral hardware, weight
Newly distributes IIC peripheral hardware that corresponding IIC peripheral hardware is individually communicated, and redistributed for each IIC controller and lead to before
The IIC peripheral hardware of letter is not identical.
Preferably, the IIC peripheral hardware address that the Logic control module is different switch distribution is iic bus address, with
It controls different switches to be connected to from different iic bus, is respectively connected with multiple IIC peripheral hardwares on every iic bus.
Preferably, the quantity of the IIC peripheral hardware connected on every iic bus is 8.
Preferably, each switch includes two with opening with the sub switch closed, described two sub switchs for respectively with IIC
The data line of bus is connected to clock line.
Preferably, the Logic control module is used to obtain the current state of each IIC controller, and judge current state
Whether be busy, and when being judged as NO, be current state be not busy IIC controller distribute corresponding IIC peripheral hardware carry out it is independent
Communication.
The present invention also provides a kind of control methods of IIC exchange system, are realized using above-mentioned IIC exchange system,
The control method the following steps are included:
The output end of different IIC controllers is connected by S1, the Logic control module from different switches；
S2, the Logic control module are that different switches distributes different IIC peripheral hardware addresses, and controls different IIC
Controller establishes individually communication from different IIC peripheral hardwares.
Preferably, the control method is upon step s 2 further include:
S3, the Logic control module are again each IIC after IIC controller completes communication with corresponding IIC peripheral hardware
Controller distributes the IIC peripheral hardware that corresponding IIC peripheral hardware is individually communicated, and redistributed and the IIC peripheral hardware communicated before
It is not identical.
Preferably, step S2 is specifically included:
The Logic control module obtains the current state of each IIC controller, and judges whether current state is busy, and
It is current state is not that busy IIC controller distributes corresponding IIC peripheral hardware and individually communicated when being judged as NO.
The positive effect of the present invention is that: the present invention realizes the control of one or more IIC in a manner of a kind of exchange
The equipment of device processed and numerous IIC carry out information exchange, not only ensure that communication speed and efficiency but also have saved PCB (printed wiring board)
Area and small product size reduce the purchase quantity of application-specific integrated circuit, greatly reduce cost.
Detailed description of the invention
Fig. 1 is the module diagram of the IIC exchange system of present pre-ferred embodiments.
Fig. 2 is the electrical block diagram of the IIC exchange system of present pre-ferred embodiments.
Fig. 3 is the flow chart of the control method of the IIC exchange system of present pre-ferred embodiments.
Specific embodiment
The present invention is further illustrated below by the mode of embodiment, but does not therefore limit the present invention to the reality
It applies among a range.
As shown in Figs. 1-2, IIC exchange system of the invention includes SOC controller 1, several switches 2 and logic control mould
Block 3；
It wherein, include at least one IIC controller 11 inside SOC controller 1；Several switches 2 are then connected to all
Between the output end of the IIC controller 11 and the input terminal of IIC peripheral hardware 4；
Logic control module 3 is then used to for the output end of different IIC controllers 11 being connected from different switches 2, and
Different IIC peripheral hardware addresses is distributed for different switches 2, is built with the IIC controller 11 for controlling different from different IIC peripheral hardwares 4
Vertical individually communication；Also, after IIC controller 11 completes communication with corresponding IIC peripheral hardware 4, the Logic control module 3 is also heavy
Newly for each IIC controller 11 distribute IIC peripheral hardware that corresponding IIC peripheral hardware 4 is individually communicated, and redistributed with before
The IIC peripheral hardware of communication is not identical.
In specific implementation process of the invention, IIC peripheral hardware is connected to especially by iic bus with switch, and an IIC is total
Can connect multiple IIC peripheral hardwares on line, so this multiple IIC peripheral hardware can by iic bus and the same IIC controller into
Row individually communication, specifically, the quantity of the IIC peripheral hardware connected on an iic bus is 8；To the Logic control module
3 can be with for iic bus address, to control different switch and different IIC for the IIC peripheral hardware address of different switch distribution
Bus connection, and then control each IIC controller and individually communicated with multiple IIC peripheral hardwares respectively.
And preferably, each switch includes two with opening with the sub switch closed, described two sub switchs for respectively with
The data line (SDA line) of iic bus is connected to clock line (SCL line)；
Specifically, the Logic control module 3 is used to obtain the current state of each IIC controller 11, and judges current
Whether state is busy, and when being judged as NO, and be current state is not that busy IIC controller distributes corresponding IIC peripheral hardware and carries out
Individually communication.
Specifically as shown in Fig. 2, it illustrates the signals of the circuit structure of the IIC exchange system of one embodiment of the present of invention
Figure, wherein SOC controller specifically includes two IIC controllers, therefore wherein merely illustrates the output port of two IIC controllers
(i.e. IIC1Port0 and IIC2Port1) passes through switch SW IN0 and SW IN1 and is connected with several switches, respectively although figure
In four switch SW 00, SW10 ... SW 0F, SW 1F are only shown, but using intermediate ellipsis specifically indicates include use 0-9 with
And the switch of A-F characterization；And the Logic control module (i.e. CPLD in Fig. 2, Complex Programmable Logic Devices) specifically can be
Different switches distribute different iic bus addresses, to control different switch from different iic bus (specifically in Fig. 2
Indicated with SDA 0, SCL0 ... SDA F, SCLF) connection, and be respectively connected with 8 IIC peripheral hardwares in every bus and (specifically scheming
Each bus is respectively indicated in 2 with IIC Device00-IICDevice07 ... IIC DeviceF0-IIC DeviceF7
On 8 peripheral hardwares), and the concrete operating principle of IIC exchange system of the invention is then as described above.
The present invention is by completing exchange function plus control logic (Switch Control Logic) to all switches (SW)
Can, and take full advantage of time-division multiplex technology；And by adding control logic (SDA Signal to all SDA signals
Detect and Control Logic) complete bi-direction data signal communication control.And specifically, control logic (Switch
Control Logic) it is opened by receiving the control command of the GPIO (universal input/output interface) of SOC controller to corresponding
Pass turns on and off, and subsequent communication will individually carry out data communication according to the channel of distribution.
Control logic is individually communicated by receiving the control command of the IIC1 of SOC to distribute IIC1 with a switch, simultaneously
Control command by receiving the IIC2 of SOC individually communicates to distribute IIC2 with another switch, by exchanging and being time-multiplexed
Improve the handling capacity of IIC exchange system.
And in specific communication, the IIC1 and IIC2 of SOC is assigned to specified different IIC by control logic as needed
In bus, and then the interaction that the peripheral hardware on different IIC controller and different bus carries out data is realized, and complete in communication
IIC1 and IIC2 are assigned to again on new iic bus by control logic afterwards and continue data interaction.
The part control routine of IIC exchange system of the invention is provided below, specific as follows:
One, SOC control routine (residing in SOC controller)
Two, logic controller code (residing in CPLD)
module Sampling_Sensors(RESET,IIC1_CLK,IIC1_SDA,IIC1_CS,IIC2_CLK,
IIC2_SDA,IIC2_CS,DEVn_CLK,DEVn_SDA,DEVn_CS,GPIOn)；The configuration of // logic port
input RESET；The definition of // reseting input signal
input IIC1_CLK,IIC1_CS；The definition of //IIC1 input signal
inout IIC1_SDA,IIC2_SDA；//IIC1&IIC2 data defining signal
input IIC2_CLK,IIC2_CS；The definition of //IIC2 input signal
inout[15:0]DEVn_SDA；The data defining signal of // 16 IIC peripheral hardwares
input[5:0]GPIOn；// 6 address input signals
output IIC1_MISO；The definition of //IIC1 output signal
output IIC2_MISO；The definition of //IIC2 output signal
output[15:0]DEVn_CLK；// 16 IIC peripheral clocks are defined from CPLD input signal
output[15:0]DEVn_CS；// 16 IIC peripheral hardware piece choosings are defined from CPLD input signal
wire[1:0]SW_IN；// internal connect controls signal
wire[1:0]SDA_IN；// internal connect controls signal
wire[15:0]SW0；// internal connect controls signal, SW01 to SW0F
wire[15:0]SW1；// internal connect controls signal, SW11 to SW1F
IIC_DEVU1(.IIC_DEV_SDA(DEVn_SDA),.IIC_DEV_CS(DEVn_CS),.IIC_CLK(IIC1_
CLK),.IIC_SDA(IIC1_SDA),.IIC_CS(IIC1_CS),.DEV(GPIOn1,GPIOn2,GPIOn3,GPIOn4,
GPIOn5))；
// analytic signal and the input/output relation that DEVn_SDA0 to DEVn_SDA15 and IIC1_SDA are set
IIC_DEVU2(.IIC_DEV_SDA(DEVn_SDA),.IIC_DEV_CS(DEVn_CS),.IIC_CLK(IIC2_
CLK),.IIC_SDA(IIC2_SDA),.IIC_CS(IIC2_CS).DEV(GPIOn1,GPIOn2,GPIOn3,GPIOn4,
GPIOn5))；
// analytic signal and the input/output relation that DEVn_SDA0 to DEVn_SDA15 and IIC2_SDA are set
2To4Decode U3(.A(SW_IN),.CTL(GPIOn0))；// toggle path is to corresponding IIC
4To16Decode U5(.A(SW0),.DEV(GPIOn2,GPIOn3,GPIOn4,GPIOn5))；// toggle path
To corresponding DEVn SCL
4To16Decode U6(.A(SW1),.DEV(GPIOn2,GPIOn3,GPIOn4,GPIOn5))；// toggle path
To corresponding DEVn SDA
endmodule
The present invention also provides a kind of control methods of IIC exchange system, are realized using above-mentioned IIC exchange system,
As shown in figure 3, the control method the following steps are included:
The output end of different IIC controllers is connected by step 101, the Logic control module from different switches；
Step 102, the Logic control module are that different switches distributes different IIC peripheral hardware addresses, and controls difference
IIC controller establish individually communication from different IIC peripheral hardware；
Step 103, the Logic control module are every after IIC controller completes communication with corresponding IIC peripheral hardware again
A IIC controller distributes the IIC peripheral hardware that corresponding IIC peripheral hardware is individually communicated, and redistributed and the IIC communicated before
Peripheral hardware is not identical.
And preferably, specifically include in a step 102: the Logic control module obtains working as each IIC controller
It is not busy IIC controller distribution that preceding state, and judge whether current state is busy, and when being judged as NO, which is current state,
Corresponding IIC peripheral hardware is individually communicated.
Although specific embodiments of the present invention have been described above, it will be appreciated by those of skill in the art that this is only
For example, protection scope of the present invention is to be defined by the appended claims.Those skilled in the art without departing substantially from
Under the premise of the principle and substance of the present invention, many changes and modifications may be made, but these change and
Modification each falls within protection scope of the present invention.
Claims (9)
1. a kind of IIC exchange system characterized by comprising
SOC controller, inside include at least one IIC controller；
Several switches are connected between the output end of all IIC controllers and the input terminal of IIC peripheral hardware；
Logic control module is opened for the output end of different IIC controllers to be connected from different switches, and to be different
It closes and distributes different IIC peripheral hardware addresses, individually communication is established from different IIC peripheral hardwares with the IIC controller for controlling different.
2. IIC exchange system as described in claim 1, which is characterized in that the Logic control module is also used to control in IIC
After device completes communication with corresponding IIC peripheral hardware, corresponding IIC peripheral hardware is distributed for each IIC controller again and is individually communicated,
And the IIC peripheral hardware redistributed and the IIC peripheral hardware communicated before be not identical.
3. IIC exchange system as described in claim 1, which is characterized in that the Logic control module is different switch point
The IIC peripheral hardware address matched is iic bus address, is connected to the switch for controlling different from different iic bus, every iic bus
On be respectively connected with multiple IIC peripheral hardwares.
4. IIC exchange system as claimed in claim 3, which is characterized in that the number of the IIC peripheral hardware connected on every iic bus
Amount is 8.
5. IIC exchange system as claimed in claim 3, which is characterized in that each switch includes two and opens together with the son closed
Switch, described two sub switchs with the data line of iic bus and clock line for being connected to respectively.
6. IIC exchange system as described in claim 1, which is characterized in that the Logic control module is for obtaining each IIC
It is not busy IIC that the current state of controller, and judge whether current state is busy, and when being judged as NO, which is current state,
Controller distributes corresponding IIC peripheral hardware and is individually communicated.
7. a kind of control method of IIC exchange system, which is characterized in that it is using as described in any one of claim 1-6
IIC exchange system realize, the control method the following steps are included:
The output end of different IIC controllers is connected by S1, the Logic control module from different switches；
S2, the Logic control module are that different switches distributes different IIC peripheral hardware addresses, and controls different IIC control
Device establishes individually communication from different IIC peripheral hardwares.
8. the control method of IIC exchange system as claimed in claim 7, which is characterized in that the control method is in step S2
Later further include:
S3, the Logic control module are again each IIC control after IIC controller completes communication with corresponding IIC peripheral hardware
Device distributes the IIC peripheral hardware that corresponding IIC peripheral hardware is individually communicated, and redistributed and the IIC peripheral hardware communicated before not phase
Together.
9. the control method of IIC exchange system as claimed in claim 7, which is characterized in that step S2 is specifically included:
The Logic control module obtains the current state of each IIC controller, and judges whether current state is busy, and is sentencing
Break when being no, be current state is not that busy IIC controller distributes corresponding IIC peripheral hardware and individually communicated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811612235.0A CN109684264A (en) | 2018-12-27 | 2018-12-27 | IIC exchange system and its control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811612235.0A CN109684264A (en) | 2018-12-27 | 2018-12-27 | IIC exchange system and its control method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109684264A true CN109684264A (en) | 2019-04-26 |
Family
ID=66190563
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811612235.0A Pending CN109684264A (en) | 2018-12-27 | 2018-12-27 | IIC exchange system and its control method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109684264A (en) |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5636342A (en) * | 1995-02-17 | 1997-06-03 | Dell Usa, L.P. | Systems and method for assigning unique addresses to agents on a system management bus |
| US6745270B1 (en) * | 2001-01-31 | 2004-06-01 | International Business Machines Corporation | Dynamically allocating I2C addresses using self bus switching device |
| CN101630298A (en) * | 2009-07-28 | 2010-01-20 | 中兴通讯股份有限公司 | Serial bus slave address setting system |
| US20110055442A1 (en) * | 2009-08-27 | 2011-03-03 | Ward Michael G | Linear or rotational motor driver identification |
| CN102081586A (en) * | 2011-01-25 | 2011-06-01 | 鸿富锦精密工业（深圳）有限公司 | Multiple I2C (Inter-IC) slot circuit system and method for transmitting I2C signal |
| CN104899177A (en) * | 2015-06-30 | 2015-09-09 | 深圳市兰丁科技有限公司 | I2C (inter-integrated circuit) equipment control method and system |
| CN106164887A (en) * | 2014-02-28 | 2016-11-23 | 飞利浦灯具控股公司 | Bus address distributes |
| CN106547718A (en) * | 2016-12-08 | 2017-03-29 | 东莞钜威动力技术有限公司 | A bus address allocation method and battery management system |
| CN107577630A (en) * | 2017-08-30 | 2018-01-12 | 武汉市敏控科技有限公司 | A kind of expansion module automatic addressing system |
| CN107885690A (en) * | 2017-10-13 | 2018-04-06 | 上海剑桥科技股份有限公司 | SPI exchange systems and its control method |
-
2018
- 2018-12-27 CN CN201811612235.0A patent/CN109684264A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5636342A (en) * | 1995-02-17 | 1997-06-03 | Dell Usa, L.P. | Systems and method for assigning unique addresses to agents on a system management bus |
| US6745270B1 (en) * | 2001-01-31 | 2004-06-01 | International Business Machines Corporation | Dynamically allocating I2C addresses using self bus switching device |
| CN101630298A (en) * | 2009-07-28 | 2010-01-20 | 中兴通讯股份有限公司 | Serial bus slave address setting system |
| US20110055442A1 (en) * | 2009-08-27 | 2011-03-03 | Ward Michael G | Linear or rotational motor driver identification |
| CN102081586A (en) * | 2011-01-25 | 2011-06-01 | 鸿富锦精密工业（深圳）有限公司 | Multiple I2C (Inter-IC) slot circuit system and method for transmitting I2C signal |
| CN106164887A (en) * | 2014-02-28 | 2016-11-23 | 飞利浦灯具控股公司 | Bus address distributes |
| CN104899177A (en) * | 2015-06-30 | 2015-09-09 | 深圳市兰丁科技有限公司 | I2C (inter-integrated circuit) equipment control method and system |
| CN106547718A (en) * | 2016-12-08 | 2017-03-29 | 东莞钜威动力技术有限公司 | A bus address allocation method and battery management system |
| CN107577630A (en) * | 2017-08-30 | 2018-01-12 | 武汉市敏控科技有限公司 | A kind of expansion module automatic addressing system |
| CN107885690A (en) * | 2017-10-13 | 2018-04-06 | 上海剑桥科技股份有限公司 | SPI exchange systems and its control method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8751069B2 (en) | Dynamically reconfigurable electrical interface | |
| CN105049551A (en) | System and method for automatically distributing address via bus | |
| CN102193056A (en) | Test apparatus and test method | |
| CN110162496A (en) | A method of realizing that the port PCIE automatically configures based on central processing unit | |
| CN210324188U (en) | Integrated circuit bus IIC master-slave competition automatic switching equipment and system thereof | |
| US8890600B1 (en) | Bus sharing scheme | |
| US8478927B2 (en) | USB hub supporting unequal numbers of high-speed and super-speed ports | |
| CN107959806A (en) | A kind of binodal point server KVM switches circuit | |
| CN105589384B (en) | A kind of multi-channel digital amount input/output unit based on FPGA | |
| CN207817688U (en) | A kind of serial communication bus interface circuit of compatible different agreement | |
| CN103412833A (en) | CPCI (Compact Peripheral Component Interconnect) bus scanning ADC (Analog-to-Digital Converter) function module driver under VxWorks operating system and control method thereof | |
| CN109684264A (en) | IIC exchange system and its control method | |
| CN105261278A (en) | Camera module group demonstration tool system, and communication and detection method thereof | |
| CN114490214A (en) | Aging test interface extension module and aging test system | |
| CN108519763B (en) | Control circuit and apparatus control method | |
| EP3206106A1 (en) | Power-domain assignment | |
| EP2525276B1 (en) | Drive system adaptable to a matrix scanning device | |
| CN103095739A (en) | Cabinet server system and node communication method thereof | |
| CN214540463U (en) | Relay board for switching and detecting multiple paths of signals | |
| CN205945978U (en) | Intelligence tiled display device | |
| CN108345231A (en) | Power equipment linkage control method, system and device | |
| CN104685427A (en) | Intelligent electronic device suitable for use in a substation automation system and method of operating the same | |
| CN116416890A (en) | Method and device for reducing power consumption of display panel module and chip | |
| CN105700511B (en) | Device of utilizing ground wire to replace slave control units automatically and master-slave matching method thereof | |
| TWI822502B (en) | Jtag interface of jtag hub enable and disable control system and method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20191211 Address after: 201114 room 8, building 2388, 501 Chen Cheng Road, Shanghai, Minhang District Applicant after: CIG SHANGHAI Co.,Ltd. Address before: 201114 room 8, building 2388, 501 Chen Cheng Road, Shanghai, Minhang District Applicant before: CIG SHANGHAI Co.,Ltd. Applicant before: CIG ZHEJIANG Co.,Ltd. |
|
| TA01 | Transfer of patent application right | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190426 |
|
| RJ01 | Rejection of invention patent application after publication |