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用于空间光调制器的象素控制电路

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CN1095820A
CN1095820A CN 94101778 CN94101778A CN1095820A CN 1095820 A CN1095820 A CN 1095820A CN 94101778 CN94101778 CN 94101778 CN 94101778 A CN94101778 A CN 94101778A CN 1095820 A CN1095820 A CN 1095820A
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pixel
control
modulator
circuitry
spatial
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CN 94101778
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CN1057614C (zh )
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凯文·L·科恩赫
詹姆斯·L·康纳
克劳德·E·托
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德克萨斯仪器股份有限公司
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3433Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices
    • G09G3/346Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices based on modulation of the reflection angle, e.g. micromirrors
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/74Projection arrangements for image reproduction, e.g. using eidophor
    • H04N5/7416Projection arrangements for image reproduction, e.g. using eidophor involving the use of a spatial light modulator, e.g. a light valve, controlled by a video signal
    • H04N5/7458Projection arrangements for image reproduction, e.g. using eidophor involving the use of a spatial light modulator, e.g. a light valve, controlled by a video signal the modulator being an array of deformable mirrors, e.g. digital micromirror device [DMD]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0804Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0857Static memory circuit, e.g. flip-flop
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/10Dealing with defective pixels

Abstract

一种空间光调制器(10),它具有比现有器件减少 的控制电路。多组象素单元(11)共用一个存储单元 (12),因此每个存储单元(12)具有与其它存储单元 (12)相同的输出端数。一组中的各象素单元(11)通 过复位线(13)转换其通或断状态,这独立于该组中其 它象素单元的状态。帧数据在一组时间周期内加载 于分比特-帧,这样每一分比特-帧仅包含对应于在 一根复位线(13)上的象素单元(11)的数据。

Description

本发明涉及空间光调制器,尤其涉及那些被称之为可变形镜器件的调制器,更具体地涉及用于控制各象素单元的通断状态的电路。

空间光调制器(SLM)由一个可电子寻址的象素单元阵列和相关控制电路组成。典型用途是用于图象显示,其中,来自各象素的光被放大并通过一光学系统投射到显示屏上。调制方式取决于调制器如何与光学系统组合。

SLM的常用形式为可变形镜器件,其中,各象素单元均为一个能够相应于电输入独立运动的细小的微机械镜。入射光可按方向、相位或幅度进行调制,以便由各象素反射。

对于许多应用而言,SLM是双态制的,即,各象素单元均可具有两种状态中的任一种。单元可以是关断的,这意味着它不传输光,或是开通的,这意味着它以最大强度传输光。为实现光的中间态的视觉,有几种脉宽调制技术可以采用。这些技术描述于序号为No.07/678,761、名称为“用于脉宽调制显示系统的DMD构造和计时”的在审美国专利申请中,该申请与本申请委托了相同代理人。

一般情况下,在每帧期间,通过将每一象素开通或关断一个与二进制数相应的时间段,脉宽调制产生一个累积亮度。脉宽调制使用各种向SLM加载的方式,例如“比特-帧”加载法,其中,在一个时刻向整帧的每个象素加载一比特。每个象素单元具有一个存储单元。存储单元的整个阵列按每单元一比特加载,随后将所有象素单元设定为与数据的该比特-帧相应。在目前的比特-帧显示期间,用于下一比特-帧的数据被载入。因此,例如对于8比特象素亮度量化方式而言,SLM每帧内要加载8次,在一个时刻对应每帧的一个象素。在这种方法中,对于n-比特亮度量化而言,最高比特显示帧周期的1/2,次高比特显示1/4帧周期,等等,最低比特(LSB)的显示时间为1/2n帧周期。

现有的象素加载技术存在的问题是,对于每一象素单元,这些技术要求至少一个存储单元。随着每帧内象素量的增加,SLM器件的存储要求导致成本增加和生产率降低。所需要的是减少了用于控制象素单元的电路的SLM。

对于每一象素单元使用一存储单元的加载方式,还将一个象素可被设定的最小时间限制于将比特-帧加载于存储阵列所需的时间。当采用脉宽调制时,对应于LSB的显示时间是最短显示时间。在此LSB时间内,用于下一帧的数据必须被载入。当要求“峰值”数据率时,这便是时间周期。为满足此峰值数据率,一确定的峰尖计数(Pin    count)和相应的数据频率必须是可以获取的。高的峰值数据率会转换成高的峰尖计数和/或高频率,这会增加器件和/或系统的成本。所需要的是降低了峰值数据率的SLM。

本发明的第一方面是一种具有独立控制的象素单元的空间光调制器(SLM),每个象素单元可根据传送至该象素单元的数据信号的量值被设定和转换至两种状态的任一种状态。此SLM具有一个象素单元阵列,每一单元具有两个可能的状态,这种状态取决于从相关存储单元传送至该单元的数据信号的量值。此SLM还具有多个存储单元,每个存储单元可与一组象素单元进行数据传送。每个存储单元存储表示其(象素单元)组中的一个象素单元的通或断状态的数据量值。并将表示此数据量值的一个信号传送至其组中的象素单元。多根复位线如此连接至象素单元,即,一根不同的复位线与一组中的每一个象素单元连通。因此,复位线可用于在一个时刻仅仅使一组中的一个象素单元复位。

本发明的技术优越性在于,单个存储单元控制一组象素单元。这使对应于每个象素的电路减小,其效果是降低了器件成本并提高了生产率。另外,发生加载时所必须具有的峰值数据率降低了,因为对于任一复位而言仅有较少的存储单元加载。这具有减少峰尖计数和/或降低数据频率要求的效果,并具有进一步降低器件和/或系统成本的效果。

图1是一个SLM阵列的一部分的方框图,它具有带对应于四个象素单元的输出端的存储单元。

图2示出一个具有对应于四个象素的输出端的存储单元。

图3示出SLM的镜元件的双稳工作状态。

图4和5示出,对于具有导电的镜和铰接件的扭铰型象素单元阵列而言,如何容易地连接复位线。

图6是用于将一帧数据加至一存储单元阵列的数据序列的一个例子,每个存储单元具有对应于四个象素单元的输出端。

图7-9示出为提供改进的防故障性能而增加的实施例。

图1是SLM阵列10的一部分的方框图,此阵列具有象素单元11,这些象素单元通过存储单元12和复位线13控制。图中只示出少量的带有其相关控制电路的象素单元11;而一个典型的SLM阵列10要有几千个这类的单元11。图1主要用于显示每个存储单元12如何配合多个象素单元11。有关象素单元11、存储单元12和复位线13之间的相互连接的其它细节在下面结合图2-5阐述。

为便于描述。SLM是一个被称为可变形镜器件(DMD)的器件。DMD具有细小的微机械镜元件的阵列,它可以被调制,以向观视者提供各种强度的视感。DMD的一个例子是由Texas    instruments,Inc.制造的DMD器件。不过,本发明不限于采用DMD作为SLM10,可采用其它类型的具有可寻址象素单元和相似特性的SLM,所述特性也就是,根据数据信号和复位控制信号工作,如下所述。

象素单元11以双稳态模式工作,这意味着存在两个稳定的状态。正如下面结合图3所阐述的,象素单元的运动方向可通过给它们“加载”来控制,即,利用来自其存储单元12的数据通过寻址电极“驱动”象素单元11。正如结合图3所进一步解释的那样,象素单元11的状态根据此驱动电压,即通过由复位电极施加差动偏压而改变。这里使用的术语“复位信号”是指传送至象素单元11而使它们改变状态的信号。

象素单元11分成各由四个象素单元11组成的组,每组与一个存储单元12相连。在与单个存储单元12相关的一组中的象素单元的数量被称作该存储单元12的“输出端数”。因此,在图1中,每个存储单元12具有对应四个象素的输出端数。本发明也适用于其它输出端数,这里采用四输出端仅是便于举例。

每个存储单元12可以是常用的SRAM(静态随机存取存储器)单元。许多目前的SLM10的设计的一个优点是,它们可以容易地集成在下面的CMOS控制电路上。本说明书中采用存储单元12,每个存储单元具有单位存储能力。不过,本发明的范围还可包括存储能力多于一位的存储单元或具有附加逻辑电路的存储单元。例如,每个存储单元12可具有双缓冲结构。

当象素电极11改变其状态时,四根复位线13控制时间。一旦对应于连接至一特定复位线13的象素单元11的所有存储单元12被加载,象素单元11的状态便根据已载入的数据并同时根据此复位线13上的复位信号而改变。换言之,象素电极11在由其存储单元12供给它们的数据改变时保持其电流状态,并且直至接收到复位信号。

在与存储单元12相关的四个象素单元的组中,每一象素单元11连至四根复位线13中的不同的一根。因此,在一组中的每个象素单元11可在与该组中的其它象素电极11不同的时间改变其状态。

通常,与一个存储单元12相关的每组象素单元11具有相同数量的象素单元,并且此数量与复位线13的数量相同。不过,可有(其它)例子,例如在象素单元阵列的边缘,一个存储单元12连至较少数量的象素单元。

图2示出一个含四个象素单元11的组、其存储单元12和复位线13、以及相关的互连线。每个象素单元11根据相连的复位线13来标记,即,象素单元11(A)连至复位线13(A)。正如所指出的,“1”或“0”值均可传送至象素单元11。当存储单元12转换时,这些值中的任一个传送至与此存储单元12相连的所有象素单元。在每个象素单元11的复位线13上的一个信号决定该象素单元是否将改变状态。

图3是典型的DMD型SLM10的单个象素单元11的断面示图。此空间光调制是由反射镜31实现的,此反射镜可在两个方向的任一个上倾斜。镜31的两个稳定状态由虚线标示出。在其稳定位置,镜31的一端向两个着陆(landing)电极32中的一个移动。两个寻址电极33连接至存储单元12的输出端,存储单元12的输出端包括此象素单元11。复位电压通过复位电极34施加至导电镜31。寻址电极33用于施加电位差,这样,镜31的一端被吸引到其下面的电极33,而另一端被排斥。电极34上的复位电压决定镜31是否将真正地转向相应的着陆电极32。因此,镜31通过其存储单元12被“加载”,并通过复位线13复位。如果在一选定方向上倾斜,例如趋向显示屏,此象素单元将“通”;否则它会倾斜而将光引向别处,比如引入陷阱(trap)。

图4是象素单元11的一个阵列的一部分的顶视平面图,象素单元11的复位线13通过扭铰件(torsion    hinges)41。正如图1和2中虚线所标示的,每个象素单元11与一个具有对应于四个象素单元11的输出端的存储单元12相配合。在本实施例中,象素单元11具有导电镜31和导电的扭铰件41,因此复位可直接通过扭铰件41施于镜31,而不需专门的连接或绝缘。在图4中,每个镜31具有一对扭铰件41,而象素单元11如此对准,以使扭铰件41沿水平线布置,从而使对复位线13的连接容易地沿这些水平线形成。

图5示出SLM10的另一种排列。如图5所示,每个存储单元12的输出端是对应象素单元11的垂直分离组。不过,复位连接是沿对角线方向的复位线13。正如图2和3中所示,每个象素单元11根据所连接的复位线13标记,即,象素单元11(A)连接至复位线13(A)。这种排列在SLM10中是有用的,在此如此使象素单元11对准是有益的,即,它们的扭铰件41沿对角线布置。

对于脉宽调制而言,SLM10的工作与现有的脉宽调制技术在下列方面基本一致,即,n-比特量值表示-帧周期内各象素单元11的亮度。n-比特量值的每一比特表示一个时间,在此时间内象素单元11是通的或断的。n-比特量值中的比特数在此称作“比特深度”。

为便于在此举例,假设每个象素单元11在一帧内按5比特的比特深度显示光。因此,例如,对于单帧而言,与单个存储单元12相关的一组中的四个象素单元11可能具有下列数据:象素1    ABCDE象素2    FGHIJ象素3    KLMNO象素4    PQRST其中{ABCDE}表示一个5比特的二进制量值。每比特的量值为“1”或“0”,它们各表示象素单元11的两种状态中的一种状态。

如果假设在LSB位置的“1”表示一个时间单元的“通”值,在MSB位置的“1”将表示16时间单元,以下的中间比特各需8,4和2时间单元。如果比特4为MSB,而比特0为LSB,那么由每个比特的“1”值表示的时间为:比特4(MSB)    16时间单元比特3    8时间单元比特2    4时间单元比特1    2时间单元比特0(LSB)    1时间单元因此,5-比特值越大,象素单元11在一帧内处于通状态的时间越长,在此帧内相对于其它象素单元11就越亮。

有关脉宽调制技术的进一步的细节描述于序号为No.07/678,761的美国专利申请中,该申请已在本专利申请的背景技术部分引出,并在此作为参考。

这里描述的脉宽调制技术利用了这样的事实,即,与存储单元12的转换速度性能相比,一些通或断时间是长的。本发明的一个根本前提条件是,单个存储单元12可以配合多个象素单元11,如果其数据载入是按没有一个以上的其象素单元11需要同时复位的原则排序的话。

通常,用于载入每帧数据的顺序取决于输出端数和比特深度。各种顺序均是可能的,但顺序应遵循的一个规则是,在一组中没有两个象素单元11可以同时要求加载。

除上段中的规则外,几种“任选的”规则也可采用。若假设有m个象素单元的输出,一种如此的规则是,在排序的开始,所有m个象素单元11在第一个m时间单元内加载。因此,每组中的每个象素单元11按最初时间段的连续顺序加载。此规则使帧间具有良好的隔离,并在一帧的结束和下一帧的开始之间具有m时间单元的最大时滞。另外,在第一个m-1时间段载入的数据应不是LSB数据。最后,对于任一象素单元11而言,数据应在一帧的相同位置开始和结束。这是确切的,因为对于n比特的比特深度而言,用于承载数据的数据单元的数量是2n-1数据单元。

图6示出一个数据排序的例子,此例子是用于具有四输出端的一个存储单元12,并采用全部上述规则。因此,这里m=4,并假设每一加载工序占用一个时间单元,与一个存储单元12相关的4个象素单元11用相同数据加载,但仅有一个象素单元11复位。与第一复位线13(A)相关的象素单元记为象素单元11(A),等等。

图6的加载顺序以下列方式用于5-比特数据帧:施载于象素11(A),比特4,和复位13(A)施载于象素11(B),比特3,和复位13(B)施载于象素11(C),比特2,和复位13(D)跳过2LSB时间单元施载于象素11(C),比特4,和复位13(C)跳过2LSB时间单元施载于象素11(B),比特0,和复位13(B)施载于象素11(B),比特1,和复位13(B)施载于象素11(D),比特1,和复位13(D)施载于象素11(B),比特4,和复位13(B)施载于象素11(D),比特0,和复位13(D)施载于象素11(D),比特2,和复位13(D)跳过1LSB时间单元施载于象素11(A),比特0,和复位13(A)施载于象素11(A),比特2,和复位13(A)施载于象素11(D),比特4,和复位13(D)跳过2LSB时间单元施载于象素11(A),比特3,和复位13(A)施载于象素11(C),比特0,和复位13(C)施载于象素11(C),比特1,和复位13(C)跳过1LSB时间单元施载于象素11(C),比特3,和复位13(C)跳过2LSB时间单元施载于象素11(B),比特2,和复位13(B)施载于象素11(A),比特1,和复位13(A)跳过1LSB时间单元采用帧缓冲器(未示出)的缓冲可用于安排数据于正确的顺序。一帧数据(此数据填充SLM10的阵列)被分成四个“分比特-帧”。对于第一分比特-帧而言,对于与存储单元12相关的各组中的每个象素单元11(A),比特4将是合适的定序,以便在一个时间单元内加载,这样SLM10的1/4便承载了。随后,对于每个象素单元11(B)而言,所有比特3将被定为第二分比特-帧,以便加载,等等。

数据排序的整体效果是,对于每一帧而言,象素单元11的整个阵列是按象素组复位的,而不是同时复位。因此,复位是以“分复位”图形方式发生,即,那些连至单一复位线13的象素单元11同时转换;

与现有的脉宽调制技术相同,显示一个全n-比特帧要用2n-1 LSB时间单元。不过,每一加载步骤伴随较少的存储量增加,因而可在较少时间内完成。在此说明例中,对于每个复位信号,比特-帧的1/4被加载。换言之,每比特-帧要用四个复位信号。与现有脉宽调制技术不同,每比特-帧可显示来自不同比特的数据。

作为本发明的加载技术的一个结果,峰值数据率降低了。另外,虽然每帧内加载次数增加,但较高值比特不再相对于所有象素单元11同时发生。因此,在这些较高值比特的显示时间内不再等待。平均数据率和峰值数据率更为接近。

每个存储单元12的最大输出端数取决于比特深度。若比特深度为n,理论上的最大输出端数(fanoutmax)可按下式计算:

最大输出端数= (2n-1)/(n)上述等式的分子表示每帧有2n-1时间段。分母表示每个输出端需要n种状态(event)。

对于各种比特深度和输出端数;可利用计算机程序来确定合适的顺序。以规则为基础的程序将防止违反上述规则及其它可选规则,上述规则禁止在一组中一个以上的象素单元11同时要求复位。

本发明的改进方法将上述“分复位”程序与“阻透技术(block    clearing)”相组合。阻透技术已与现有的脉宽调制方法联用,以避免在一个LSB时间单元内不得不对整体比特-帧加载的问题。对于阻透技术而言,比特-帧在LSB时间单元的全倍数中加载。在SLM10上设有一机构,以允许所有象素单元11快速成为“清楚的”,即,转换至“断”状态。因此,那些“通”时间少于加载所需时间的比特-帧可被给出合适的权。在一帧内时间单元的总数超过最大亮度时间乘以为清楚化所用的时间单元数。因此,在部分加载过程中具有处于“断”状态的象素单元11的序列的后果是SLM10的光效的降低。阻透技术的总体概念描述于序号为No.07/678,761的美国专利申请中。

图7示出图1-5的SLM10的改进形式,尤其是关于各存储单元12和与其输出端相应的象素单元11的互连。为降低在任一象素单元11处出现故障造成的影响,在每一数据连线上包括一电阻元件,本例中为电阻器71。例如,在象素单元11的一个中出现的短路将不会导致该组中剩余象素单元11失效。

如上所述,许多SLM10的特征是,它们可容易地采用集成电路工艺制造。在这些类型的SLM10中,电阻器71可由多晶硅材料制造。另外,高电阻材料可用于电极接触。再者,作为对附加电阻区域或元件的一种替换,象素单元电极,例如图3中的电极33,可由具有高表面电阻的材料制成,例如氮化钛或氮氧化钛。

图8示出SLM10的另一种防故障改进形式。用二极管81替代电阻器71,作为电阻元件来隔离在任一象素单元11处产生的故障。

图9示出第三种防故障改进形式。保险丝91用于在有短路的象素单元11处“隔断”。齐纳二极管92或一些其它形式的击穿型二极管提供高的对地电阻。

尽管已参照特定实施例对本发明进行了描述,但这种描述并不意味着局限于此。对于本领域的普通技术人员而言,所公开的实施例的各种修改以及变换的实施例将是清楚的。因此,应当理解,所附权利要求书覆盖了属于本发明的真正范围内的所有改进。

Claims (16)

1.一种空间光调制器,包括:一个象素单元阵列,每个象素单元可以根据从一相关存储单元传送至该象素单元的数据信号的量值独立地设定或复位至两种状态中的任一状态;多个存储单元,每个可与所述阵列的一组象素单元进行数据传送,以便存储表示所述组的一象素单元的通或断状态的数据量值,并将表示所述数据量值的信号传送至其组中的象素单元;以及多根复位线,它们如此连至所述象素单元,即,不同的复位线与一象素单元组中的每个象素单元相连。
2.根据权利要求1的空间光调制器,其中,每个象素单元组包括四个象素单元。
3.根据权利要求1的空间光调制器,其中,所述象素单元是微机械镜元件。
4.根据权利要求1的空间光调制器,其中,所述象素单元具有导电镜,所述复位线直接连至所述镜。
5.根据权利要求1的空间光调制器,其中,所述象素单元具有导电的扭铰件,所述复位线通过所述扭铰件连接。
6.根据权利要求5的空间光调制器,其中,所述扭铰件在水平方向排成行。
7.根据权利要求5的空间光调制器,其中,所述扭铰件沿对角线排列。
8.根据权利要求1的空间光调制器,其中,每个所述象素元件具有一对用于传送所述数据信号的寻址电极,并进一步包括一个电阻元件,此电阻元件位于一象素单元的寻址电极和与该象素元件相关的存储单元之间,以便在一象素元件失效时隔离所述象素元件。
9.根据权利要求1的空间光调制器,其中,每个所述象素单元具有一对由高阻材料制成的寻址电极,以便在一象素单元失效时隔离所述象素单元。
10.根据权利要求8的空间光调制器,其中,所述空间光调制器是制备于所述存储单元的集成电路阵列之上。
11.一种采用空间光调制器对多-比特帧数据帧进行脉宽调制的方法,所述调制器具有一个象素单元阵列,该方法包括下列步骤:将每帧数据的显示时间分成相等的时间单元;将每帧数据分成多个分比特-帧,每个分比特-帧包括对应于连至相关复位线的象素单元的数据;将表示所述数据的分比特-帧的数据传送至所述存储单元,其中每个存储单元接收表示仅仅一个其象素单元的通或断状态的数据比特;通过采用各存储单元将表示由该存储单元接收的数据比特的数据信号施加至其相关象素单元,而对所述象素单元加载;通过采用复位信号改变连至所述复位线的所有象素单元的状态,而使所述象素单元转换状态;对一数据帧内的数据的各分比特-帧重复上述传送、加载和转换步骤。
12.根据权利要求11的方法,其中,第一加载步骤与帧时间周期的起始同时发生。
13.根据权利要求11的方法,其中,连至每根复位线的象素单元在接收包含最低比特的分比特-帧之前接收至少一个包含较高比特值的分比特-帧。
14.根据权利要求11的方法,其中,所述分时步骤是这样实现的,每个时间段表示对应于每个数据值的数据的最低比特的显示时间。
15.根据权利要求11的方法,其中,所述加载步骤和所有重复的加载步骤是这样实现的,一组中的每个象素单元在最初时间段的连续时序间加载。
16.根据权利要求11的方法,其中,所述加载步骤是这样实现的,对应于各组中任一象素单元的数据在各帧的相同位置开始和结束。
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EP0610665B1 (en) 1997-09-10 grant
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US5548301A (en) 1996-08-20 grant

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