CN109545917B - Quaternary flip chip type LED structure and manufacturing method - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
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- 238000002955 isolation Methods 0.000 claims abstract description 42
- 239000002184 metal Substances 0.000 claims abstract description 25
- 229910052751 metal Inorganic materials 0.000 claims abstract description 25
- 239000004065 semiconductor Substances 0.000 claims description 83
- 238000005530 etching Methods 0.000 claims description 6
- 239000000463 material Substances 0.000 description 23
- 238000000034 method Methods 0.000 description 19
- 125000006850 spacer group Chemical group 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 229910052593 corundum Inorganic materials 0.000 description 3
- 229910001845 yogo sapphire Inorganic materials 0.000 description 3
- 229910009815 Ti3O5 Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N titanium dioxide Inorganic materials O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
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- H—ELECTRICITY
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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Abstract
The invention provides a quaternary flip chip LED structure and a manufacturing method thereof, wherein the quaternary flip chip LED structure reflects light in the quaternary flip chip LED structure by arranging a first isolation layer, a metal reflection layer and a second isolation layer on the corresponding side wall and bottom of an epitaxial layer of the quaternary flip chip LED structure so as to enable the light to be emitted at one side of a transparent substrate, and the light emitting efficiency of the quaternary flip chip LED structure is improved.
Description
Technical Field
The invention relates to the technical field of LED (light-emitting diode) processes, in particular to a quad flip-chip LED structure and a manufacturing method thereof.
Background
With the continuous development of science and technology, various LEDs (Light Emitting diodes) have been widely used in daily life, work and industry of people, and bring great convenience to people's life.
However, the current red flip-chip LED has the problem of light leakage at the sidewall and bottom.
Disclosure of Invention
In view of the above, to solve the above problems, the present invention provides a quad flip chip LED structure and a manufacturing method thereof, and the technical scheme is as follows:
a quad flip chip LED structure, the quad flip chip LED structure comprising:
a transparent substrate;
the epitaxial layer is arranged on the transparent substrate and comprises a P-type semiconductor layer, a MQW multi-quantum well layer and an N-type semiconductor layer which are sequentially arranged on the transparent substrate in a first direction, the coverage areas of the MQW multi-quantum well layer and the N-type semiconductor layer are the same, one side wall of the P-type semiconductor layer is flush with one side wall of the MQW multi-quantum well layer, the other side wall of the P-type semiconductor layer extends out of the other side wall of the MQW multi-quantum well layer for a preset length, and the first direction is perpendicular to the transparent substrate and points to the P-type semiconductor layer from the transparent substrate;
a first isolation layer surrounding the side wall of the N-type semiconductor layer, the side wall of the MQW multi-quantum well layer, the surface of the N-type semiconductor layer, which faces away from the MQW multi-quantum well layer, and the side wall of one side of the P-type semiconductor layer;
the metal reflecting layer is arranged on one side, away from the epitaxial layer, of the first isolation layer;
the second isolating layer is arranged on one side, away from the first isolating layer, of the metal reflecting layer;
an electrode groove penetrating the first isolation layer, the metal reflection layer and the second isolation layer;
the first electrode is in contact connection with the N-type semiconductor layer through the electrode groove and is not in contact with the metal reflecting layer;
and a second electrode in ohmic contact with a surface of the MQW multi-quantum well layer adjacent to the P-type semiconductor layer.
Preferably, the material of the first isolation layer is Al2O3Or SiN or SiO.
Preferably, the thickness of the N-type semiconductor layer is 0.5 to 5 micrometers, inclusive.
Preferably, the material of the N-type semiconductor layer is an AlGaInP material.
Preferably, the thickness of the MQW multi-quantum well layer is 0.5 micron to 3 microns, inclusive.
Preferably, the thickness of the P-type semiconductor layer is 3 micrometers to 10 micrometers, inclusive.
Preferably, the material of the P-type semiconductor layer is GaP material.
A manufacturing method of a quad flip chip LED structure comprises the following steps:
providing a first substrate;
growing an epitaxial layer on the first substrate, wherein the epitaxial layer comprises an N-type semiconductor layer, an MQW multi-quantum well layer and a P-type semiconductor layer which are sequentially grown in a second direction, and the second direction is perpendicular to the first substrate and points to the N-type semiconductor layer from the first substrate;
providing a second substrate, wherein the second substrate is a transparent substrate;
transferring the epitaxial layer to the second substrate, and contacting the P-type semiconductor layer with the second substrate;
etching the epitaxial layer until the P-type semiconductor layer is exposed, wherein the coverage areas of the MQW multi-quantum well layer and the N-type semiconductor layer are the same, the side wall of one side of the P-type semiconductor layer is flush with the side wall of one side of the MQW multi-quantum well layer, and the side wall of the other side of the P-type semiconductor layer extends out of the side wall of the other side of the MQW multi-quantum well layer by a preset length;
forming a first isolation layer on the side wall of the N-type semiconductor layer, the side wall of the MQW multi-quantum well layer, the surface of the N-type semiconductor layer, which is far away from the MQW multi-quantum well layer, and the side wall of the P-type semiconductor layer;
forming a metal reflecting layer on one side of the first isolation layer, which is far away from the epitaxial layer;
etching the metal reflecting layer until the surface of one side of the first isolating layer, which is far away from the N-type semiconductor layer, is exposed to form a first electrode groove;
in the first electrode groove, etching the first isolation layer until the surface of the N-type semiconductor layer, which is far away from the MQW multi-quantum well layer, is exposed to form a second electrode groove, wherein the centers of the second electrode groove and the first electrode groove are the same, and the size of the second electrode groove is smaller than that of the first electrode groove;
forming a second isolation layer on one side of the metal reflection layer, which is far away from the first isolation layer, wherein the second isolation layer also covers the side wall of the first electrode groove to form a third electrode groove, and the centers of the third electrode groove and the second electrode groove are the same and the size of the third electrode groove and the second electrode groove is the same;
forming a first electrode in contact connection with the N-type semiconductor layer through the second electrode groove and the third electrode groove;
and forming a second electrode which is in ohmic contact with the surface of the MQW multi-quantum well layer adjacent to the P-type semiconductor layer.
Preferably, the second substrate is a transparent substrate.
Compared with the prior art, the invention has the following beneficial effects:
according to the quaternary flip chip LED structure, the first isolation layer, the metal reflection layer and the second isolation layer are arranged on the corresponding side wall and the bottom of the epitaxial layer of the quaternary flip chip LED structure to reflect light in the quaternary flip chip LED structure, so that the light is emitted from one side of the transparent substrate, and the light emitting efficiency of the quaternary flip chip LED structure is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic diagram of a quad flip chip LED structure according to an embodiment of the present invention;
fig. 2 is a schematic flow chart of a method for manufacturing a quad flip chip LED structure according to an embodiment of the present invention;
fig. 3-13 are schematic views of process structures corresponding to the manufacturing method shown in fig. 2.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Referring to fig. 1, fig. 1 is a schematic diagram of a quad flip chip LED structure according to an embodiment of the present invention, where the quad flip chip LED structure includes:
a transparent substrate 11;
an epitaxial layer disposed on the transparent substrate 11, the epitaxial layer including a P-type semiconductor layer 14, a MQW multi-quantum well layer 13 and an N-type semiconductor layer 12 sequentially disposed on the transparent substrate 11 in a first direction, the MQW multi-quantum well layer 13 and the N-type semiconductor layer 12 having the same coverage area, one side wall of the P-type semiconductor layer 14 being flush with one side wall of the MQW multi-quantum well layer 13, the other side wall extending out of the other side wall of the MQW multi-quantum well layer 13 by a preset length, wherein the first direction is perpendicular to the transparent substrate 11 and is directed to the P-type semiconductor layer 14 from the transparent substrate 11;
a first spacer 15 surrounding a side wall of the N-type semiconductor layer 12, a side wall of the MQW multi-quantum well layer 13, a surface of the N-type semiconductor layer 12 facing away from the MQW multi-quantum well layer 13, and a side wall of the P-type semiconductor layer 14;
a metal reflective layer 16 disposed on a side of the first isolation layer 15 facing away from the epitaxial layer;
a second spacer layer 17 disposed on a side of the metal reflective layer 16 facing away from the first spacer layer 15;
an electrode groove penetrating the first isolation layer 15, the metal reflection layer 16, and the second isolation layer 17;
a first electrode 18 in contact with the N-type semiconductor layer 12 through the electrode groove, and the first electrode 18 is not in contact with the metal reflective layer 16;
and a second electrode 19 in ohmic contact with a surface of the MQW multiple quantum well layer 13 adjacent to the P-type semiconductor layer 14.
According to the quaternary flip chip LED structure, the first isolation layer 15, the metal reflection layer 16 and the second isolation layer 17 are arranged on the corresponding side wall and the bottom of the epitaxial layer of the quaternary flip chip LED structure to reflect light in the quaternary flip chip LED structure, so that the light is emitted from one side of the transparent substrate 11, and the light emitting efficiency of the quaternary flip chip LED structure is improved.
The second isolation layer 17 is preferably a transparent thin film layer, and is mainly used for isolating the first electrode 18 and the second electrode 19, so as to avoid the problem of electric leakage caused by short circuit of the quad flip-chip LED structure.
Optionally, the material of the second isolation layer 17 includes, but is not limited to, SiN or SiO.
Optionally, according to the above embodiment of the present invention, the material of the first isolation layer 15 includes but is not limited to TiO2Or Ti3O5Or Ta2O5Or Al2O3Or SiN or SiO.
I.e. the first isolation layer 15 is a transparent non-conductive film layer.
Optionally, according to the above embodiment of the present invention, the thickness of the N-type semiconductor layer 12 is 0.5 micrometers to 5 micrometers, inclusive.
For example, the thickness of the N-type semiconductor layer 12 is 1 micron, 2 microns, 3.5 microns, or the like.
The material of the N-type semiconductor layer 12 includes, but is not limited to, an AlGaInP material.
Optionally, according to the above embodiment of the present invention, the thickness of the MQW multi-quantum well layer 13 is 0.5 micron to 3 microns, inclusive.
For example, the thickness of the MQW multiple quantum well layer 13 is 1 micron, 1.5 microns, 2 microns, or the like.
Optionally, according to the above embodiment of the present invention, the thickness of the P-type semiconductor layer 14 is 3 micrometers to 10 micrometers, inclusive.
For example, the thickness of the P-type semiconductor layer 14 is 5 micrometers, 7 micrometers, 9 micrometers, or the like.
The material of the P-type semiconductor layer 14 includes, but is not limited to, GaP material.
Optionally, according to the above embodiments of the present invention, the material of the metal reflective layer 16 includes, but is not limited to, Au, Al, Ag, Cr, or the like.
Based on all the above embodiments of the present invention, in another embodiment of the present invention, a method for manufacturing a quad flip chip LED structure is further provided, referring to fig. 2, fig. 2 is a schematic flow chart of the method for manufacturing a quad flip chip LED structure according to the embodiment of the present invention, where the method includes:
s101: as shown in fig. 3, a first substrate 31 is provided.
In this step, the first substrate 31 is an N-type substrate, and the thickness of the first substrate 31 is 80 to 200 micrometers inclusive.
For example, the thickness of the first substrate 31 is 90 micrometers or 120 micrometers or 150 micrometers, etc.
The material of the first substrate 31 includes, but is not limited to, a GaAs substrate.
S102: as shown in fig. 4, an epitaxial layer is grown on the first substrate 31, and the epitaxial layer includes sequentially growing an N-type semiconductor layer 12, an MQW multi-quantum well layer 13, and a P-type semiconductor layer 14 in a second direction, wherein the second direction is perpendicular to the first substrate 31 and is directed to the N-type semiconductor layer 12 from the first substrate 31.
In this step, the N-type semiconductor layer 12 has a thickness of 0.5 to 5 micrometers, inclusive.
For example, the thickness of the N-type semiconductor layer 12 is 1 micron, 2 microns, 3.5 microns, or the like.
The material of the N-type semiconductor layer 12 includes, but is not limited to, an AlGaInP material.
The thickness of the MQW multi-quantum well layer 13 is 0.5 microns to 3 microns, inclusive.
For example, the thickness of the MQW multiple quantum well layer 13 is 1 micron, 1.5 microns, 2 microns, or the like.
The P-type semiconductor layer 14 has a thickness of 3-10 microns, inclusive.
For example, the thickness of the P-type semiconductor layer 14 is 5 micrometers, 7 micrometers, 9 micrometers, or the like.
The material of the P-type semiconductor layer 14 includes, but is not limited to, GaP material.
Note that specific thicknesses of the N-type semiconductor layer 12, the MQW multiple quantum well layer 13, and the P-type semiconductor layer 14 may be determined according to actual process conditions.
S103: as shown in fig. 5, a second substrate 11 is provided.
In this step, the second substrate 11 is a transparent substrate and is used as a light emitting surface of the quad flip-chip LED structure.
S104: as shown in fig. 6, the epitaxial layer is transferred to the second substrate 11, and the P-type semiconductor layer 14 is in contact with the second substrate 11.
In the step, substrate transfer is carried out on the epitaxial layer structure of the quad flip chip LED structure to form the flip quad flip chip LED structure.
S105: as shown in fig. 7, the epitaxial layer is etched until the P-type semiconductor layer 14 is exposed, the coverage areas of the MQW multi-quantum well layer 13 and the N-type semiconductor layer 12 are the same, one side wall of the P-type semiconductor layer 14 is flush with one side wall of the MQW multi-quantum well layer 13, and the other side wall extends out of the other side wall of the MQW multi-quantum well layer 13 by a preset length.
In this step, the preset length is not limited in the embodiment of the present invention, and may be determined according to specific situations.
S106: as shown in fig. 8, a first spacer 15 is formed on the side wall of the N-type semiconductor layer 12, the side wall of the MQW multi-quantum well layer 13, the surface of the N-type semiconductor layer 12 facing away from the MQW multi-quantum well layer 13, and the side wall of the P-type semiconductor layer 14.
In this step, the material of the first isolation layer 15 includes, but is not limited to, TiO2Or Ti3O5Or Ta2O5Or Al2O3Or SiN or SiO.
Namely, the first isolation layer 15 is a transparent non-conductive film layer for performing a first reflection on light.
S107: as shown in fig. 9, a metal reflective layer 16 is formed on a side of the first isolation layer 15 facing away from the epitaxial layer.
In this step, the material of the metal reflective layer 16 includes, but is not limited to, Au, Al, Ag, Cr, etc. for reflecting light for the second time.
S108: as shown in fig. 10, the metal reflective layer 16 is etched until the surface of the first isolation layer 15 facing away from the N-type semiconductor layer 12 is exposed, so as to form a first electrode groove 101.
In this step, the shape, size and position of the first electrode 101 groove are not limited, and may be determined according to a specific process.
S109: as shown in fig. 11, in the first electrode groove 101, the first isolation layer 15 is etched until the surface of the N-type semiconductor layer 12 facing away from the MQW multi-quantum well layer 13 is exposed, so as to form a second electrode groove 111, the center of the second electrode groove 111 is the same as that of the first electrode groove 101, and the size of the second electrode groove 111 is smaller than that of the first electrode groove 101.
In this step, the shape, size and position of the second electrode groove 111 are not limited and may be determined according to a specific process.
S110: as shown in fig. 12, a second isolation layer 17 is formed on a side of the metal reflective layer 16 away from the first isolation layer 15, the second isolation layer 17 further covers a sidewall of the first electrode groove 101 to form a third electrode groove 121, and centers of the third electrode groove 121 and the second electrode groove 111 are the same and have the same size.
In this step, the shape, size and position of the groove of the third electrode 121 are not limited and may be determined according to a specific process.
The second isolation layer 17 is preferably a transparent thin film layer, and is mainly used for isolating the first electrode from the second electrode, so that the problem of electric leakage caused by short circuit of the quad flip-chip LED structure is avoided.
Optionally, the material of the second isolation layer 17 includes, but is not limited to, SiN or SiO.
S111: as shown in fig. 13, the first electrode 18 in contact with the N-type semiconductor layer 12 is formed through the second electrode groove 111 and the third electrode groove 121.
In this step, the first electrode 18 is a metal electrode, and the material thereof includes, but is not limited to, ZnAu or BeAu.
S112: as shown in fig. 1, a second electrode 19 is formed to make ohmic contact with the surface of the MQW multiple quantum well layer 13 adjacent to the P-type semiconductor layer 14.
In this step, the second electrode 19 is a metal electrode, and the material thereof includes, but is not limited to, ZnAu or BeAu.
It should be noted that the first electrode 18 and the second electrode 19 are not formed sequentially, or may be formed simultaneously, and the materials of the first electrode 18 and the second electrode 19 may be the same or different, which is not limited in the embodiment of the present invention.
According to the above description, the quadruple flip chip type LED structure formed by the manufacturing method reflects light in the quadruple flip chip type LED structure by arranging the first isolation layer, the metal reflection layer and the second isolation layer on the corresponding side wall and bottom of the epitaxial layer thereof, so that the light is emitted from one side of the transparent substrate, and the light emitting efficiency of the quadruple flip chip type LED structure is improved.
The quad flip chip LED structure and the manufacturing method provided by the present invention are introduced in detail, and a specific example is applied in the text to explain the principle and the implementation of the present invention, and the description of the above embodiment is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include or include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (2)
1. A manufacturing method of a quad flip chip LED structure is characterized by comprising the following steps:
providing a first substrate;
growing an epitaxial layer on the first substrate, wherein the epitaxial layer comprises an N-type semiconductor layer, an MQW multi-quantum well layer and a P-type semiconductor layer which are sequentially grown in a second direction, and the second direction is perpendicular to the first substrate and points to the N-type semiconductor layer from the first substrate;
providing a second substrate;
transferring the epitaxial layer to the second substrate, and contacting the P-type semiconductor layer with the second substrate;
etching the epitaxial layer until the P-type semiconductor layer is exposed, wherein the coverage areas of the MQW multi-quantum well layer and the N-type semiconductor layer are the same, the side wall of one side of the P-type semiconductor layer is flush with the side wall of one side of the MQW multi-quantum well layer, and the side wall of the other side of the P-type semiconductor layer extends out of the side wall of the other side of the MQW multi-quantum well layer by a preset length;
forming a first isolation layer on the side wall of the N-type semiconductor layer, the side wall of the MQW multi-quantum well layer, the surface of the N-type semiconductor layer, which is far away from the MQW multi-quantum well layer, and the side wall of the P-type semiconductor layer;
forming a metal reflecting layer on one side of the first isolation layer, which is far away from the epitaxial layer;
etching the metal reflecting layer until the surface of one side of the first isolating layer, which is far away from the N-type semiconductor layer, is exposed to form a first electrode groove;
in the first electrode groove, etching the first isolation layer until the surface of the N-type semiconductor layer, which is far away from the MQW multi-quantum well layer, is exposed to form a second electrode groove, wherein the centers of the second electrode groove and the first electrode groove are the same, and the size of the second electrode groove is smaller than that of the first electrode groove;
forming a second isolation layer on one side of the metal reflection layer, which is far away from the first isolation layer, wherein the second isolation layer also covers the side wall of the first electrode groove to form a third electrode groove, and the centers of the third electrode groove and the second electrode groove are the same and the size of the third electrode groove and the second electrode groove is the same;
forming a first electrode in contact connection with the N-type semiconductor layer through the second electrode groove and the third electrode groove;
and forming a second electrode which is in ohmic contact with the surface of the MQW multi-quantum well layer adjacent to the P-type semiconductor layer.
2. The method of manufacturing according to claim 1, wherein the second substrate is a transparent substrate.
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CN104576858A (en) * | 2013-10-15 | 2015-04-29 | 上海工程技术大学 | Novel flip LED chip structure and manufacturing method thereof |
KR102282141B1 (en) * | 2014-09-02 | 2021-07-28 | 삼성전자주식회사 | Semiconductor light emitting device |
CN106981497A (en) * | 2017-02-14 | 2017-07-25 | 盐城东紫光电科技有限公司 | A kind of high pressure flip LED chips structure and its manufacture method |
CN107331679A (en) * | 2017-07-05 | 2017-11-07 | 广东工业大学 | A kind of the high voltage LED chip structure and preparation method of CSP encapsulation |
CN108847438A (en) * | 2018-03-30 | 2018-11-20 | 映瑞光电科技(上海)有限公司 | A kind of LED chip and its manufacturing method |
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