CN109378278B - Wafer alignment method - Google Patents

Wafer alignment method Download PDF

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Publication number
CN109378278B
CN109378278B CN201811312276.8A CN201811312276A CN109378278B CN 109378278 B CN109378278 B CN 109378278B CN 201811312276 A CN201811312276 A CN 201811312276A CN 109378278 B CN109378278 B CN 109378278B
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gray scale
test
wafer
main
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CN109378278A (en
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董健
黄仁德
刘命江
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Huaian Xide Industrial Design Co ltd
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Huaian Imaging Device Manufacturer Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01BMEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00Measuring arrangements characterised by the use of optical techniques
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means

Abstract

A wafer alignment method, comprising: after the wafer is placed in a test machine, the scanning probe emits test incident light to the surface of a first test area and the surface of a second test area of the wafer, and obtains first test reflected light from the surface of a main gray scale contrast area in the first test area, second test reflected light from the surface of a non-marking area in the first test area, third test reflected light from the surface of the main gray scale contrast area in the second test area, and fourth test reflected light from the surface of the non-marking area in the second test area; acquiring a first relative gray scale of the first test reflected light relative to the second test reflected light; acquiring a second relative gray scale of the third test reflected light relative to the fourth test reflected light; and judging the alignment condition of the wafer according to the difference between the first relative gray scale and the second relative gray scale. The wafer alignment method improves the accuracy of wafer alignment judgment.

Description

Wafer alignment method
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to a wafer alignment method.
Background
After the wafer passes through a plurality of process steps, the performance of the wafer surface needs to be tested. The wafer is typically placed in a test station and then a test of the wafer surface properties is performed. Before testing the surface performance of the wafer, it is necessary to determine whether the position of the wafer in the testing machine satisfies the requirements.
The position of the wafer in the tester platform requires alignment, including macro-alignment and micro-alignment. Macro-alignment refers to: mainly depends on the alignment marks of human eyes and the testing machine to determine whether the wafer is substantially aligned. After the macro alignment is satisfied, the wafer needs to be satisfied with the micro alignment. And after the macro alignment and the micro alignment meet the requirements, the surface performance of the wafer can be specifically tested.
However, the existing determination accuracy for wafer micro-alignment is low.
Disclosure of Invention
The invention provides a wafer alignment method to improve the accuracy of wafer alignment judgment.
To solve the above problems, the present invention provides a wafer alignment method, which includes: providing a test machine platform, wherein the test machine platform is provided with a scanning probe; providing a wafer, wherein the wafer comprises a first cutting track area, the extending direction of the first cutting track area is suitable for being parallel to the scanning direction of the wafer by the scanning probe, the wafer comprises a plurality of discrete gray scale contrast areas positioned in the first cutting track area, each gray scale contrast area comprises a main gray scale contrast area and an attached non-mark area adjacent to the main gray scale contrast area, and the main gray scale contrast area comprises a mark graph area and a main non-mark area positioned around the mark graph area; selecting any two gray scale contrast areas in the same first cutting road area as a first test area and a second test area respectively; placing the wafer in a test machine; after the wafer is placed in a test machine, the scanning probe emits test incident light to the surface of a first test area and the surface of a second test area of the wafer, and obtains first test reflected light from the surface of a main gray scale contrast area in the first test area, second test reflected light from the surface of a non-marking area in the first test area, third test reflected light from the surface of the main gray scale contrast area in the second test area, and fourth test reflected light from the surface of the non-marking area in the second test area; acquiring a first relative gray scale of the first test reflected light relative to the second test reflected light; acquiring a second relative gray scale of the third test reflected light relative to the fourth test reflected light; and judging the alignment condition of the wafer according to the difference between the first relative gray scale and the second relative gray scale.
Optionally, the edge of the main gray scale contrast region is rectangular; the main gray scale comparison area comprises a plurality of sub-main gray scale comparison areas which are arranged into a matrix with N rows by M columns; the edge of the non-mark area is rectangular; the non-mark attaching areas comprise a plurality of sub non-mark attaching areas which are arranged into a matrix of N rows by M columns; the method for acquiring the first relative gray scale of the first test reflected light relative to the second test reflected light comprises the following steps: acquiring first light intensity of a sub-main gray scale comparison area corresponding to the jth row and jth column in the first test reflected light, wherein k is greater than or equal to 1 and less than or equal to N, and j is greater than or equal to 1 and less than or equal to M; acquiring second light intensity of a sub-non-mark area corresponding to the jth row and jth column in the second test reflected light; acquiring a first relative gray scale degree corresponding to the jth row and jth column of the sub-main gray scale comparison area in the first test area according to the difference value between the second light intensity and the first light intensity; the method for acquiring the second relative gray scale of the third test reflected light relative to the fourth test reflected light comprises the following steps: acquiring third light intensity of a sub-main gray scale comparison area corresponding to the jth row and jth column in the third test reflected light; acquiring fourth light intensity of a sub-non-mark area corresponding to the jth row and jth column in the fourth test reflected light; and acquiring a second relative gray scale degree corresponding to the jth row and jth column of the sub-main gray scale comparison area in the second test area according to the difference value of the third light intensity and the fourth light intensity.
Optionally, the method for obtaining the difference between the first relative gray scale and the second relative gray scale includes: and subtracting the second relative gray scale corresponding to the jth row and jth column sub-main gray scale comparison area in the second test area from the first relative gray scale corresponding to the jth row and jth column sub-main gray scale comparison area in the first test area to obtain the difference between the first relative gray scale of the jth row and jth column sub-main gray scale comparison area in the first test area and the second relative gray scale of the jth row and jth column sub-main gray scale comparison area in the second test area.
Optionally, the step of determining the alignment condition of the wafer according to the difference between the first relative gray scale and the second relative gray scale includes: acquiring a first area number and a second area number; the number of the first areas is the number of the corresponding sub-main gray scale comparison areas in the first test area when the difference value between the first relative gray scale of the jth row and jth column of sub-main gray scale comparison areas in the first test area and the second relative gray scale of the jth row and jth column of sub-main gray scale comparison areas in the second test area is smaller than the threshold value; the number of the second areas is the number of the corresponding sub-main gray scale comparison areas in the first test area when the difference value between the first relative gray scale of the jth row and jth column of sub-main gray scale comparison areas in the first test area and the second relative gray scale of the jth row and jth column of sub-main gray scale comparison areas in the second test area is greater than the threshold value; if the number of the first areas is larger than or equal to the preset proportion of the sum of the number of the first areas and the number of the second areas, judging that the wafer is aligned successfully; if the number of the first areas is smaller than the preset proportion of the sum of the number of the first areas and the number of the second areas, the wafer alignment failure is judged.
Optionally, the preset proportion is 90% to 100%.
Optionally, a lateral distance between a center of the non-mark region in the first test region and a center of the main gray scale contrast region is equal to a lateral distance between a center of the non-mark region in the second test region and a center of the main gray scale contrast region; the longitudinal distance between the center of the non-mark attaching region in the first test region and the center of the main gray scale contrast region is equal to the longitudinal distance between the center of the non-mark attaching region in the second test region and the center of the main gray scale contrast region.
Optionally, the wafer includes a scribe line region, where the scribe line region includes a first scribe line region and a second scribe line region that are "cross-shaped"; the extending direction of the second cutting path area is suitable for being vertical to the scanning direction of the wafer by the scanning probe; the first cutting path area and the second cutting path area are provided with a plurality of discrete cutting superposition areas; the gray scale contrast areas are located in different cutting overlapping areas.
Optionally, a minimum distance between an edge of the non-mark region and an edge of the main gray scale contrast region is less than or equal to 2 micrometers.
Optionally, the main grayscale contrast area and the non-mark area have the same area.
Optionally, the mark pattern region comprises a first mark pattern and a second mark pattern crossed in a cross shape; and the center of the first mark pattern and the center of the second mark pattern coincide.
Compared with the prior art, the technical scheme of the invention has the following advantages:
in the wafer alignment method provided by the technical scheme of the invention, the gray scale contrast area comprises a main gray scale contrast area and a non-mark area adjacent to the main gray scale contrast area. The thickness of the film layer on the non-mark area in the first test area is in certain correlation with and approximately same as the thickness of the film layer on the main gray scale comparison area, and the thickness of the film layer on the non-mark area in the second test area is in certain correlation with and approximately same as the thickness of the film layer on the main gray scale comparison area. Even under the condition that the thickness difference of the film layers above the first test area and the second test area is large, the first relative gray scale degree of the first test reflected light relative to the second test reflected light is obtained, the light intensity influence caused by the thickness of the film layer on the main gray scale contrast area in the first test area can be removed, the second relative gray scale degree of the third test reflected light relative to the fourth test reflected light is obtained, and the light intensity influence caused by the thickness of the film layer on the main gray scale contrast area in the second test area can be removed. Therefore, the wafer alignment condition is judged according to the difference between the first relative gray scale and the second relative gray scale, and the condition of wafer alignment failure caused by large thickness difference of the film layers above the first test area and the second test area can be eliminated. Therefore, the accuracy of wafer alignment judgment is improved.
Drawings
FIG. 1 is a flow chart of wafer alignment according to an embodiment of the present invention;
fig. 2 to 7 are schematic views illustrating a wafer alignment process according to an embodiment of the invention.
Detailed Description
As described in the background art, the existing determination accuracy for wafer micro-alignment is low.
Generally, after a wafer is placed on a testing machine, the alignment of the wafer includes a macro alignment and a micro alignment, and the macro alignment mainly depends on alignment marks in human eyes and the testing machine to determine whether the wafer is substantially aligned. For the micro-alignment of the wafer, the following are adopted: the method comprises the steps that a scanning probe in a testing machine table emits testing light to the surface of a wafer, the difference of gray scales of reflected light of the surfaces of different marking patterns in the wafer is obtained, whether the micro-alignment of the wafer meets process requirements or not is judged according to the difference of the gray scales, specifically, if the difference of the gray scales of the reflected light of the surfaces of the different marking patterns is small, the micro-alignment requirements of the wafer are met, and if the difference of the gray scales of the reflected light of the surfaces of the different marking patterns is large, the micro-alignment failure of the wafer is judged.
However, when the thicknesses of the film layers on the two mark patterns are not consistent, the test machine may determine that the micro-alignment of the wafer fails, although the actual micro-alignment of the wafer meets the process requirements. Specifically, because the thicknesses of the film layers on the two mark patterns are not consistent, the intensities of the reflected lights of the two mark patterns have a large difference, and further the gray scale jump of the reflected lights on the surfaces of the two mark patterns is caused, so that the test machine can determine the micro alignment failure of the wafer, and the determination accuracy of the test machine on the alignment of the wafer is low.
After the micro alignment of the wafer fails, the position of the wafer needs to be readjusted, which is time-consuming and labor-consuming.
On this basis, the present invention provides a wafer alignment method, referring to fig. 1, comprising the following steps:
s01, providing a test machine with a scanning probe;
s02, providing a wafer, wherein the wafer comprises a first cutting track area, the extending direction of the first cutting track area is suitable for being parallel to the scanning direction of the wafer by the scanning probe, the wafer comprises a plurality of discrete gray scale contrast areas located in the first cutting track area, each gray scale contrast area comprises a main gray scale contrast area and an attached non-mark area adjacent to the main gray scale contrast area, and the main gray scale contrast area comprises a mark graph area and a main non-mark area located around the mark graph area;
s03, selecting any two gray scale contrast areas in the gray scale contrast areas as a first test area and a second test area respectively;
s04, placing the wafer in a testing machine;
s05, after the wafer is placed in a test machine, the scanning probe emits test incident light to the surface of a first test area and the surface of a second test area of the wafer, and obtains first test reflected light from the surface of a main gray scale contrast area in the first test area, second test reflected light from the surface of a non-mark area in the first test area, third test reflected light from the surface of the main gray scale contrast area in the second test area and fourth test reflected light from the surface of the non-mark area in the second test area;
s06, acquiring a first relative gray scale of the first test reflected light relative to the second test reflected light;
s07, acquiring a second relative gray scale of the third test reflected light relative to the fourth test reflected light;
and S08, judging the alignment condition of the wafer according to the difference between the first relative gray scale and the second relative gray scale.
The method improves the success rate of wafer alignment.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 2 to 7 are schematic views illustrating a wafer alignment process according to an embodiment of the invention.
Referring to fig. 2, a test tool 100 is provided, the test tool 100 having a scan probe 110 therein.
The testing tool 100 includes a tool for optically testing surface defects of a wafer.
The scanning probe 110 is adapted to scan the surface of a wafer.
Referring to fig. 3 and 4 in combination, fig. 4 is an enlarged view of the gray scale contrast area in fig. 3, a wafer 120 is provided, the wafer 120 includes a first scribe line area 121, an extending direction of the first scribe line area 121 is adapted to be parallel to a scanning direction of the wafer 120 by the scanning probe 110, the wafer 120 includes a plurality of discrete gray scale contrast areas 130 located in the first scribe line area 121, each gray scale contrast area 130 includes a main gray scale contrast area 131 and an additional non-mark area 132 adjacent to the main gray scale contrast area 131, and the main gray scale contrast area 131 includes a mark pattern area 1311 and a main non-mark area 1312 located around the mark pattern area 1311.
The wafer 120 includes a chip region and a scribe lane region, and the scribe lane region includes a first scribe lane region 121 and a second scribe lane region 122 that are "cross-shaped".
The extending direction of the second scribe line region 122 is suitable to be perpendicular to the scanning direction of the wafer 120 by the scanning probe 110.
The first scribe line region 121 and the second scribe line region 122 have a plurality of discrete scribe line overlap regions. The contrasted gray areas 130 are located in different overlapping cut areas.
The extending direction of the first scribe line region 121 is adapted to be parallel to the scanning direction of the wafer 120 by the scanning probe 110, which means that: after the wafer 120 is placed in the testing machine 100, when the position of the wafer 120 is completely aligned, the extending direction of the first scribe line region 121 is parallel to the scanning direction of the wafer 120 by the scanning probe 110.
The extending direction of the second scribe line region 122 is suitable to be perpendicular to the scanning direction of the wafer 120 by the scanning probe 110, which means that: after the wafer 120 is placed in the testing machine 100, when the position of the wafer 120 is in perfect alignment, the extending direction of the second scribe line region 122 is perpendicular to the scanning direction of the wafer 120 by the scanning probe 110.
The mark pattern region 1311 corresponds to a region of the wafer having a mark pattern.
The main non-mark region 1312 has no mark pattern therein.
The non-marked area 132 has no mark pattern therein.
The minimum distance between the edge of the non-mark region 132 and the edge of the main gray scale contrast region 131 is less than or equal to 2 micrometers.
The minimum distance between the edge of the non-mark region 132 and the edge of the main gray scale contrast region 131 means: the minimum value of the distance of the edge of the main gray scale contrast area 131 from the edge of the non-mark area 132.
The main gray scale contrast region 131 and the non-mark region 132 have the same area.
The marker pattern region 1311 includes a first marker pattern 1311A and a second marker pattern 1311B that cross "; and the center of the first mark pattern 1311A and the center of the second mark pattern 1311B coincide.
The extending direction of the first mark pattern 1311A is perpendicular to the extending direction of the second mark pattern 1311B.
The extending direction of the first mark pattern 1311A is adapted to be parallel to the scanning direction of the wafer 120 by the scanning probe 110, which means that: after the wafer 120 is placed in the testing machine 100, when the position of the wafer 120 is completely aligned, the extending direction of the first mark pattern 1311A is parallel to the scanning direction of the wafer 120 by the scanning probe 110.
The edge of the main gray scale contrast area 131 is rectangular; the main gray scale contrast region 131 includes a plurality of sub-main gray scale contrast regions arranged in a matrix of N rows by M columns.
The edge shape of the non-mark region 132 is rectangular; the non-labeled regions 132 include a plurality of sub-non-labeled regions 132q, and the plurality of sub-non-labeled regions 132q are arranged in a matrix of N rows by M columns.
The row direction of each sub-main gray scale contrast area in the main gray scale contrast area 131 is parallel to the row direction of each sub-unmarked area 132q in the unmarked area 132. In addition, the arrangement direction of the first row sub-main gray scale comparison area to the nth row sub-main gray scale comparison area in the main gray scale comparison area 131 is the same as the arrangement direction of the first row sub-unmarked area to the nth row sub-unmarked area in the unmarked area 132.
The column direction of each column of sub-main gray scale contrast areas in the main gray scale contrast area 131 is parallel to the column direction of each column of sub-non-mark-attached areas 132q in the non-mark-attached area 132. In addition, the arrangement direction of the first row sub-main gray scale comparison area to the mth row sub-main gray scale comparison area in the main gray scale comparison area 131 is the same as the arrangement direction of the first row sub-non-mark-attached area to the mth row sub-non-mark-attached area in the non-mark-attached area 132.
Referring to fig. 5, any two gray scale contrast areas within the same first scribe line area 121 are selected as the first test area C1 and the second test area C2, respectively.
The lateral distance of the center of the non-mark-attached region 132 in the first test region C1 with respect to the center of the main contrast area 131 is equal to the lateral distance of the center of the non-mark-attached region 132 in the second test region C2 with respect to the center of the main contrast area 131. The lateral distance refers to: the dimension along the scanning direction of the wafer 120 by the scanning probe 110.
The longitudinal distance of the center of the non-mark-attached region 132 in the first test region C1 with respect to the center of the main contrast area 131 is equal to the longitudinal distance of the center of the non-mark-attached region 132 in the second test region C2 with respect to the center of the main contrast area 131. The longitudinal distance refers to: along a dimension perpendicular to the direction of scanning of the wafer 120 by the scanning probe 110.
Referring to fig. 6, the wafer 120 is placed in the testing machine 100.
Specifically, the test tool 100 has a chuck (not shown) therein, and the scan head 110 is located above the chuck.
The wafer 120 is placed in the testing machine 100, and specifically, the wafer is placed 120 on the surface of the chuck, and at this time, the scanning probe 110 is located above the wafer 120.
Before the subsequent acquisition of the first test reflected light, the second test reflected light, the third test reflected light and the fourth test reflected light, the method further comprises the following steps: the position of the wafer 120 is macroscopically aligned, which relies primarily on alignment marks in the human eye and in the test station to determine whether the wafer 12 is substantially aligned.
Referring to fig. 7, after the wafer 120 is placed in the testing machine 100, the scanning probe 110 emits the testing incident light to the surface of the first testing area C1 and the surface of the second testing area C2 of the wafer 120, and obtains a first testing reflected light X1 from the surface of the main gray scale contrast area 131 in the first testing area C1, a second testing reflected light X2 from the surface of the non-mark area 132 in the first testing area C1, a third testing reflected light X3 from the surface of the main gray scale contrast area 131 in the second testing area C2, and a fourth testing reflected light X4 from the surface of the non-mark area 132 in the second testing area C2.
A first relative gray scale of the first test reflected light X1 relative to the second test reflected light X2 is obtained.
Referring to fig. 7, the method of acquiring a first relative gray scale of the first test reflected light X1 relative to the second test reflected light X2 includes: acquiring first light intensity of a sub main gray scale comparison area corresponding to the jth row and jth column in a first test reflected light X1, wherein k is greater than or equal to 1 and less than or equal to N, and j is greater than or equal to 1 and less than or equal to M; acquiring second light intensity of the jth column sub-non-mark area corresponding to the kth row in the second test reflected light X2; and acquiring a first relative gray scale degree corresponding to the jth row and jth column sub-main gray scale contrast zone in the kth row in the first test area C1 according to the difference value of the second light intensity and the first light intensity.
A second relative gray scale of the third test reflected light X3 relative to the fourth test reflected light X4 is obtained.
Referring to fig. 7, the method of acquiring a second relative gray scale of the third test reflected light X3 relative to the fourth test reflected light X4 includes: acquiring third light intensity of a sub main gray scale comparison area corresponding to the jth row and jth column in the third test reflected light X3; acquiring fourth light intensity of a sub non-mark area corresponding to the jth column of the kth row in the fourth test reflected light X4; and acquiring a second relative gray scale corresponding to the jth row and jth column sub-main gray scale contrast area in the second test area C2 according to the difference value of the third light intensity and the fourth light intensity.
And judging the alignment condition of the wafer 120 according to the difference between the first relative gray scale and the second relative gray scale.
The method for acquiring the difference between the first relative gray scale and the second relative gray scale comprises the following steps: the first relative gray scale corresponding to the jth row and jth column sub-main gray scale contrast area in the kth row in the first test area C1 is subtracted by the second relative gray scale corresponding to the jth row and jth column sub-main gray scale contrast area in the second test area C2 to obtain the difference between the first relative gray scale corresponding to the jth row and jth column sub-main gray scale contrast area in the kth row in the first test area C1 and the second relative gray scale corresponding to the jth row and jth column sub-main gray scale contrast area in the second test area C2.
The process of determining the alignment condition of the wafer 120 according to the difference between the first relative gray scale and the second relative gray scale includes: acquiring a first area number and a second area number; the number of the first regions is the number of the corresponding sub-main gray scale comparison regions in the first test region C1 when the difference between the first relative gray scale degree of the jth row and jth column sub-main gray scale comparison region in the kth row in the first test region C1 and the second relative gray scale degree of the jth column sub-main gray scale comparison region in the kth row in the second test region C2 is less than the threshold value; the number of the second areas is the number of the corresponding sub-main gray scale comparison areas in the first test area C2 when the difference between the first relative gray scale degree of the jth row and jth column sub-main gray scale comparison area in the kth row in the first test area C1 and the second relative gray scale degree of the jth column sub-main gray scale comparison area in the kth row in the second test area C2 is greater than the threshold; if the number of the first areas is larger than or equal to the preset proportion of the sum of the number of the first areas and the number of the second areas, the wafer 120 is judged to be aligned successfully; if the number of the first areas is smaller than the preset proportion of the sum of the number of the first areas and the number of the second areas, the wafer 120 is judged to fail to be aligned
In a specific embodiment, the predetermined ratio is 90% to 100%.
In this embodiment, when the difference between the first relative gray scale and the first relative gray scale is compared with the threshold, the absolute value of the difference is compared with the threshold.
In one embodiment, the threshold is selected to be 28-30 when the chromaticity of white is divided into 256 equal parts from brightest to darkest.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (7)

1. A method for aligning a wafer, comprising:
providing a test machine platform, wherein the test machine platform is provided with a scanning probe;
providing a wafer, wherein the wafer comprises a first cutting track area, the extending direction of the first cutting track area is suitable for being parallel to the scanning direction of the wafer by the scanning probe, the wafer comprises a plurality of discrete gray scale contrast areas positioned in the first cutting track area, each gray scale contrast area comprises a main gray scale contrast area and an attached non-mark area adjacent to the main gray scale contrast area, and the main gray scale contrast area comprises a mark graph area and a main non-mark area positioned around the mark graph area;
selecting any two gray scale contrast areas in the same first cutting road area as a first test area and a second test area respectively;
placing the wafer in a test machine;
after the wafer is placed in a test machine, the scanning probe emits test incident light to the surface of a first test area and the surface of a second test area of the wafer, and obtains first test reflected light from the surface of a main gray scale contrast area in the first test area, second test reflected light from the surface of a non-marking area in the first test area, third test reflected light from the surface of the main gray scale contrast area in the second test area, and fourth test reflected light from the surface of the non-marking area in the second test area;
acquiring a first relative gray scale of the first test reflected light relative to the second test reflected light;
acquiring a second relative gray scale of the third test reflected light relative to the fourth test reflected light;
judging the alignment condition of the wafer according to the difference between the first relative gray scale and the second relative gray scale;
the edge shape of the main gray scale contrast area is rectangular; the main gray scale comparison area comprises a plurality of sub-main gray scale comparison areas which are arranged into a matrix with N rows by M columns;
the edge of the non-mark area is rectangular; the non-mark attaching areas comprise a plurality of sub non-mark attaching areas which are arranged into a matrix of N rows by M columns;
the method for acquiring the first relative gray scale of the first test reflected light relative to the second test reflected light comprises the following steps: acquiring first light intensity of a sub-main gray scale comparison area corresponding to the jth row and jth column in the first test reflected light, wherein k is greater than or equal to 1 and less than or equal to N, and j is greater than or equal to 1 and less than or equal to M; acquiring second light intensity of a sub-non-mark area corresponding to the jth row and jth column in the second test reflected light; acquiring a first relative gray scale degree corresponding to the jth row and jth column of the sub-main gray scale comparison area in the first test area according to the difference value between the second light intensity and the first light intensity;
the method for acquiring the second relative gray scale of the third test reflected light relative to the fourth test reflected light comprises the following steps: acquiring third light intensity of a sub-main gray scale comparison area corresponding to the jth row and jth column in the third test reflected light; acquiring fourth light intensity of a sub-non-mark area corresponding to the jth row and jth column in the fourth test reflected light; acquiring a second relative gray scale degree corresponding to the jth row and jth column of the sub-main gray scale comparison area in the second test area according to the difference value of the third light intensity and the fourth light intensity;
the method for acquiring the difference between the first relative gray scale and the second relative gray scale comprises the following steps: subtracting a second relative gray scale corresponding to the jth row and jth column of the sub-main gray scale comparison area in the second test area from a first relative gray scale corresponding to the jth row and jth column of the sub-main gray scale comparison area in the first test area to obtain a difference between the first relative gray scale of the jth row and jth column of the sub-main gray scale comparison area in the first test area and the second relative gray scale of the jth row and jth column of the sub-main gray scale comparison area in the second test area;
the process of judging the alignment condition of the wafer according to the difference between the first relative gray scale and the second relative gray scale comprises the following steps: acquiring a first area number and a second area number; the number of the first areas is the number of the corresponding sub-main gray scale comparison areas in the first test area when the difference value between the first relative gray scale of the jth row and jth column of sub-main gray scale comparison areas in the first test area and the second relative gray scale of the jth row and jth column of sub-main gray scale comparison areas in the second test area is smaller than the threshold value; the number of the second areas is the number of the corresponding sub-main gray scale comparison areas in the first test area when the difference value between the first relative gray scale of the jth row and jth column of sub-main gray scale comparison areas in the first test area and the second relative gray scale of the jth row and jth column of sub-main gray scale comparison areas in the second test area is greater than the threshold value; if the number of the first areas is larger than or equal to the preset proportion of the sum of the number of the first areas and the number of the second areas, judging that the wafer is aligned successfully; if the number of the first areas is smaller than the preset proportion of the sum of the number of the first areas and the number of the second areas, the wafer alignment failure is judged.
2. The method as claimed in claim 1, wherein the predetermined ratio is 90% to 100%.
3. The wafer alignment method as claimed in claim 1, wherein a lateral distance between a center of the non-marked region in the first test region and a center of the main contrast region is equal to a lateral distance between a center of the non-marked region in the second test region and a center of the main contrast region;
the longitudinal distance between the center of the non-mark attaching region in the first test region and the center of the main gray scale contrast region is equal to the longitudinal distance between the center of the non-mark attaching region in the second test region and the center of the main gray scale contrast region.
4. The wafer alignment method as claimed in claim 1, wherein the wafer includes a scribe lane region, and the scribe lane region includes a first scribe lane region and a second scribe lane region that are crossed in a "cross shape"; the extending direction of the second cutting path area is suitable for being vertical to the scanning direction of the wafer by the scanning probe; the first cutting path area and the second cutting path area are provided with a plurality of discrete cutting superposition areas; the gray scale contrast areas are located in different cutting overlapping areas.
5. The wafer alignment method as claimed in claim 1, wherein a minimum distance between an edge of the non-mark region and an edge of the main gray scale contrast region is less than or equal to 2 μm.
6. The wafer alignment method as claimed in claim 1, wherein the main gray scale contrast area and the non-mark area have the same area.
7. The wafer alignment method as claimed in claim 1, wherein the mark pattern region includes a first mark pattern and a second mark pattern crossed in a "cross shape"; and the center of the first mark pattern and the center of the second mark pattern coincide.
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