CN109358684A - Compensation type ac voltage stabilizer - Google Patents

Compensation type ac voltage stabilizer Download PDF

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Publication number
CN109358684A
CN109358684A CN201811355989.2A CN201811355989A CN109358684A CN 109358684 A CN109358684 A CN 109358684A CN 201811355989 A CN201811355989 A CN 201811355989A CN 109358684 A CN109358684 A CN 109358684A
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China
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voltage
signal
input
output
control
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CN201811355989.2A
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CN109358684B (en
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王兵
凌云
杨兴果
刘建华
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湖南工业大学
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/12Regulating voltage or current wherein the variable actually regulated by the final control device is ac
    • G05F1/14Regulating voltage or current wherein the variable actually regulated by the final control device is ac using tap transformers or tap changing inductors as final control devices
    • G05F1/16Regulating voltage or current wherein the variable actually regulated by the final control device is ac using tap transformers or tap changing inductors as final control devices combined with discharge tubes or semiconductor devices
    • G05F1/20Regulating voltage or current wherein the variable actually regulated by the final control device is ac using tap transformers or tap changing inductors as final control devices combined with discharge tubes or semiconductor devices semiconductor devices only

Abstract

A kind of compensation type ac voltage stabilizer; including compensation main circuit, sampling comparing unit, coding unit, delay protection unit, interlocking control unit, trigger unit, error detection control unit, compensation main circuit is made of compensator transformer group, thyristor bridge and relay protection switch.Coding unit is encoded to voltage class encoded radio for comparing unit output voltage grade fiducial value is sampled; delay protection unit exports the voltage class encoded radio after delay and trigger region does not control signal to control unit is interlocked, and interlocks the on-off that control unit output Trig control signal controls thyristor in main circuit thyristor bridge;While realizing mutual lock control; whether error detection control unit also occurs logic error to carry out open-circuit-protection to thyristor bridge coding unit or interlocking control unit; the protection that the compensation type ac voltage stabilizer is directed to course of work exception is effectively strengthened, keeps the work of the compensation type ac voltage stabilizer more stable, reliable.

Description

Compensation type ac voltage stabilizer
Technical field
The present invention relates to power technique fields, especially a kind of compensation type ac voltage stabilizer.
Background technique
Existing compensation type ac voltage stabilizer, its advantage is that voltage stabilized range is wide, waveform is almost without distortion, overall efficiency Height, workload-adaptability are strong.Its principle is the height situation according to input voltage, automatically controls armature winding on compensator transformer The switching of different winding coils, using the no-load voltage ratio relationship of primary side Working winding and secondary windings, or by adjusting primary around The alive mode of institute, provides the voltage compensation of two-way multi gear, to realize the purpose of voltage-regulation voltage-stabilization in group.
The shortcoming of existing compensation type ac voltage stabilizer is: being changed using the movement of motor control carbon brush to compensation transformation When device magnet exciting coil applies different voltages, carbon brush is prone to wear, and is often broken down.Using electronic switch switching by the way of come into On the switching of the different winding coils of armature winding on row compensator transformer, or adjustment armature winding when institute's making alive, electronics Being delayed to turn off for switch be easy to cause power supply short circuit failure;Using the program mode (PM) control electronic switch switching of single-chip microcontroller, PLC etc. When, the problems such as program runs fast, crashes, will also result in voltage-stablizer failure, or cause power supply short circuit because of control logic mistake therefore Barrier.
Summary of the invention
In order to solve the problems of existing compensation type ac voltage stabilizer, the present invention provides a kind of compensation-type alternating current is steady Depressor, including compensation main circuit, sampling comparing unit, coding unit, delay protection unit, interlocking control unit, triggering list Member, error detection control unit.
Compensation main circuit is made of compensator transformer group, thyristor bridge and relay protection switch;By in thyristor bridge The on-off of thyristor combines, and controls the size and combinations of polarities of each compensator transformer magnet exciting coil voltage in compensator transformer group, Realize different compensation work states.It samples comparing unit and voltage sample, output voltage grade ratio is carried out to AC supply voltage Compared with value to coding unit, coding unit output voltage grade encoded radio;Delay protection unit input voltage grade encoded radio, output Voltage class encoded radio after delay and not trigger region control signal;Voltage class coding after interlocking control unit input delay Value and not trigger region control signal, export Trig control signal;Trigger unit controls main electricity according to the Trig control signal of input The on-off of thyristor in the thyristor bridge of road;Error detection control unit judgement and whether mistake opens according to the Trig control signal of input Dynamic or stopping carries out open-circuit-protection to thyristor bridge.Voltage class fiducial value is M binary values;The M is more than or equal to 1.
AC supply voltage fluctuation makes voltage class encoded radio change, and results in the need for changing thyristor in thyristor bridge On-off assembled state when, between successive 2 kinds different on-off assembled states of thyristor in thyristor bridge, maintain one not Trigger region time, all thyristors in cutoff thyristor bridge;Maintain one not the trigger region time by not trigger region control signal It realizes, trigger region control signal does not export a pulse after voltage class encoded radio changes for control;Not trigger region control Signal processed is effective during exporting pulse, invalid during non-output pulse.In delay protection unit, the voltage etc. of delay Grade coding value signal changes the moment and is later than after voltage class encoded radio changes the simple venation exported in not trigger region control signal The forward position moment of punching;In delay protection unit, the voltage class coding value signal of delay changes the moment earlier than voltage class coding Value change after not trigger region control signal in export pulse it is rear along the moment.Further, the voltage class is compiled After code value changes, the spaced time of pulse is not chosen in 10ms between 30ms in trigger region control signal.
When the not trigger region control invalidating signal of interlocking control unit input and the voltage class encoded radio of input is effective When encoded radio, effective Trig control signal corresponding with efficient coding value is exported, carries out the compensation control of AC supply voltage;When When the voltage class encoded radio of the not trigger region control invalidating signal and input that interlock control unit input is not efficient coding value, Export invalid Trig control signal.
The voltage of AC supply voltage waving interval range is divided into M+1 voltage class section to compensate control; By 0 or 1 in the multiple compensator transformers of on-off assembled state control selections of thyristor in thyristor bridge, or It is multiple compensator transformers to carry out voltage compensation, realizes voltage compensation state corresponding with voltage class section;Voltage class Encoded radio shares and the one-to-one M+1 efficient coding value in M+1 voltage class section, corresponding effective Trig control signal Shared M+1 group, realizes the control of M+1 voltage compensation state.Each voltage class section of AC supply voltage is one corresponding Voltage compensation state.
When the not trigger region control signal for interlocking control unit input is effective, it is brilliant that interlocking control unit exports 1 group of shutdown Effective Trig control signal of all thyristors in brake tube bridge carries out the switching control between voltage compensation state.Mutual lock control Effective Trig control signal of unit output processed shares M+2 group, including M+1 group corresponding with M+1 efficient coding value is effectively touched Effective Trig control signal of hair control signal and all thyristors in 1 group of cutoff thyristor bridge.
Error detection control unit judges that the whether wrong foundation of the Trig control signal of input is the Trig control signal of input When for 1 group in the effective Trig control signal of M+2 group, Trig control signal is correct, otherwise mistake.
When the Trig control signal mistake of error detection control unit judgement input, control thyristor bridge is in open-circuit-protection shape State, method are that all upper bridge arms that control disconnects thyristor bridge to carry out thyristor bridge open-circuit-protection, or control disconnects All lower bridge arms of thyristor bridge to carry out open-circuit-protection to thyristor bridge.Thyristor bridge is under open-circuit-protection state, error detection When the Trig control signal of control unit judgement input reverts to correct signal, it is automatically stopped the open-circuit-protection shape of thyristor bridge State.
When the Trig control signal of error detection control unit judgement input does not have mistake, interlocking control unit input is not triggered Area controls the voltage class encoded radio of invalidating signal and input when being efficient coding value, and it is a that compensation type ac voltage stabilizer be in M+1 1 in voltage compensation state.When the Trig control signal of error detection control unit judgement input does not have mistake, interlocking control unit When the not trigger region control signal of input is effective, compensation type ac voltage stabilizer is in the switching shape between different voltages compensating coefficient State.
Trig control signal is converted to IGBT group signal by trigger unit, is realized to compensation main circuit thyristor bridge The on-off of middle thyristor controls.When the Trig control signal mistake of error detection control unit judgement input, trigger unit is cut off Working power, trigger unit stop issuing thyristor triggering impulse;When the Trig control signal of error detection control unit judgement input When without mistake, the working power of trigger unit is opened, trigger unit issues corresponding brilliant according to the Trig control signal of input Brake tube trigger pulse controls the on-off of thyristor in thyristor bridge.
Thyristor in thyristor bridge is the brilliant lock that bidirectional thyristor or 2 unidirectional thyristor reverse parallel connections are formed Pipe alternating-current switch.
By delay detection module and not, trigger region control signal generator module forms delay protection unit;Delay detection module In include K identical delay detection circuits, each delay detection circuit input signal is postponed after it is defeated Signal out, while Edge check is carried out to input signal, export Edge check signal;K delay detection circuit is respectively to K electricity It presses grade encoded radio to carry out signal delay, the position the K voltage class encoded radio after being postponed, and K voltage class is encoded Value carries out Edge check, obtains K Edge check signal;Trigger region control signal generator module does not examine K edge of input It surveys signal and is converted to not trigger region control signal output.
In K identical delay detection circuits, each delay detection circuit includes resistance RY3, capacitor CY3, phase inverter FY5, phase inverter FY6, NAND gate FY7 or door FY8, NAND gate FY9;Phase inverter FY5 input terminal is connected to input signal end;Electricity One end of resistance RY3 is connected to phase inverter FY5 output end, and other end is respectively connected to one end of capacitor CY3, NAND gate FY7 The input terminal of an input terminal of one input terminal or door FY8, phase inverter FY6;The other end of capacitor CY3 is connected to ground terminal, Another input terminal of NAND gate FY7 is connected to input signal end or another input terminal of door FY8 is connected to input letter Number end;2 input terminals of NAND gate FY9 are respectively connected to NAND gate FY7 output end or door FY8 output end;Phase inverter FY6 is defeated Outlet is the output signal end after delay;NAND gate FY9 output end is Edge check signal output end.
Either, in K identical delay detection circuits, each delay detection circuit includes resistance RY0, resistance RY1, electricity Hinder RY2, capacitor CY0, capacitor CY1, capacitor CY2, diode DY1, diode DY2, driving gate FY0, phase inverter FY1, phase inverter FY2, phase inverter FY3, NAND gate FY4;Resistance RY0 is connected between input signal end and driving gate FY0 input terminal, capacitor CY0 It is connected between driving gate FY0 input terminal and ground terminal, driving gate FY0 output end is the output signal end after delay;Capacitor CY1 connects It connecing between input signal end and phase inverter FY1 input terminal, resistance RY1 is connected between phase inverter FY1 input terminal and ground terminal, and two Pole pipe DY1 cathode is connected to phase inverter FY1 input terminal, anode is connected to ground terminal;Phase inverter FY2 input is connected to input signal End;Capacitor CY2 is connected between phase inverter FY2 output end and phase inverter FY3 input terminal, and it is defeated that resistance RY2 is connected to phase inverter FY3 Enter between end and ground terminal, diode DY2 cathode is connected to phase inverter FY3 input terminal, anode is connected to ground terminal;The 2 of NAND gate FY4 A input terminal is respectively connected to phase inverter FY1 output end, phase inverter FY3 output end;The output end of NAND gate FY4 is Edge check Signal output end.
Or be, in K identical delay detection circuits, each delay detection circuit include resistance RY1, resistance RY2, Capacitor CY1, capacitor CY2, diode DY1, diode DY2, phase inverter FY1, phase inverter FY2, phase inverter FY3, phase inverter FY11, Phase inverter FY12, phase inverter FY13, phase inverter FY14, NAND gate FY4;Phase inverter FY11 input terminal is connected to input signal end, Phase inverter FY12 input terminal is connected to phase inverter FY11 output end, and phase inverter FY13 input terminal is connected to phase inverter FY12 output End, phase inverter FY14 input terminal are connected to phase inverter FY13 output end, and phase inverter FY14 output end is the output signal after delay End;Capacitor CY1 is connected between input signal end and phase inverter FY1 input terminal, and resistance RY1 is connected to phase inverter FY1 input terminal Between ground terminal, diode DY1 cathode is connected to phase inverter FY1 input terminal, anode is connected to ground terminal;Phase inverter FY2 input connects It is connected to input signal end;Capacitor CY2 is connected between phase inverter FY2 output end and phase inverter FY3 input terminal, resistance RY2 connection Between phase inverter FY3 input terminal and ground terminal, diode DY2 cathode is connected to phase inverter FY3 input terminal, anode is connected to the ground End;2 input terminals of NAND gate FY4 are respectively connected to phase inverter FY1 output end, phase inverter FY3 output end;NAND gate FY4 is defeated Outlet is Edge check signal output end.
Trigger region control signal generator module is not with K input signal end or door FY10;Or K of door FY10 are defeated Enter the Edge check signal output end that signal end is respectively connected in K delay detection circuit;Or the output end output of door FY10 Trigger region does not control signal.
The beneficial effects of the present invention are: described carry out the compensation of voltage compensation using compensator transformer group and thyristor bridge AC voltage regulator ensure that same bridge arm or more thyristor cannot simultaneously turn on, that is, realizing same bridge arm, thyristor is mutual up and down While lock control, also there is logic error to the coding unit being likely to occur and output invalid code value and mutual lock control The case where unit processed logic error occurs and outputs invalid Trig control signal stops issuing trigger pulse and carries out thyristor The open-circuit-protection of bridge effectively strengthens the protection that the compensation type ac voltage stabilizer is directed to course of work exception;In crystalline substance When brake tube bridge is in open-circuit-protection state, if the compensation type ac voltage stabilizer reenters normal logic control state, The open-circuit-protection state of thyristor bridge can be then automatically stopped and it is made to be in compensation work state again;Using single-chip microcontroller, The switching switching of the program mode (PM) control thyristor of PLC etc., avoids the event of voltage-stablizer caused by the problems such as program runs fast, crashes Barrier.Above-mentioned function keeps the work of the compensation type ac voltage stabilizer more stable, reliable.
Detailed description of the invention
Fig. 1 is the system composition block diagram of compensation type ac voltage stabilizer;
Fig. 2 is compensation main circuit embodiment 1;
Fig. 3 is compensation main circuit embodiment 2;
Fig. 4 is sampling comparing unit embodiment 1;
Fig. 5 is sampling comparing unit embodiment 2;
Fig. 6 is coding unit embodiment, wherein Fig. 6 (a) is coding unit embodiment 1, and Fig. 6 (b) is coding unit implementation Example 2;
Fig. 7 is delay protection unit embodiment block diagram;
Fig. 8 is the delay detection circuit embodiment 1 for encoding value signal Y10 in delay detection module for voltage class;
Fig. 9 is the delay detection circuit embodiment 2 for encoding value signal Y10 in delay detection module for voltage class;
Figure 10 is the delay detection circuit embodiment 3 for encoding value signal Y10 in delay detection module for voltage class;
Figure 11 is that trigger region does not control signal generator module embodiment;
Figure 12 is that split-phase closes waveform diagram in the middle part of delay protection unit;
Figure 13 is the embodiment for interlocking control unit, wherein Figure 13 (a) is interlocking control unit embodiment 1, Figure 13 (b) To interlock control unit embodiment 2;
Figure 14 is the trigger circuit embodiment that bidirectional thyristor SR1 is triggered in trigger unit;
Figure 15 is error detection control unit embodiment.
Specific embodiment
Below in conjunction with attached drawing, the invention will be further described.
Fig. 1 is the system composition block diagram of compensation type ac voltage stabilizer, and sampling comparing unit carries out electricity to AC supply voltage Pressure sampling, output voltage grade fiducial value P1 to coding unit, coding unit output voltage grade encoded radio P2;Delay protection list First input voltage grade encoded radio P2, exports the voltage class encoded radio P3 after postponing and trigger region does not control signal P4;Interlocking Voltage class encoded radio P3 after control unit input delay and not trigger region control signal P4, export Trig control signal P5; Trigger unit issues trigger signal P6 to compensation main circuit, controls in thyristor bridge according to the Trig control signal P5 of input The on-off of thyristor;Error detection control unit judges whether the Trig control signal P5 of input is effective Trig control signal, and according to It is judged that result issues protection control signal to compensation main circuit, open-circuit-protection is carried out to thyristor bridge.
Fig. 2 is compensation main circuit embodiment 1, and compensator transformer TB1, TB2 form compensator transformer group, 6 two-way crystalline substances Brake tube SR1-SR6 collectively constitutes thyristor bridge, and fuse FU1 and relay normally open switch KA-1, KA-2, KA-3, relay are normal Make and break closes KA-5, KA-6 and forms relay protection circuit.
In Fig. 2, the bucking coil of compensator transformer TB1, TB2 are connected in phase line, and phase line input terminal is LA1, output End is LA2.Voltage on TB1, TB2 magnet exciting coil is controlled by thyristor bridge.1 thyrister bridge arm circuit includes upper and lower 2 crystalline substances Brake tube.The thyrister bridge arm circuit of SR1 and SR2 composition is connected to after one end of TB1, TB2 magnet exciting coil is in parallel, TB1, TB2 are encouraged The other end of magnetic coil is respectively connected to the thyrister bridge arm circuit of SR3 and SR4, SR5 and SR6 composition.If the compensation of TB1, TB2 Voltage is not identical, does not consider the compensation way that offset voltage is cancelled out each other, then the at most shared forward direction TB1 of compensator transformer group, just To TB2, forward direction TB1+TB2, reversed TB1, reversed TB2, reversed TB1+TB2, totally 6 kinds of voltage compensation states, a kind of additional input are electric The AC supply voltage of 0 voltage compensation state when being pressed within normal range (NR), phase line input terminal LA1 input can at most be divided Control is compensated at 7 voltage ranges.In Fig. 2, N is zero curve, G11, G12 to G61, G62 be respectively bidirectional thyristor SR1 extremely The trigger signal input terminal of SR6.
Fig. 3 is compensation main circuit embodiment 2, and compensator transformer TB1, TB2, TB3 form compensator transformer group, and 8 double Thyristor bridge, fuse FU1 and relay normally open switch KA-1, KA-2, KA-3, KA-4 are collectively constituted to thyristor SR1-SR8, Relay normally closed switch KA-4, KA-5, KA-6 form relay protection circuit.
In Fig. 3, the bucking coil of compensator transformer TB1, TB2, TB3 are connected in phase line, and phase line input terminal is LA1, Output end is LA2.Voltage on TB1, TB2, TB3 magnet exciting coil is controlled by thyristor bridge.The one of TB1, TB2, TB3 magnet exciting coil The thyrister bridge arm circuit of SR1 and SR2 composition is connected to after end is in parallel, the other end of TB1, TB2, TB3 magnet exciting coil connects respectively It is connected to the thyrister bridge arm circuit of SR3 and SR4, SR5 and SR6, SR7 and SR8 composition.If the offset voltage of TB1, TB2, TB3 are equal It is not identical, do not consider the compensation way that offset voltage is cancelled out each other, then compensator transformer group is at most shared 7 kinds positive, and reversed 7 Kind, totally 14 kinds of voltage compensation states, 0 voltage compensation state when a kind of additional input voltage is within normal range (NR), phase line is defeated The AC supply voltage for entering to hold LA1 to input can be at most divided into 15 voltage ranges and compensate control.In Fig. 3, N zero Line, G11, G12 to G81, G82 are respectively the trigger signal input terminal of bidirectional thyristor SR1 to SR8.
Each bidirectional thyristor in Fig. 2, Fig. 3 can be substituted with the unidirectional thyristor of 2 reverse parallel connections.Fig. 2, Fig. 3 In, relay normally open switch and relay normally closed switch composition relay protection switch.
Sampling comparing unit carries out voltage sample to AC supply voltage by AC supply voltage sample circuit and is exchanged Supply voltage sampled value, the comparison circuit being made of M comparator are compared AC supply voltage sampled value, export M The voltage class fiducial value that binary number is constituted.
Fig. 4 is sampling comparing unit embodiment 1, compensates control for compensation main circuit embodiment 1.The friendship of Fig. 4 In the voltage sampling circuit of galvanic electricity source, the AC supply voltage inputted from phase line L1 and zero curve N is after transformer TV decompression, by two poles The rectifier bridge rectification of pipe DV1-DV4 composition, then divided through capacitor CV1 filtering and resistance RV1, RV2, obtain the alternating current with input The AC supply voltage sampled value U1 of source voltage effective value direct proportionality.
In the comparison circuit of Fig. 4, resistance RF1-RF7 forms bleeder circuit, after power supply+VCC1 partial pressure, obtains 6 threshold values Voltage UF1-UF6.6 comparator FA1-FA6 realize the ratio of AC supply voltage sampled value U1 and 6 threshold voltage UF1-UF6 Compared with the voltage class fiducial value P1 of output is made of the output J1-J6 of 6 comparator FA1-FA6, and AC supply voltage is fluctuated The voltage of interval range is divided into 7 voltage class sections.Amplifier FA0 form follower, AC supply voltage sampled value U1 pass through with After device FA0 driving, sent simultaneously to the non-inverting input terminal of comparator FA1-FA6;6 threshold voltage UF1-UF6 are sent respectively To the inverting input terminal of comparator FA1-FA6.In Fig. 4, power supply+VCC1 can also be replaced with other precision voltage sources, divided Circuit divides precision voltage source, and threshold voltage can be made more accurate.Amplifier FA0 and comparator FA1-FA6 are preferably used The rail-to-rail amplifier of single supply+VCC1 power supply, for example, LMV324, LMV358, AD8517, TLV2432, TLV2434 etc..
If the AC supply voltage fluctuation range of input is 220V ± 10%, it is desirable that stablized the model in 220V ± 2% Enclose interior output.Comparing unit embodiment 1 is sampled using Fig. 4, input can be divided into section in 242V to the voltage between 198V Voltage swing is 7 voltage class sections of 6.4V, and the voltage in 3 voltage class sections therein is higher than desired output voltage Range needs to carry out drop compensation;The voltage in 3 voltage class sections is risen lower than desired output voltage range Pressure compensation;1 voltage class section carries out 0 voltage compensation, i.e. uncompensation within desired output voltage range.6.4V Voltage range is not more than 220V ± 1.5%, meets requirement of the output control within 220V ± 2%;7 voltage class of 6.4V The corresponding AC supply voltage waving interval in section is 242.4V to 197.6V, covers the range actually fluctuated.It is mended using Fig. 2 It repays formula main circuit embodiment 1 to compensate, and TB1 offset voltage is low, TB2 offset voltage is high;The offset voltage of TB2 is TB1 benefit 2 times for repaying voltage, then when voltage is alternating current 220V on magnet exciting coil at this time, TB1 offset voltage is 6.4V, and TB2 offset voltage is 12.8V.Ratio phase between the selection and AC supply voltage sampled value U1 and AC supply voltage of threshold voltage UF1-UF6 It closes;If the ratio between AC supply voltage sampled value U1 and AC supply voltage is 0.01, i.e. AC supply voltage sampled value U1 is the 1% of AC supply voltage virtual value, then AC supply voltage is divided into 7 voltage etc. that section voltage swing is 6.4V When grade section, 6 threshold voltage UF1-UF6 are respectively 2.36V, 2.296V, 2.232V, 2.168V, 2.104V, 2.04V, for Separate 6 intermediate dividing voltage values of the corresponding voltage sample value of AC supply voltage value in 7 voltage class sections;According to The size of 6 threshold voltage UF1-UF6 and+VCC1 can calculate the size of resistance RF1-RF7.
In Fig. 4, resistance R11, resistance R12 and comparator FA1 form Schmidt's comparator, reasonably select resistance R11, resistance The resistance value of R12 can control the size of hysteresis voltage range, avoid AC supply voltage in the comparison Near The Critical Point of comparator When fluctuation, the frequent switching of electronic switch in thyristor bridge is caused.The work of resistance R21, resistance R22 to resistance R61, resistance R62 With identical, Schmidt's comparator is formed with comparator FA2 to comparator FA6 respectively.Due to the benefit of compensation main circuit embodiment 1 Repaying mode automatically has Schmidt's characteristic, and comparator FA1 to comparator FA6 can not also form Schmidt's comparator, at this point, electric Hinder R12 to resistance R62 without using with connection, resistance R11 to resistance R61 then retains either respectively short circuit connect.
The embodiment 1 of Fig. 4 can also be carried out for compensation main circuit embodiment 2, at this time, it may be necessary to by AC supply voltage The voltage of waving interval range is divided into more voltage class sections.For example, by the electricity of AC supply voltage waving interval range When pressure is divided into 15 voltage class sections, the circuit of Fig. 4 should extend to 14 comparators, with 14 threshold value electricity of different sizes Pressure is compared, and the voltage class fiducial value P1 of output will be by 14, for example, J1-J14 is formed.
Fig. 5 is sampling comparing unit embodiment 2, for compensating control for compensation main circuit embodiment 2.Fig. 5 In, FD1 is that real available value detects device LTC1966, LTC1966 and transformer TV1, capacitor CV2, capacitor CV3 composition alternating current Source voltage sampling circuit measures the AC supply voltage virtual value inputted from phase line L1 and zero curve N, obtains AC power source Voltage sample value U2.UIN1, UIN2 of LTC1966 is alternating voltage difference input terminal, and USS is the negative supply input that can be grounded End, UDD are positive power input, and GND is ground terminal, and EN is that low level effectively enables control signal, and UOUT is voltage output End, COM are output voltage return terminal.
In Fig. 5, FD2, resistance RD1, resistance RD2 form comparison circuit;FD2 compares display driver LM3914 for 10 grades, The internal voltage divider circuit that inside is together in series containing 10 1k Ω precision resistances, forms 10 comparative threshold voltages and is respectively connected to The positive input terminal of internal 10 comparators;6 feet are that internal voltage divider circuit is high-end, and the internal standard electricity of 7 feet is connected to through resistance RD1 Source exports VREF;4 feet are internal voltage divider circuit low side, are connected to the ground through resistance RD2;8 feet are internal standard power supply low side, connection To ground;2 feet are negative power end, are connected to the ground;3 feet are positive power source terminal, are connected to power supply+VCC1;5 feet are signal input part, even It is connected to AC supply voltage sampled value U2, is connected internally to the negative input end of 10 comparators;The signal that 10 feet are exported to 18 feet L1 to L9 is comparator output compared with 9 comparative threshold voltages of highest as a result, wherein L1 comparison voltage highest, successively drops Low, L9 comparison voltage is minimum;The equal low level of L1 to L9 is effective, the highest priority of L1, and L1 to L9 forms voltage class fiducial value P1;The scheme control end of 9 feet is connected to power supply+VCC1, realizes (continuous) output of the strip of L1 to L9.In Fig. 5, internal voltage divider electricity Road is high-end can also to be connected to other power supplys through resistance RD1, for example, power supply+VCC1.
9 comparators inside LM3914 in 10 comparators have been used in Fig. 5, and the AC supply voltage of input has been compared Divide into 10 voltage class sections.If the AC supply voltage fluctuation range of input is 220V+10% to 220V-20%, It asks to be stablized and be exported in the range of 220V ± 2%.Using the sampling comparing unit embodiment 2 of Fig. 5, will input 242V extremely Voltage between 176V is divided into 10 voltage class sections that section voltage swing is 7V, 3 voltage class sections therein Voltage is higher than desired output voltage range, needs to carry out drop compensation;The voltage in 6 voltage class sections is defeated lower than what is required Voltage range out needs to carry out boosting compensation;1 voltage class section carries out 0 voltage within desired output voltage range Compensation, i.e. uncompensation.The voltage range of 7V is 220V ± 1.6%, meets requirement of the output control within 220V ± 2%;7V 10 voltage class sections corresponding AC supply voltage waving intervals be 244.5V to 174.5V, cover and actually fluctuate Range.It is compensated using the compensation main circuit embodiment 2 of Fig. 3, and TB1 offset voltage is minimum, TB3 offset voltage highest;TB2 Offset voltage be 2 times of TB1 offset voltage, the offset voltage of TB3 is 2 times of TB2 offset voltage, then at this time on magnet exciting coil When voltage is alternating current 220V, TB1 offset voltage is 7V, and TB2 offset voltage is 14V, and TB3 offset voltage is 28V.Threshold voltage Selection and the ratio correlation between AC supply voltage sampled value U2 and AC supply voltage;If AC supply voltage sampled value U2 Ratio between AC supply voltage is 0.005, i.e. AC supply voltage sampled value U2 is AC supply voltage virtual value 0.5%, then when AC supply voltage being divided into 10 voltage class sections that section voltage swing is 7V, 9 threshold voltages point Not Wei 1.1875V, 1.1525V, 1.1175V, 1.0825V, 1.0475V, 1.0125V, 0.9775V, 0.9425V, 0.9075V, For 9 intermediate dividing voltages of voltage sample value corresponding with the AC supply voltage value in 10 voltage class sections is separated Value;The high-end voltage of internal voltage divider circuit is connected to highest comparator positive input terminal, therefore 6 foot voltages are 1.1875V.According to this 9 The size of threshold voltage and internal standard power supply output VREF (1.2V or 1.25V), and internal 10 precision resistances are big It is small, the size of resistance RD1, RD2 can be calculated.If it is required that improving the fluctuation of the precision either input voltage of voltage compensation Range is bigger, it is desirable that when voltage class is divided into more voltage class sections by the sampling comparing unit embodiment 2 of Fig. 5, example Such as, when the voltage by AC supply voltage waving interval range being needed to be divided into 15 voltage class sections, 2 LM3914 can be used It realizes, the internal voltage divider circuit in 2 LM3914 is connected, 20 comparative threshold voltages is formed, constitutes 20 grades of comparison circuits;Choosing It selects 14 grades therein and compares output, the voltage class fiducial value P1 of output will be by 14, for example, L1-L14 is formed.
The sampling comparing unit embodiment 2 of Fig. 5 can also compensate control for compensation main circuit embodiment 1, this When only the voltage of the AC supply voltage waving interval range of input need to be divided into no more than 7 voltage class sections, that is, select Select the comparison output wherein no more than 6 grades.
In the sampling comparing unit embodiment 1,2 of Fig. 4, Fig. 5, when the AC supply voltage of input exceeds maximum voltage grade When interval range, voltage class fiducial value of output etc. is all the voltage class fiducial value of maximum voltage grade interval and carries out phase The compensation answered;When the AC supply voltage of input is lower than minimum voltage levels interval range, the voltage class fiducial value of output It is compensated etc. the voltage class fiducial value for being all minimum voltage levels section and accordingly.
In addition to the sampling comparing unit embodiment of Fig. 4 or Fig. 5, either implement for compensation main circuit embodiment 1 When example 2 compensates control, it is also an option that other AC supply voltage sample circuits and comparison circuit, realize the function of requirement Energy.Fig. 4 AC supply voltage sample circuit output AC supply voltage sampled value U1, can send to the comparison circuit of Fig. 5 into Row compares, output voltage grade fiducial value;The AC supply voltage sampled value U2 of Fig. 5 AC supply voltage sample circuit output, The comparison circuit to Fig. 4 can be sent to be compared, output voltage grade fiducial value.
Fig. 6 is coding unit embodiment, wherein Fig. 6 (a) is coding unit embodiment 1, and input is sampling comparing unit 6 voltage class fiducial values that embodiment 1 exports, FD3 select integrated encoder 74HC148, Strobe input EI to connect 0 (low electricity It is flat), 74HC148 is in coding effective status, and table 1 is corresponding menu.
Table 1
As can be seen from Figure 4, when AC supply voltage is at highest section, J1-J6 exports high level;Work as AC supply voltage When between second highest region, J1 exports low level, and J2-J6 exports high level;When AC supply voltage is in minimum section, J1-J6 exports low level, should be that the fiducial value of J6 output is effective at this time, when coding, the highest priority of J6 is successively reduced To J1, the priority of J1 is minimum.Table 1 is opposite for 7 voltage class of AC supply voltage in sampling comparing unit embodiment 1 Voltage class fiducial value P1 answering, being made of J1-J6 is encoded, obtain voltage class encoded radio P2, P2 by Y12, Y11, Y10 composition;The AC supply voltage section of 1 representative is minimum in 7 voltage class, successively increases, 7 AC supply voltages represented Section highest.In table 1, the value of 7 Y12, Y11, Y10 corresponding with voltage class 1-7 are effective volume of voltage class encoded radio Code value.
Fig. 6 (b) is coding unit embodiment 2, and input is compared for 9 voltage class of sampling comparing unit embodiment 2 Value, FD4 select integrated encoder 74HC147.From the function of Fig. 5 and LM3914 it is found that when AC supply voltage is in highest section When, L1-L9 exports low level, should be that the fiducial value of L1 output is effective at this time;Between AC supply voltage is in second highest region When, L1 exports high level, and L2-L9 exports low level, should be that the fiducial value of L2 output is effective at this time;Work as AC supply voltage When in minimum section, L1-L9 exports high level;When coding, the highest priority of L1 is successively reduced to L9, and L9's is preferential Grade is minimum.Table 2 be for sampling comparing unit embodiment 2 in AC supply voltage 10 voltage class it is corresponding, by L1- The voltage class fiducial value P1 of L9 composition is encoded, and obtains voltage class encoded radio P2, P2 by Y13, Y12, Y11, Y10 group At;The AC supply voltage section of 1 representative is minimum in 10 voltage class, successively increases, the 10 AC supply voltage areas represented Between highest.In table 2, the value of 10 Y13, Y12, Y11, Y10 corresponding with voltage class 1-10 are having for voltage class encoded radio Imitate encoded radio.
Table 2
When needing to improve compensation precision, the comparison of more levels, voltage class ratio are carried out to the AC supply voltage of input When digit compared with value P1 increases, encoder inputs quantity increase accordingly, at this time can using 2 or more than 74HC148, Either using 2 or more than 74HC147, or directly constitute multi input with ROM memory, or with gate circuit Encoder circuit realizes the function of coding unit.
Fig. 7 is delay protection unit embodiment block diagram, wherein delay detection module YC1 is respectively to the voltage class of input Encoded radio Y12, Y11, Y10 carry out voltage class encoded radio Y22, Y21, Y20 after signal delay is postponed, Y22, Y21, Y20 forms P3;YC1 module simultaneously respectively to Y12, Y11, Y10 carry out Edge check obtain Edge check signal Y32, Y31, Y30;Trigger region does not control signal generator module YC2 and Edge check signal Y32, Y31, Y30 of input is converted to not trigger region Control signal P4 output.In the embodiment block diagram of Fig. 7, delay detection module YC1 input voltage class encoded radio only have Y12, Y11, Y10 etc. 3, K is equal to 3;If K is equal to 4, the voltage class encoded radio of delay detection module YC1 input is by 4 binary systems Value composition, for example, it is corresponding to carry out the voltage class encoded radio after signal delay is postponed when by Y13, Y12, Y11, Y10 Also there are Y23, Y22, Y21, Y20 etc. 4, obtaining Edge check signal also to Y13, Y12, Y11, Y10 progress Edge check has Y33, Y32, Y31, Y30 etc. 4, trigger region control signal generator module YC2 input Edge check signal also have Y33, Y32, Y31, Y30 etc. 4.
Fig. 8 is the delay detection circuit embodiment 1 for encoding value signal Y10 in delay detection module needle to voltage class.Electricity Hinder RY0, capacitor CY0, driving gate FY0 realize the signal delay of Y10 is obtained Y10 it is delayed after signal Y20.Resistance RY1, Capacitor CY1, diode DY1, phase inverter FY1 composition are directed to the rising edge detection circuit of input signal Y 10, and phase inverter FY1's is defeated Out in signal YP1, the pulse of corresponding negative pulse form is exported after Y10 rising edge.Resistance RY2, capacitor CY2, Diode DY2, phase inverter FY2, FY3 composition are directed to the failing edge detection circuit of input signal Y 10, the output letter of phase inverter FY3 In number YP2, the pulse of corresponding negative pulse form is exported after Y10 failing edge.NAND gate FY4 is accomplished that negative patrol Collect or logic function, when there is negative pulse generation in input signal Y P1, YP2, the Edge check signal of NAND gate FY4 output Positive pulse is generated in Y30, i.e., when input signal Y 10 changes, NAND gate FY4 exports the pulse of a positive pulse form. In Fig. 8, the device of driving gate FY0, phase inverter FY1, phase inverter FY3 preferably with Schmidt's input, for example, phase inverter selects 74HC14, CD40106 etc.;Driving gate FY0 can be made of 2 phase inverters with Schmidt's input.
Fig. 9 is the delay detection circuit embodiment 2 for encoding value signal Y10 in delay detection module needle to voltage class.Instead Phase device FY5, resistance RY3, capacitor CY3 carry out reverse phase and delay to input signal Y 10, obtain the delayed inversion signal of Y10 YP0;Phase inverter FY6 again by YP0 reverse phase, obtain Y10 it is delayed after signal Y20.NAND gate FY7 input signal be Y10 and The pulse of negative pulse form corresponding with Y10 rising edge is generated in Y10 delayed inversion signal YP0, output signal YP1; Or the signal of door FY8 input is the delayed inversion signal YP0 of Y10 and Y10, is generated and Y10 failing edge phase in output signal YP2 The pulse for the negative pulse form answered.NAND gate FY9 is accomplished that negative logic or logic function, when input signal Y P1, YP2 In when having negative pulse generation, generate positive pulse in the Edge check signal Y30 of NAND gate FY9 output, i.e., when input signal Y 10 has When variation, NAND gate FY9 exports the pulse of a positive pulse form.In Fig. 9, phase inverter FY6, NAND gate FY7 or door FY8 It is preferred that the device with Schmidt's input, for example, phase inverter selects 74HC14, CD40106 etc.;NAND gate selection 74HC132, CD4093 etc.;Or door selects 74HC7032, or 2 phase inverters with Schmidt's input of selection and 1 NAND gate to come in fact Existing or door function.
Figure 10 is the delay detection circuit embodiment 3 for encoding value signal Y10 in delay detection module needle to voltage class, In the rising edge detection circuit for input signal Y 10 formed by resistance RY1, capacitor CY1, diode DY1, phase inverter FY1, and Failing edge detection circuit for input signal Y 10 is formed by resistance RY2, capacitor CY2, diode DY2, phase inverter FY2, FY3, And it is identical as the embodiment 1 of Fig. 8 using the circuit of NAND gate FY4 output Edge check signal Y30.In Figure 10, by phase inverter FY11, FY12, FY13, FY14 realize the signal delay of Y10 is obtained Y10 it is delayed after signal Y20.
The embodiment 1-3 of Fig. 8, Fig. 9, Figure 10 are the delay detection electricity for the signal Y10 in voltage class encoded radio Road, for other signals in voltage class encoded radio, for example, it is directed to input signal Y 12, the delay detection circuit of Y11, and The delay detection circuit of Y13 in 4 voltage class encoded radios is delayed with input signal Y 10 is directed in corresponding embodiment The circuit structure of detection is as function.Delay detection circuit can also realize its function using other circuits met the requirements Energy.
The function of trigger region control signal generator module is, when any one of Edge check signal of input or It is multiple when having pulse relevant to edge, a pulse is not exported in trigger region control signal.Figure 11 is not trigger Area controls signal generator module embodiment, by or door FY10 realize that the input signal of corresponding function or door FY10 are that edge is examined Signal Y32, Y31, Y30 are surveyed, exports and controls signal P4 for not trigger region.In Figure 11 embodiment, not trigger region control signal output Pulse be positive pulse, i.e., not trigger region control signal high level it is effective;When or door FY10 change nor gate into when, not trigger region The pulse for controlling signal output is negative pulse, and trigger region control signal low level is not effective.If the Edge check letter of input The pulse relevant to edge that has generated in number Y32, Y31, Y30 is negative pulse, then in Figure 11 or door should be changed to NOT gate either with door, realizes under negative logic or logic function.If the Edge check signal of input has 4, Tu11Zhong Or door, or for realizing other doors of not trigger region control signal generator module function, for example, nor gate, NAND gate, It is also accordingly 4 in-gate circuits with door etc..
Figure 12 is that split-phase closes waveform diagram in the middle part of delay protection unit.In Figure 12, the Y10 in voltage class encoded radio divides Not Fa Sheng rising edge change and failing edge changes, Y20 is the voltage class encoded radio after the Y10 delay T1 time;Fig. 8's In the detection circuit embodiment 1 that is delayed, T1 is determined by the product size (i.e. time constant size) of resistance RY0 and capacitor CY0;Scheming In 9 delay detection circuit embodiment 2, T1 is determined by the product size of resistance RY3 and capacitor CY3;It is detected in the delay of Figure 10 In circuit embodiments 3, T1 is determined by the gate delay time size of phase inverter FY11, FY12, FY13, FY14 itself.In Figure 12, letter Because the negative pulse width that Y10 rising edge generates is T2 in number YP1;In the delay detection circuit embodiment 1 of Fig. 8 and the delay of Figure 10 In detection circuit embodiment 3, T2 is determined by the product size of resistance RY1 and capacitor CY1;Implement in the delay detection circuit of Fig. 9 In example 2, T2 is determined by the product size of resistance RY3 and capacitor CY3.In Figure 12, because what Y10 failing edge generated bears in signal YP2 Pulse width is T3;In the delay detection circuit embodiment 1 of Fig. 8 and the delay detection circuit embodiment 3 of Figure 10, T3 is by resistance The product size of RY2 and capacitor CY2 determines;In the delay detection circuit embodiment 2 of Fig. 9, T3 is by resistance RY3 and capacitor CY3 Product size determine.In Figure 12,2 positive pulses in Edge check signal Y30 respectively in signal YP1 because of Y10 rising edge Because the negative pulse that Y10 failing edge generates corresponds in the negative pulse and signal YP2 of generation.It is located in Figure 12 voltage class encoded radio When rising edge change occurs for Y10, no change has taken place by Y11, Y12 in voltage class encoded radio, at this time its corresponding edge inspection It surveys signal Y31, Y32 and does not generate positive pulse;If Y11, Y12 when failing edge, which occurs, for Y10 changes, in voltage class encoded radio It changes simultaneously, generates positive arteries and veins relevant to Y11, Y12 variation in its corresponding Edge check signal Y31, Y32 respectively at this time Punching.According to the logic function of not trigger region above-mentioned control signal generator module, not trigger region control signal generator module output Single pulse width and input Edge check signal in generate widest pulse width in the input pulse of the pulse jointly It is identical.In Figure 12, the 1st positive pulse in trigger region control signal P4 be not by the 1st negative pulse in Edge check signal Y30 It generates, then the two equivalent width;The 2nd positive pulse in trigger region control signal P4 be not by the 2nd in Edge check signal Y30 Negative pulse joint effect in a negative pulse and Edge check signal Y31, Y32 generates, and width and generates 3 of the positive pulse The widest negative pulse width of width is identical in negative pulse;As can be seen from Figure 12, the negative pulse width in Y32 is most wide, the 2nd in P4 Positive pulse width is identical as the negative pulse width in Y32.This width difference is because determining T2, T3 in different delayed time detection circuit Resistance, capacitance difference caused by.
It is delayed in detection circuit embodiment 1 in the delay protection unit of Fig. 8, voltage class encoded radio changes to right When the delay time in the not trigger region control signal pulse forward position answered is the delay of FY10 in gate circuit FY1, FY4 and Figure 11 Between the sum of or gate circuit FY3, FY4 and Figure 11 in FY10 the sum of delay time;By multiplying for resistance RY0 and capacitor CY0 The range of choice of the signal delay time T1 for the voltage class encoded radio that product size determines is the ms order of magnitude, it is clear that is greater than voltage Grade encoded radio changed to the delay time in corresponding not trigger region control signal pulse forward position, i.e. grade encoded radio is believed Number delay is later than forward position moment of the pulse exported after voltage class encoded radio changes at the time of change.Strictly speaking, T1 actually includes the sum of lag time and the delay time of gate circuit FY0 caused by resistance RY0 and capacitor CY0.Fig. 8 In embodiment 1, in selection parameter, the value of the value and T3 that make T2 is all larger than the value of T1, changes grade encoded radio signal delay Meet the rear requirement along the moment of the pulse exported after need to changing earlier than voltage class encoded radio at the time of change.
It is delayed in detection circuit embodiment 2 in the delay protection unit of Fig. 9, voltage class encoded radio changes to right When the delay time in the not trigger region control signal pulse forward position answered is the delay of FY10 in gate circuit FY7, FY9 and Figure 11 Between the sum of or gate circuit FY8, FY9 and Figure 11 in FY10 the sum of delay time;T1 is the numerical value of the ms order of magnitude, is shown So, the signal delay time T1 of the voltage class encoded radio determined at this time by the product size of resistance RY3 and capacitor CY3 is greater than electricity Pressure grade encoded radio changed to the delay time in corresponding not trigger region control signal pulse forward position, i.e. voltage class is compiled Code value signal delay is later than the forward position moment of the pulse exported after voltage class encoded radio changes at the time of change.Fig. 9 Delay detection circuit embodiment 2 in, voltage class encoded radio signal delay change at the time of with voltage class encoded radio occur The rear of the pulse exported after change is influenced by signal YP0 change along the moment;Voltage class encoded radio signal delay changes At the time of change for signal YP0 after delay again through gate circuit FY6;The pulse that voltage class encoded radio exports after changing It is rear along the moment be the sum of delay time again through FY10 in gate circuit FY7, FY9 and Figure 11, or letter after signal YP0 changes The sum of delay time again through FY10 in gate circuit FY8, FY9 and Figure 11 after number YP0 changes;Obviously, voltage class encodes at this time The rear of the pulse that value signal delay exports after changing at the time of change than voltage class encoded radio few passes through 2 along the moment The delay time of gate circuit, meeting at the time of voltage class encoded radio signal delay changes need to occur earlier than voltage class encoded radio The rear requirement along the moment of the pulse exported after change.
Figure 13 is the embodiment for interlocking control unit, and Figure 13 (a) is interlocking control unit embodiment 1, and YR1 therein is ROM memory.If TB1 offset voltage is low in the compensation main circuit embodiment 1 of Fig. 2, TB2 offset voltage is high;And the compensation of TB2 Voltage is 2 times of TB1 offset voltage.Table 3 is that interlocking control unit embodiment 1 is exported for Fig. 6 (a) coding unit embodiment 1 And the voltage class encoded radio through delay protection cell delay carries out the logic true value table of logic control;AC supply voltage fluctuation Range is 220V ± 10%, it is desirable that is stablized and is exported in the range of 220V ± 2%.Mutual lock control is realized using ROM memory When the logic function of unit processed, P4, Y22-Y20 postpone address input end A3-A0, the ROM storage for being connected to ROM memory respectively The data output D0-D5 of device is the logic output for interlocking control unit, and 6 output signal P51-P56 form Trig control signal P5.In table 3, trigger region does not control invalidating signal, and P4 is equal to 0, and voltage class encoded radio is value corresponding with voltage class 1-7 When, interlocking control unit controls compensation main circuit embodiment 1 and carries out corresponding voltage compensation;For example, input voltage is minimum Voltage class 1 when, control P51, P54, P56 output remove to open bidirectional thyristor SR1, SR4, SR6 for 0, control P52, P53, P55 output removes shutdown bidirectional thyristor SR2, SR3, SR5 for 1, and TB1, TB2 is made to carry out positive compensation;Input voltage is voltage When grade 2, control P51, P53, P56 output go to open bidirectional thyristor SR1, SR3, SR6, control P52, P54, P55 output for 0 Shutdown bidirectional thyristor SR2, SR4, SR5 are removed for 1, TB2 is only made to carry out positive compensation;When input voltage is voltage class 4, control P51, P53, P55 output go to open bidirectional thyristor SR1, SR3, SR5 for 0, and control P52, P54, P56 output go shutdown double for 1 To thyristor SR2, SR4, SR6,0 voltage compensation is realized, i.e., TB1, TB2 are without compensation;Input voltage is voltage class 5 When, control P52, P53, P56 output go to open bidirectional thyristor SR2, SR3, SR6 for 0, and control P51, P54, P55 output is gone for 1 Bidirectional thyristor SR1, SR4, SR5 are turned off, TB1 is only made to carry out Contrary compensation;Etc..When P4 is equal to 1, show AC power source electricity There is fluctuation in pressure, voltage class encoded radio is made to produce variation, need to carry out the switching of electronic switch, change compensation way.? In the handoff procedure of electronic switch, when to avoid in thyristor bridge upper and lower bridge arm from switching because electronic switch be delayed to turn off because Element causes power supply short circuit, when not trigger region controls the signal valid period, i.e. the P4 of embodiment is equal to 1, in cutoff thyristor bridge All bidirectional thyristors, interlocking control unit control P51-P56 all output 1.
Table 3
In table 3, not when trigger region control invalidating signal (P4 is equal to 0), the efficient coding value of 7 voltage class encoded radio P3 7 groups of effective Trig control signals are corresponding with, accordingly realize the control of 7 kinds of voltage compensation states;When P2 change makes P4 effectively (P4 etc. 1 group of effective Trig control signal is corresponding with when 1), interlocking control unit exports altogether there are 8 groups of effective Trig control signals.Work as P4 In vain (P4 be equal to 0), when and to interlock the voltage class encoded radio P3 of control unit input be invalid code value, control unit is interlocked 1 group of invalid Trig control signal of corresponding output;The voltage class encoded radio P2 of Fig. 6 (a) coding unit embodiment 1 and delayed Voltage class encoded radio P3 afterwards has 7 efficient coding values, and being only possible to existing 1 invalid code value is 000.In table 3, this 1 It is 1 that the specific invalid Trig control signal of group, which makes P51 output be 0, P52-P56 output,;The specific invalid Trig control signal Without the practical control of thyristor, even if playing the triggering control action of thyristor, also only make the magnet exciting coil of TB1, TB2 It meets zero curve N and excitation voltage is 0, without voltage compensation;This 1 group specifically invalid Trig control signal be also an option that other The triggering combination of voltage compensation is not can be carried out, for example, P53 output is made to be 0, others output is 1.
In table 3, low level is effective when the Trig control signal triggering bidirectional thyristor of interlocking control unit output is connected.Such as The Trig control signal that fruit interlocks control unit output requires to be that high level is effective when triggering bidirectional thyristor conducting, then table 3 is patrolled 1 in the output signal of volume truth table, which needs to change into 0,0, needs to change into 1;When realizing its function with ROM memory, storage The content of unit is according to 3 reverse phase of table.
Figure 13 (b) is interlocking control unit embodiment 2, and YR2 therein is ROM memory.If the compensation main circuit of Fig. 3 is real It applies in example 2, TB1 offset voltage is minimum, TB3 offset voltage highest;And the offset voltage of TB2 is 2 times of TB1 offset voltage, TB3 Offset voltage be 2 times of TB2 offset voltage.Table 4 be interlocking control unit for Fig. 6 (b) coding unit embodiment 2 export and Voltage class encoded radio through delay protection cell delay carries out logic true value table when logic control;AC supply voltage fluctuation Range is 220V+10% to 220V-20%, it is desirable that is stablized and is exported in the range of 220V ± 2%.Using Figure 13's (b) The embodiment 2 of control unit is interlocked, i.e., when realizing its logic function using ROM memory YR2, input P4, Y23-Y20 are connected to The data output D0-D7 of the address end A4-A0 of ROM memory, ROM memory are the logic output for interlocking control unit, and 8 defeated Signal P51-P58 forms Trig control signal P5 out.In table 4, trigger region does not control invalidating signal, and P4 is equal to 0, and voltage class is compiled When code value is value corresponding with voltage class 1-10, interlocking control unit controls compensation main circuit embodiment 2 and carries out accordingly Voltage compensation;For example, control P51, P53, P55, P57 output go to open two-way brilliant lock for 0 when input voltage is voltage class 7 Pipe SR1, SR3, SR5, SR7, control P52, P54, P56, P58 output remove shutdown bidirectional thyristor SR2, SR4, SR6, SR8 for 1, Realize 0 voltage compensation, i.e., TB1, TB2, TB3 are without compensation;When input voltage is voltage class 8, control P52, P53, P56, P58 output go to open bidirectional thyristor SR2, SR3, SR6, SR8 for 0, and control P51, P54, P55, P57 output goes to close for 1 Disconnected bidirectional thyristor SR1, SR4, SR5, SR7, make TB1 carry out Contrary compensation;When input voltage is voltage class 9, control P52, P54, P55, P58 output go to open bidirectional thyristor SR2, SR4, SR5, SR8 for 0, and control P51, P53, P56, P57 output is 1 Shutdown bidirectional thyristor SR1, SR3, SR6, SR7 are removed, TB2 is made to carry out Contrary compensation;When input voltage is voltage class 10, control P52, P53, P55, P58 output go to open bidirectional thyristor SR2, SR3, SR5, SR8, control P51, P54, P56, P57 output for 0 Shutdown bidirectional thyristor SR1, SR4, SR6, SR7 are removed for 1, makes TB1, TB2 while carrying out Contrary compensation;Input voltage is voltage etc. When grade 6, control P51, P54, P55, P57 output remove to open bidirectional thyristor SR1, SR4, SR5, SR7 for 0, control P52, P53, P56, P58 output remove shutdown bidirectional thyristor SR2, SR3, SR6, SR8 for 1, and TB1 is made to carry out positive compensation;Input voltage is electricity When pressing class 4, control P51, P54, P56, P57 output remove to open bidirectional thyristor SR1, SR4, SR6, SR7 for 0, control P52, P53, P55, P58 output remove shutdown bidirectional thyristor SR2, SR3, SR5, SR8 for 1, make TB1, TB2 while carrying out positive compensation; When input voltage is voltage class 3, control P51, P53, P55, P58 output for 0 go to open bidirectional thyristor SR1, SR3, SR5, SR8, control P52, P54, P56, P57 output remove shutdown bidirectional thyristor SR2, SR4, SR6, SR7 for 1, and TB3 is made to carry out positive benefit It repays;When input voltage is voltage class 1, control P51, P53, P56, P58 output for 0 go to open bidirectional thyristor SR1, SR3, SR6, SR8, control P52, P54, P55, P57 output remove shutdown bidirectional thyristor SR2, SR4, SR5, SR7 for 1, keep TB2, TB3 same The compensation of Shi Jinhang forward direction;Etc..Trigger region control signal is not effective, when P4 is equal to 1, shows that AC supply voltage has fluctuation, So that voltage class encoded radio is produced variation, need to carry out the switching of electronic switch, changes compensation way, at this time cutoff thyristor All bidirectional thyristors in bridge, interlocking control unit control P51-P58 all output 1.
Table 4
In table 4, not when trigger region control invalidating signal (P4 is equal to 0), the efficient coding of 10 voltage class encoded radio P3 Value is corresponding with 10 groups of effective Trig control signals, accordingly realizes the control of 10 kinds of voltage compensation states;When P2 change keeps P4 effective When (P4 is equal to 1), it is corresponding with 1 group of effective Trig control signal, interlocking control unit shares 11 groups of effective Trig control signals.When P4 invalid (P4 is equal to 0), and when the voltage class encoded radio P3 for interlocking control unit input is invalid code value, mutual lock control list Member is corresponding with 1 group of specifically invalid Trig control signal;The voltage class encoded radio P2 of Fig. 6 (b) coding unit embodiment 2 and Voltage class encoded radio P3 after delayed has 10 efficient coding values, it is also possible to export 6 invalid code values;Export 6 nothings Interlocking control unit is set to export same 1 group specifically invalid Trig control signal when imitating encoded radio;In table 4, this 1 group invalid It is 1 that Trig control signal, which makes P51 output be 0, P52-P58 output,;The specific invalid Trig control signal is without thyristor Practical control also the magnet exciting coil of TB1, TB2, TB3 is only made to meet zero curve N even if playing the triggering control action of thyristor And excitation voltage is 0, without voltage compensation;This 1 group specifically invalid Trig control signal be also an option that other cannot be into The triggering of row voltage compensation is combined, for example, P53 output is made to be 0, others output is 1.
In table 4, low level is effective when the Trig control signal triggering bidirectional thyristor of interlocking control unit output is connected.Such as High level is effective when the Trig control signal that fruit interlocks control unit output requires triggering bidirectional thyristor to be connected, then 4 logic of table 1 in the output signal of truth table, which needs to change into 0,0, needs to change into 1;When realizing its function with ROM memory, storage is single The content of member is according to 4 reverse phase of table.Combination logic function in either 4 truth table of table of table 3, can also be stored using ROM Other modes except device go to realize.
Figure 14 be trigger unit in trigger bidirectional thyristor SR1 trigger circuit embodiment, by altemating trigger optocoupler UG1, Resistance RG1, resistance RG2 composition, Trig control signal P51 low level are effective.Altemating trigger optocoupler UG1 can choose MOC3021, The phase shifts type bidirectional thyristor output photoelectric coupler such as MOC3022, MOC3023, MOC3051, MOC3052, MOC3053.Power supply+ VCCK is the controlled source controlled by error detection control unit.Trigger bidirectional thyristor SR2- in the compensation main circuit embodiment 1 of Fig. 2 The trigger circuit of bidirectional thyristor SR2-SR8 and the two-way crystalline substance of triggering in SR6, or the triggering compensation main circuit embodiment 2 of Fig. 3 The circuit structure of brake tube SR1 is the same.The altemating trigger optocoupler UG1 of Figure 14 is from G11, G12 trigger pulse exported and trigger unit In other altemating trigger optocouplers output trigger pulse collectively constitute trigger signal P6.
Figure 15 is error detection control unit embodiment, wherein YR3 is ROM memory, and ROM memory forms discrimination module, is used In judge input Trig control signal P5 whether be effective Trig control signal;Triode VT, triode VK1, triode VK2, relay coil KA, freewheeling diode VD, resistance RK1, resistance RK2, resistance RK3 composition protection control circuit.+ VCC2 is The power supply of relay coil and the source current of trigger unit controlled source.
The error detection control unit embodiment of Figure 15 is used for the triggering issued for Figure 13 (a) interlocking control unit embodiment 1 Control signal is judged that table 5 is to judge to interlock whether the Trig control signal that control unit embodiment 1 issues is effectively to trigger Control the logic true value table of signal.
When the Trig control signal that interlocking control unit embodiment 1 issues effectively touches for 8 groups listed by 8 rows of front in table 5 When hair controls 1 group in signal, the triggering control of discrimination module output differentiates that signal is effective, i.e. P7 is 1, expression triggering control letter Number be effective Trig control signal, triode VK1, VK2 conducting, controlled source+VCCK obtain it is electric, trigger unit work normally, according to Corresponding trigger pulse is issued according to Trig control signal.P7 be 1 simultaneously control triode VT conducting, relay coil KA obtain it is electric, It is closed relay normally open switch KA-1, KA-2, KA-3 in the compensation main circuit embodiment 1 of Fig. 2, relay normally closed switch KA-5, KA-6 are disconnected, and thyristor bridge is in compensation work state.When the triggering that interlocking control unit embodiment 1 issues controls letter It number is other signals, when not being any 1 group in 8 groups of effective Trig control signals listed by 8 rows of front in table 5, discrimination module The triggering control of output differentiates that invalidating signal, i.e. P7 are 0, triode VK1, VK2 cut-off, controlled source+VCCK power loss, and triggering is single Member does not work, i.e., does not issue the trigger pulse of triggering thyristor.P7 is 0 while controlling triode VT cut-off, relay coil KA Power loss disconnects relay normally open switch KA-1, KA-2, KA-3 in the compensation main circuit embodiment 1 of Fig. 2, realizes to brilliant lock The open-circuit-protection of pipe bridge;Relay normally closed switch KA-5, KA-6 closure are controlled, the electricity being applied on TB1, TB2 magnet exciting coil is made Pressure is 0.When the input of interlocking control unit embodiment 1 is invalid code value, and exports invalid Trig control signal, from table 5 As can be seen that it is 0 that discrimination module, which equally exports, the open-circuit-protection to thyristor bridge is realized;Therefore, either because of coding unit The failure for code error occur leads to output invalid code value, or interlocking control unit occur control mistake cause it is defeated Invalid Trig control signal is gone out, error detection control unit, which starts, carries out open-circuit-protection to thyristor bridge.When the logic true value of table 5 When table is realized using ROM memory, the address input of ROM memory needs 6, i.e. a0-a5 in table 5 is correspondingly connected with input Signal P51-P56;The data output of ROM memory needs 1, i.e. d0 in table 5 is correspondingly connected with the control signal P7 of output.
Table 5
When error detection control unit need for Figure 13 (b) interlocking control unit embodiment 2 issue Trig control signal into When row judges, table 6 is to judge to interlock whether the Trig control signal that control unit embodiment 2 issues is effective Trig control signal Logic true value table.When the Trig control signal that interlocking control unit embodiment 2 issues is 11 groups listed by 11 row of front in table 6 When 1 group in effective Trig control signal, the triggering control of discrimination module output differentiates that signal is effective, i.e. P7 is 1, indicates triggering Control signal is effective Trig control signal, and triode VK1, VK2 are connected, and controlled source+VCCK obtains electric, the normal work of trigger unit Make, issues corresponding trigger pulse according to Trig control signal.P7 is in 1 while the compensation main circuit embodiment 2 of control figure 3 Relay normally open switch KA-1, KA-2, KA-3, KA-4 closure, relay normally closed switch KA-5, KA-6, KA-7 are disconnected, and make brilliant lock Pipe bridge is in compensation work state.It is other signals when interlocking the Trig control signal that control unit embodiment 2 issues, is not table In 6 when any 1 group in 11 groups of effective Trig control signals listed by 11 rows of front, the triggering of discrimination module output, which controls, to be differentiated Invalidating signal, i.e. P7 are 0, and triode VK1, VK2 cut-off, controlled source+VCCK power loss, trigger unit do not work, i.e., do not issue Trigger the trigger pulse of thyristor.P7 is the relay normally open switch KA- in 0 while the compensation main circuit embodiment 2 of control figure 3 1, KA-2, KA-3, KA-4 are disconnected, and realize the open-circuit-protection to thyristor bridge;Control relay normally closed switch KA-5, KA-6, KA- 7 closures, make the voltage 0 being applied on TB1, TB2, TB3 magnet exciting coil.When the input of interlocking control unit embodiment 2 is nothing When imitating encoded radio, and exporting invalid Trig control signal, as can be seen from Table 6, discrimination module output is 0, is realized to thyristor The open-circuit-protection of bridge;Similarly, either because the failure that code error occurs in coding unit causes to output invalid code There is control mistake and cause to output invalid Trig control signal in value, or interlocking control unit, and error detection control unit opens It is dynamic that open-circuit-protection is carried out to thyristor bridge.When the logic true value table of table 6 is realized using ROM memory, for example, using the reality of Figure 15 When the function of applying example to realize error detection control unit, the address input of the ROM memory YR3 in Figure 15 needs to be expanded to 8, i.e., Address input needs a0-a7, is correspondingly connected with input signal P51-P58;The data output of ROM memory needs 1, i.e., in table 6 D0, be correspondingly connected with the control signal P7 of output.
Table 6
Combination logic function in either 6 truth table of table of table 5, can also be using the other modes except ROM memory It goes to realize.
When the Trig control signal of error detection control unit judgement input is not effective Trig control signal, sending protection is controlled Signal is to compensation main circuit, and when thyristor bridge being made to be in open-circuit-protection state, compensation type ac voltage stabilizer is not to input voltage It compensates, the voltage of voltage-stablizer output is the AC supply voltage inputted.When thyristor bridge is in open-circuit-protection state, If the Trig control signal of error detection control unit judgement input reverts to effective Trig control signal, error detection control unit is certainly The dynamic open-circuit-protection state for stopping thyristor bridge, thyristor bridge are in compensation work state again.
From above embodiment and its course of work it is found that as long as error detection control unit judges the triggering control letter of input Number it is not effective Trig control signal, i.e., when Trig control signal is invalid, is not then issuing the trigger pulse of triggering thyristor Meanwhile starting and thyristor bridge is made to be in open-circuit-protection state;Interlocking control unit transports to effective triggering of error detection control unit Control signal ensure that same bridge arm or more thyristor do not simultaneously turn on, that is, realize the mutual lock control of thyristor up and down of same bridge arm While processed, also there is logic error to other improper control logic mistakes of appearance, including coding unit in voltage-stablizer, defeated Invalid code value is gone out, and logic error occurs in interlocking control unit, when outputing invalid Trig control signal, also by error detection Control unit starts and thyristor bridge is made to be in open-circuit-protection state;When thyristor bridge is in open-circuit-protection state, if inspection Wrong control unit judges that compensation type ac voltage stabilizer reenters normal logic control state, i.e. error detection control unit judges defeated When the Trig control signal entered reverts to effective Trig control signal, then the open-circuit-protection state of thyristor bridge can be automatically stopped And it is made to be in compensation work state again.It is different for the course of work that above-mentioned function effectively strengthens compensation type ac voltage stabilizer Normal protection keeps the work of the compensation type ac voltage stabilizer relatively reliable.
In above each embodiment attached drawing, all ROM memories, logic gates and logic function integrated circuit are adopted It is powered with single supply+VCC1.Except for the technical features described in the specification, the other technologies of compensation type ac voltage stabilizer are ability The routine techniques that field technique personnel are grasped.

Claims (7)

1. a kind of compensation type ac voltage stabilizer, it is characterised in that:
It is single including compensation main circuit, sampling comparing unit, coding unit, delay protection unit, interlocking control unit, triggering Member, error detection control unit;
Compensation main circuit includes compensator transformer group, thyristor bridge and relay protection switch;
It samples comparing unit and voltage sample, output voltage grade fiducial value to coding unit, coding is carried out to AC supply voltage Unit output voltage grade encoded radio;Delay protection unit input voltage grade encoded radio, the voltage class after output delay are compiled Code value and not trigger region control signal;Interlock control unit input delay after voltage class encoded radio and not trigger region control believe Number, export Trig control signal;Trigger unit controls thyristor in main circuit thyristor bridge according to the Trig control signal of input On-off;
Trigger region control signal does not export a pulse after voltage class encoded radio changes for control;Trigger region does not control Signal is effective during exporting pulse, invalid during non-output pulse;
In delay protection unit, the voltage class coding value signal change moment of delay is later than voltage class encoded radio and changes Afterwards not in trigger region control signal pulse the forward position moment, and not trigger region control after changing earlier than voltage class encoded radio Pulse is rear along the moment in signal processed;
When the not trigger region control invalidating signal of interlocking control unit input and the voltage class encoded radio of input is efficient coding When value, effective Trig control signal corresponding with efficient coding value is exported, carries out the compensation control of AC supply voltage;Work as interlocking The not trigger region control invalidating signal of the control unit input and voltage class encoded radio of input is not when being efficient coding value, output Invalid Trig control signal;
The voltage class encoded radio of coding unit output shares M+1 efficient coding value, and corresponding effective Trig control signal is total There is M+1 group, carries out the control of M+1 voltage compensation state;The M is more than or equal to 1;
When the not trigger region control signal for interlocking control unit input is effective, interlocking control unit exports 1 group and effectively triggers control Signal processed carries out the switching control between voltage compensation state;The effective Trig control signal for interlocking control unit output shares M + 2 groups;
All brilliant locks when carrying out the switching control between voltage compensation state, in interlocking control unit output cutoff thyristor bridge Effective Trig control signal of pipe;
Error detection control unit judges that the whether wrong foundation of the Trig control signal of input is that the Trig control signal of input is M+ When 1 group in 2 groups of effective Trig control signals, Trig control signal is correct, otherwise mistake;
When the Trig control signal mistake of error detection control unit judgement input, control thyristor bridge is in open-circuit-protection state.
2. compensation type ac voltage stabilizer according to claim 1, it is characterised in that: control thyristor bridge is in open-circuit-protection The specific method of state is that all upper bridge arms that control disconnects thyristor bridge to carry out open-circuit-protection to thyristor bridge.
3. compensation type ac voltage stabilizer according to claim 1, it is characterised in that: control thyristor bridge is in open-circuit-protection The specific method of state is that all lower bridge arms that control disconnects thyristor bridge to carry out open-circuit-protection to thyristor bridge.
4. the compensation type ac voltage stabilizer according to any one of claim 2-3, it is characterised in that: thyristor bridge is in and opens Under the guard mode of road, when the Trig control signal of error detection control unit judgement input reverts to correct signal, it is automatically stopped brilliant lock The open-circuit-protection state of pipe bridge.
5. compensation type ac voltage stabilizer according to claim 1, it is characterised in that: delay protection unit detects mould by delay Block and not trigger region control signal generator module composition;It include K identical delay detection circuits in delay detection module, each Delay detection circuit input signal postpone after output signal, while to input signal progress edge inspection It surveys, exports Edge check signal;K delay detection circuit carries out signal delay to K voltage class encoded radios respectively, is prolonged The position the K voltage class encoded radio to lag, and Edge check is carried out to K voltage class encoded radios, obtain K Edge check letter Number;K Edge check signal of input is not converted to not trigger region control signal output by trigger region control signal generator module.
6. compensation type ac voltage stabilizer according to claim 5, it is characterised in that: in K identical delay detection circuits, Each delay detection circuit include resistance RY3, capacitor CY3, phase inverter FY5, phase inverter FY6, NAND gate FY7 or door FY8, NAND gate FY9;Phase inverter FY5 input terminal is connected to input signal end;One end of resistance RY3 is connected to phase inverter FY5 output end, Other end is respectively connected to the input terminal, anti-of one end of capacitor CY3, an input terminal of NAND gate FY7 or door FY8 The input terminal of phase device FY6;The other end of capacitor CY3 is connected to ground terminal, and another input terminal of NAND gate FY7 is connected to defeated Another input terminal for entering signal end or door FY8 is connected to input signal end;2 input terminals of NAND gate FY9 are separately connected To NAND gate FY7 output end or door FY8 output end;Phase inverter FY6 output end is the output signal end after delay;NAND gate FY9 Output end is Edge check signal output end.
7. compensation type ac voltage stabilizer according to claim 5, it is characterised in that: trigger region does not control signal generator module For with K input signal end or door FY10;Or the K input signal end of door FY10 is respectively connected to K delay detection electricity Edge check signal output end in road;Or trigger region does not control signal for the output end output of door FY10.
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CN201845250U (en) * 2010-09-30 2011-05-25 东莞市西屋电气设备制造有限公司 Intelligent digital control non-contact voltage stabilizer
CN104052303A (en) * 2013-03-13 2014-09-17 安徽集黎电气技术有限公司 Undisturbed switching mechanism of voltage-stabilization electricity-saving device

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CN2251158Y (en) * 1995-07-05 1997-04-02 顾元章 Combined compensated type ac voltage stabilizer
CN201845250U (en) * 2010-09-30 2011-05-25 东莞市西屋电气设备制造有限公司 Intelligent digital control non-contact voltage stabilizer
CN104052303A (en) * 2013-03-13 2014-09-17 安徽集黎电气技术有限公司 Undisturbed switching mechanism of voltage-stabilization electricity-saving device

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