CN109270439A - A kind of chip detecting method, device, equipment and medium - Google Patents

A kind of chip detecting method, device, equipment and medium Download PDF

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Publication number
CN109270439A
CN109270439A CN201811307906.2A CN201811307906A CN109270439A CN 109270439 A CN109270439 A CN 109270439A CN 201811307906 A CN201811307906 A CN 201811307906A CN 109270439 A CN109270439 A CN 109270439A
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China
Prior art keywords
test
chip
corresponding
generating function
data
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CN201811307906.2A
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Chinese (zh)
Inventor
李拓
周恒钊
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郑州云海信息技术有限公司
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Priority to CN201811307906.2A priority Critical patent/CN109270439A/en
Publication of CN109270439A publication Critical patent/CN109270439A/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer

Abstract

The invention discloses a kind of chip detecting method, device, equipment and media.The step of this method includes: that corresponding data generating function is arranged to test input each in chip to be measured and executes parameter;It is based respectively on each execution parameter and executes corresponding data generating function, generate the corresponding test data of each test input;Each test data is passed to corresponding test input, to test chip to be measured.This method is provided with corresponding data generating function for each test input of chip, and then the test data of each test input is individually generated by the corresponding data generating function of the test input, and then ensure that the flexibility of chip testing and comprehensive.In addition, the present invention also provides a kind of apparatus for testing chip, equipment and medium, beneficial effect is same as above.

Description

A kind of chip detecting method, device, equipment and medium

Technical field

The present invention relates to chip testing fields, more particularly to a kind of chip detecting method, device, equipment and medium.

Background technique

With the continuous development of chip technology technology, the hardware complexity of chip is continuously improved, and at the same time, chip is answered It is also constantly being extended with field, is gradually covering the various aspects of daily life, in order to ensure the stability of chip product and reliable Property, the emulation testing in chip product development process play the role of vital.

In existing chip design cycle, it is divided into Front-end Design (logical design) and rear end design (physical Design) two ranks Section.Front-end Design is mainly the logic function to realize chip by hardware description language.Emulation testing is being carried out to chip During, it needs to construct corresponding usage scenario, i.e. test case for each logic function involved by Front-end Design, And then corresponding test data is inputted to chip input terminal according to the usage scenario of test case, it realizes to running parameter in chip Configuration, achieve the purpose that analog chip works under the usage scenario with this, and then pass through the work of each input terminal of chip State learns the correctness of currently tested logic function.

When the current logic function test for carrying out chip, the test data of each chip input terminal is integrally generated, because This can not be individually created corresponding test data in current test process for a certain input terminal of chip.And currently to patrolling When volume function carries out the test of a certain usage scenario, technical staff is generally required on the basis of the usage scenario to input terminal Test data is oriented adjustment, i.e., is oriented modification to the test data of some or certain several input terminals, and other defeated The test data for entering end is constant, therefore currently obviously cannot achieve to the logic function test of chip and survey in each input terminal of chip Try the orientation adjustment of data, it is difficult to guarantee the flexibility of chip testing and comprehensive.

It can be seen that a kind of chip detecting method is provided, to realize the orientation tune to test data in each input terminal of chip It is whole, guarantee the flexibility of chip testing and comprehensive, is those skilled in the art's urgent problem to be solved.

Summary of the invention

The object of the present invention is to provide a kind of chip detecting method, device, equipment and media, are respectively inputted with realizing to chip The orientation adjustment of test data in end guarantees the flexibility of chip testing and comprehensive.

In order to solve the above technical problems, the present invention provides a kind of chip detecting method, comprising:

Corresponding data generating function is arranged to test input each in chip to be measured and executes parameter;

It is based respectively on each execution parameter and executes corresponding data generating function, generate the corresponding test number of each test input According to;

Each test data is passed to corresponding test input, to test chip to be measured.

Preferably, after testing chip to be measured, this method further comprises:

When the target detection input terminal working condition exception in test input, target detection input terminal is chosen, and only It modifies to the corresponding data generating function of target detection input terminal and/or execution parameter.

Preferably, corresponding data generating function is arranged to test input each in chip to be measured and execution parameter is specific Are as follows:

Corresponding random number generation function and random seed are arranged to test input each in chip to be measured;

Correspondingly, being based respectively on each execution parameter executes corresponding data generating function, it is corresponding to generate each test input Test data specifically:

It is based respectively on each random seed and executes corresponding random number generation function, generate the corresponding test of each test input Data.

Preferably, the corresponding random seed of each test input is different in chip to be measured.

Preferably, random seed is specially system time.

Preferably, data generating function is specifically based on Verilog HDL and writes.

In addition, the present invention also provides a kind of apparatus for testing chip, comprising:

Setup module, for corresponding data generating function to be arranged to test input each in chip to be measured and executes ginseng Number;

Data generation module executes corresponding data generating function for being based respectively on each execution parameter, generates each test The corresponding test data of input terminal;

Incoming test module, for each test data to be passed to corresponding test input, to be surveyed to chip to be measured Examination.

In addition, the present invention also provides a kind of chip testing devices, comprising:

Memory, for storing computer program;

Processor is realized when for executing computer program such as the step of above-mentioned chip detecting method.

In addition, being stored with meter on computer readable storage medium the present invention also provides a kind of computer readable storage medium Calculation machine program is realized when computer program is executed by processor such as the step of above-mentioned chip detecting method.

Chip detecting method provided by the present invention is first respectively set pair each test input in chip to be measured The data generating function and execution parameter answered, and then be based respectively on the corresponding execution parameter of each test input and execute and be somebody's turn to do The corresponding data generating function of parameter is executed, the test data of each test input is generated with this, and test data is passed to phase The test input answered achievees the purpose that test chip to simulate work of the chip to be measured under certain scene.This method is for core Each test input of piece is provided with corresponding data generating function and executes parameter, and then in test, each survey The test data of examination input terminal is individually generated by the corresponding data generating function of the test input, therefore this method can be In test process, by modifying the data generating function of certain test input or executing parameter to realize the test to the input terminal The orientations of data is modified, and ensures that the test data of other input terminals is constant, so ensure that chip testing flexibility and It is comprehensive.In addition, the present invention also provides a kind of apparatus for testing chip, equipment and medium, beneficial effect is same as above.

Detailed description of the invention

In order to illustrate the embodiments of the present invention more clearly, attached drawing needed in the embodiment will be done simply below It introduces, it should be apparent that, drawings in the following description are only some embodiments of the invention, for ordinary skill people For member, without creative efforts, it is also possible to obtain other drawings based on these drawings.

Fig. 1 is a kind of flow chart of chip detecting method provided in an embodiment of the present invention;

Fig. 2 is a kind of structure chart of apparatus for testing chip provided in an embodiment of the present invention.

Specific embodiment

Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, rather than whole embodiments.Based on this Embodiment in invention, those of ordinary skill in the art are without making creative work, obtained every other Embodiment belongs to the scope of the present invention.

Core of the invention is to provide a kind of chip detecting method, is determined with realizing test data in each input terminal of chip To adjustment, guarantee the flexibility of chip testing and comprehensive.Another core of the invention be to provide a kind of apparatus for testing chip, Equipment and medium.

In order to enable those skilled in the art to better understand the solution of the present invention, with reference to the accompanying drawings and detailed description The present invention is described in further detail.

Implement benefit one

Fig. 1 is a kind of flow chart of chip detecting method provided in an embodiment of the present invention.Referring to FIG. 1, chip testing side The specific steps of method include:

Step S10: corresponding data generating function is arranged to test input each in chip to be measured and executes parameter.

It should be noted that the chip to be measured in this step can be specially that FPGA, CPLD etc. support front end logic exploitation And the chip of back-end circuit exploitation.Each test input refers to the end of chip to be measured in the operating condition for receiving data Mouthful, since chip to be measured is under different operative scenarios, port received data content is often different, therefore will be to The port of chip for receiving data is surveyed as test input, and input to test according to the operative scenario simulated when testing End, which is passed to corresponding data, can be realized that working condition is learned under the operative scenario to chip to be measured, and then realize to be measured The purpose that chip is tested.Since each test input of chip to be measured often has certain want to received data Ask, such as value range requirement, the types entail of data and the data length of data are required etc., therefore the number in this step According to generating function, the data for being the requirement according to its corresponding test input to data and writing in advance generate logic, mesh Be to generate logic according to data to carry out a series of data conversion to parameter is executed so that meet should for the test data arrived Constraint condition of the test input to data.

Step S11: it is based respectively on each execution parameter and executes corresponding data generating function, it is corresponding to generate each test input Test data.

The purpose of this step is to calculate respectively test data corresponding to each test input, specific to calculate Process is to generate each input terminal using test data as the input parameter of data generating function to execute data generating function Corresponding test data.It should be noted that data generating function in this method is merely to each survey to chip to be measured It tries input terminal and corresponding test data is provided, chip each test input under a certain operative scenario to be measured is simulated with this equivalence The data content that should be inputted, but since the operative scenario of chip to be measured is large number of, under each operative scenario, chip to be measured The quantity of each input terminal to be measured often differ greatly, therefore the number that same test input terminal is corresponding under different operating scene Also different according to generating function, the particular content of data generating function should be according to the operative scenario and actual survey simulated Depending on examination demand, it is not limited here.

Step S12: being passed to corresponding test input for each test data, to test chip to be measured.

This step is that each test data has been input to correspondence after the corresponding Test data generation of each test input Test input, the test under corresponding test scene to chip to be measured is realized with this.

Chip detecting method provided by the present invention is first respectively set pair each test input in chip to be measured The data generating function and execution parameter answered, and then be based respectively on the corresponding execution parameter of each test input and execute and be somebody's turn to do The corresponding data generating function of parameter is executed, the test data of each test input is generated with this, and test data is passed to phase The test input answered achievees the purpose that test chip to simulate work of the chip to be measured under certain scene.This method is for core Each test input of piece is provided with corresponding data generating function and executes parameter, and then in test, each survey The test data of examination input terminal is individually generated by the corresponding data generating function of the test input, therefore this method can be In test process, by modifying the data generating function of certain test input or executing parameter to realize the test to the input terminal The orientations of data is modified, and ensures that the test data of other input terminals is constant, so ensure that chip testing flexibility and It is comprehensive.

Embodiment two

On the basis of the above embodiments, the present invention also provides a series of preferred embodiments.

As a preferred embodiment, this method further comprises after testing chip to be measured:

When the target detection input terminal working condition exception in test input, target detection input terminal is chosen, and only It modifies to the corresponding data generating function of target detection input terminal and/or execution parameter.

It should be noted that present embodiment is to illustrate the target when the working condition exception of target detection input terminal Test input can not normally be handled its corresponding test data, it is therefore desirable to be carried out to target detection input terminal abnormal Exclude, this step be after test data is passed to corresponding test input, according to test there are the tests of abnormality Input terminal chooses corresponding target detection input terminal, carries out the data generating function corresponding to it and/or executes the modification of parameter, The purpose of its essence is the modification realized for the corresponding test data of target detection input terminal.User can be according to practical need It asks and only modifies data generating function or execute parameter, can also make an amendment to data generating function and execution parameter simultaneously, It is not limited here.This step focuses on when the target detection input terminal working condition exception in test input, only Choose target detection input terminal, and then targetedly the data generating function to selected target detection input terminal and/or It executes parameter to modify, the test data for flexibly modifying target detection input terminal is achieved the purpose that with this.

As a preferred embodiment, corresponding data generating function is arranged to test input each in chip to be measured And execute parameter specifically:

Corresponding random number generation function and random seed are arranged to test input each in chip to be measured;

Correspondingly, being based respectively on each execution parameter executes corresponding data generating function, it is corresponding to generate each test input Test data specifically:

It is based respectively on each random seed and executes corresponding random number generation function, generate the corresponding test of each test input Data.

It should be noted that data generating function is specially random number generation function in present embodiment, parameter tool is executed Body is random seed, so the generation of test data be by using random seed as the execution parameter of random number generation function, The generation of test data is carried out by random number generation function with this.The purpose of core of present embodiment, is produced based on random seed Raw corresponding random number and the test data as test input, since the test data generated by random fashion is certain Value range is interior to have diversity, therefore can improve the uncertainty of test data when testing relatively, and then improve relatively That tests is comprehensive.In addition, it is necessary to which, it is emphasized that in the present embodiment, each random number generation function is according to machine When son generates random test data, still can the generation process to test data constrained accordingly, ensure to give birth to this At test data can satisfy requirement of the corresponding test input for be passed to data.In addition, each in present embodiment The corresponding random seed of test input can be identical random seed, can also be different, it is not limited here.

On the basis of the above embodiment, as a preferred embodiment, each test input in chip to be measured Corresponding random seed is different.

Since the process that currently employed random seed generates random number belongs to " pseudorandom " in itself, that is to say, that random Number generate one by one to a certain degree when, existing random number can be generated one by one again in the form integrally recycled, and core to be measured Test input in piece is large number of, therefore has a degree of repetition probability.It is to be measured by ensuring in present embodiment The corresponding random seed of each test input is different in chip, so that it is guaranteed that the test data of each test input can The comprehensive and reliability for utmostly avoiding repeating, and then ensuring to test.

It, can be by the random seed of each test input during single is tested in the form of test group based on present embodiment Be recorded in preset configuration file jointly, and each random seed all has corresponding ID mark, with by ID mark and Test input establishes corresponding relationship, can be identified according to ID each random seed being used for phase when reading configuration file with this Answer the Test data generation of test input.

On the basis of the above embodiment, as a preferred embodiment, random seed is specially system time.

Present embodiment is using system time as random seed, due to the system time that obtains each time often not phase Together, therefore using system time as random seed it can ensure that repeatability is lower between each random seed, and be not necessarily to user The artificial deduction for carrying out random seed, it is ensured that improve to the setting efficiency of random seed, and then relatively for chip to be measured Integrated testability efficiency.

On the basis of a series of above-mentioned embodiments, as a preferred embodiment, data generating function is specific It is write based on Verilog HDL.

Using the great advantage that verilog HDL carries out chip circuit design to be measured be by logical design and chip technology without The details such as the concrete model closed, therefore can not consider when carrying out circuit design chip to be measured, it is only necessary to according to specific need It asks and applies different constraint condition, that is, can be designed the circuit with respective logic function.Therefore present embodiment passes through Verilog HDL writes the data generating function of chip to be measured, opposite can reduce complexity whole in compiling procedure, into And opposite improve writes efficiency to data generating function.

Embodiment three

Hereinbefore the embodiment of chip detecting method is described in detail, the present invention also provides one kind and is somebody's turn to do The corresponding apparatus for testing chip of method, since the embodiment of device part is corresponded to each other with the embodiment of method part, dress Set part embodiment refer to method part embodiment description, wouldn't repeat here.

Fig. 2 is a kind of structure chart of apparatus for testing chip provided in an embodiment of the present invention.Core provided in an embodiment of the present invention Built-in testing device, comprising:

Setup module 10, for corresponding data generating function to be arranged to test input each in chip to be measured and executes ginseng Number.

Data generation module 11 executes corresponding data generating function for being based respectively on each execution parameter, generates each survey Try the corresponding test data of input terminal.

Incoming test module 12, for each test data to be passed to corresponding test input, to be carried out to chip to be measured Test.

Apparatus for testing chip provided by the present invention is first respectively set pair each test input in chip to be measured The data generating function and execution parameter answered, and then be based respectively on the corresponding execution parameter of each test input and execute and be somebody's turn to do The corresponding data generating function of parameter is executed, the test data of each test input is generated with this, and test data is passed to phase The test input answered achievees the purpose that test chip to simulate work of the chip to be measured under certain scene.The present apparatus is for core Each test input of piece is provided with corresponding data generating function and executes parameter, and then in test, each survey The test data of examination input terminal is individually generated by the corresponding data generating function of the test input, therefore the present apparatus can be In test process, by modifying the data generating function of certain test input or executing parameter to realize the test to the input terminal The orientations of data is modified, and ensures that the test data of other input terminals is constant, so ensure that chip testing flexibility and It is comprehensive.

Example IV

The present invention also provides a kind of chip testing devices, comprising:

Memory, for storing computer program;

Processor is realized when for executing computer program such as the step of above-mentioned chip detecting method.

Chip testing devices provided by the present invention are first respectively set pair each test input in chip to be measured The data generating function and execution parameter answered, and then be based respectively on the corresponding execution parameter of each test input and execute and be somebody's turn to do The corresponding data generating function of parameter is executed, the test data of each test input is generated with this, and test data is passed to phase The test input answered achievees the purpose that test chip to simulate work of the chip to be measured under certain scene.This equipment is for core Each test input of piece is provided with corresponding data generating function and executes parameter, and then in test, each survey The test data of examination input terminal is individually generated by the corresponding data generating function of the test input, therefore this equipment can be In test process, by modifying the data generating function of certain test input or executing parameter to realize the test to the input terminal The orientations of data is modified, and ensures that the test data of other input terminals is constant, so ensure that chip testing flexibility and It is comprehensive.

In addition, being stored with meter on computer readable storage medium the present invention also provides a kind of computer readable storage medium Calculation machine program is realized when computer program is executed by processor such as the step of above-mentioned chip detecting method.

Computer readable storage medium provided by the present invention first distinguishes each test input in chip to be measured Corresponding data generating function is set and executes parameter, and then is based respectively on the corresponding execution parameter of each test input and holds Corresponding with the execution parameter data generating function of row, generates the test data of each test input with this, and by test data Corresponding test input is passed to simulate work of the chip to be measured under certain scene, achievees the purpose that test chip.This calculating Machine readable storage medium storing program for executing when being executed for each test input of chip be provided with corresponding data generating function and Parameter is executed, and then in test, the test data of each test input is generated by the corresponding data of the test input Function individually generates, therefore this computer readable storage medium can during the test, by modifying certain test input Data generating function executes parameter to realize the orientation modification to the test data of the input terminal, and ensures other input terminals Test data is constant, and then ensure that the flexibility of chip testing and comprehensive.

A kind of chip detecting method provided by the present invention, device, equipment and medium are described in detail above.It says Each embodiment is described in a progressive manner in bright book, and the highlights of each of the examples are the differences with other embodiments Place, the same or similar parts in each embodiment may refer to each other.For device, equipment disclosed in embodiment and medium Speech, since it is corresponded to the methods disclosed in the examples, so being described relatively simple, related place is referring to method part illustration ?.It should be pointed out that for those skilled in the art, without departing from the principle of the present invention, also Can be with several improvements and modifications are made to the present invention, these improvement and modification also fall into the protection scope of the claims in the present invention It is interior.

It should also be noted that, in the present specification, relational terms such as first and second and the like be used merely to by One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning Covering non-exclusive inclusion, so that the process, method, article or equipment for including a series of elements not only includes that A little elements, but also including other elements that are not explicitly listed, or further include for this process, method, article or The intrinsic element of equipment.In the absence of more restrictions, the element limited by sentence "including a ...", is not arranged Except there is also other identical elements in the process, method, article or apparatus that includes the element.

Claims (9)

1. a kind of chip detecting method characterized by comprising
Corresponding data generating function is arranged to test input each in chip to be measured and executes parameter;
It is based respectively on each execution parameter and executes the corresponding data generating function, it is corresponding to generate each test input Test data;
By the incoming corresponding test input of each test data, to test the chip to be measured.
2. the method according to claim 1, wherein it is described the chip to be measured is tested after, the party Method further comprises:
When the target detection input terminal working condition exception in the test input, the target detection input terminal is chosen, And only the data generating function corresponding to the target detection input terminal and/or execution parameter are modified.
3. the method according to claim 1, wherein described test input each in chip to be measured is arranged corresponds to Data generating function and execute parameter specifically:
Corresponding random number generation function and random seed are arranged to the test input each in the chip to be measured;
Correspondingly, described be based respectively on each corresponding data generating function of execution parameter execution, each survey is generated Try the corresponding test data of input terminal specifically:
It is based respectively on each random seed and executes the corresponding random number generation function, generate each test input pair The test data answered.
4. according to the method described in claim 3, it is characterized in that, each test input is corresponding in the chip to be measured The random seed is different.
5. according to the method described in claim 4, it is characterized in that, the random seed is specially system time.
6. method described in -5 any one according to claim 1, which is characterized in that the data generating function is specifically based on Verilog HDL writes.
7. a kind of apparatus for testing chip characterized by comprising
Setup module, for corresponding data generating function to be arranged to test input each in chip to be measured and executes parameter;
Data generation module executes the corresponding data generating function for being based respectively on each execution parameter, generates each The corresponding test data of the test input;
Incoming test module, for each test data to be passed to the corresponding test input, to the core to be measured Piece is tested.
8. a kind of chip testing devices characterized by comprising
Memory, for storing computer program;
Processor realizes such as chip detecting method as claimed in any one of claims 1 to 6 when for executing the computer program The step of.
9. a kind of computer readable storage medium, which is characterized in that be stored with computer on the computer readable storage medium Program is realized when the computer program is executed by processor such as chip detecting method as claimed in any one of claims 1 to 6 Step.
CN201811307906.2A 2018-11-05 2018-11-05 A kind of chip detecting method, device, equipment and medium CN109270439A (en)

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CN104007683A (en) * 2013-02-27 2014-08-27 鸿富锦精密工业(深圳)有限公司 Debugging circuit and mainboard provide with the debugging circuit
CN104297619A (en) * 2014-10-13 2015-01-21 上海移为通信技术有限公司 Testing device for chip input and output pin
CN105067993A (en) * 2015-07-02 2015-11-18 大唐微电子技术有限公司 Detachable testing method for SOC (system on chip) chip
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Publication number Priority date Publication date Assignee Title
CN101038325A (en) * 2007-02-14 2007-09-19 北京中星微电子有限公司 Method and device for testing chip
CN102109572A (en) * 2009-12-23 2011-06-29 中兴通讯股份有限公司 Method for testing and method for testing and controlling transmission chip
CN102902834A (en) * 2011-07-29 2013-01-30 炬力集成电路设计有限公司 Verification method and verification system of SOC (System on Chip)
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