Summary of the invention
In order to solve the problems of existing compensation type ac voltage stabilizer, the present invention provides a kind of friendships of auto compensating type
Flow voltage-stabilizing controller, including compensation control unit, trigger unit, error detection control unit.Compensate control unit output three-phase triggering
Signal is controlled to trigger unit and error detection control unit;Trigger unit inputs three-phase Trig control signal, issues three-phase triggering letter
Number;The three-phase Trig control signal of error detection control unit judgement input is correct or mistake, controls the protection control letter of output
It number is invalid or effective.
When the three-phase Trig control signal mistake of error detection control unit judgement input, the work electricity of trigger unit is cut off
Source, trigger unit stop issuing three-phase trigger signal, that is, stop the trigger pulse for issuing three-phase thyristor;When error detection control unit
When judging that the Trig control signal of input is correct, the working power of trigger unit, triggering control of the trigger unit according to input are opened
Signal processed issues three-phase trigger signal, i.e., normally issues the trigger pulse of three-phase thyristor.
It includes the compensation control for sampling comparison circuit, delay protection circuit, interlocking control circuit that control unit, which is compensated, by three
Circuit composition processed, the identical compensation control circuit of three structures carry out voltage sample to the AC power source phase voltage of three-phase respectively,
Export corresponding three-phase Trig control signal.The sampling comparison circuit function of each phase is identical as structure, delay protection circuit function
Can be identical as structure, interlocking control circuit function is identical as structure.
In each phase, sampling comparison circuit carries out voltage sample, output and multiple voltage class to AC power source phase voltage
The corresponding voltage class encoded radio in section;Delay protection circuit input voltage grade encoded radio, the voltage class after output delay
Encoded radio and not trigger region control signal;Voltage class encoded radio and not trigger region control after interlocking control circuit input delay
Signal exports Trig control signal.
In each phase, the fluctuation of AC power source phase voltage makes voltage class encoded radio change, and results in the need for changing brilliant lock
In pipe switching group when the on-off assembled state of thyristor, between its successive 2 kinds different on-off assembled states, maintenance one is not
Trigger region time, all thyristors in cutoff thyristor bridge;Maintain one not the trigger region time by not trigger region control signal
It realizes.In each phase, trigger region control signal does not export a pulse after voltage class encoded radio changes for control;No
Trigger region control signal is effective during exporting pulse, invalid during non-output pulse.Further, the pulse
Spaced time chosen in 10ms between 30ms.
In each phase, the voltage class coding value signal change moment of delay protection circuit delay is later than voltage class coding
Value change after not in trigger region control signal pulse the forward position moment, and after changing earlier than voltage class encoded radio
Not trigger region control signal in pulse it is rear along the moment.
In each phase, by delay detection module and not, trigger region control signal generator module forms delay protection circuit;Prolong
When detection module in include M identical delay detection circuits, each delay detection circuit is postponed to obtain to input signal
Output signal after delay, while Edge check is carried out to input signal, export Edge check signal;M delay detection circuit
Signal delay is carried out to M voltage class encoded radios respectively, the position the M voltage class encoded radio after being postponed, and to M electricity
It presses grade encoded radio to carry out Edge check, obtains M Edge check signal;Trigger region does not control signal generator module for input
M Edge check signal is converted to not trigger region control signal output.
In M identical delay detection circuits of each phase, each delay detection circuit includes resistance RY3, capacitor
CY3, phase inverter FY5, phase inverter FY6, NAND gate FY7 or door FY8, NAND gate FY9;Phase inverter FY5 input terminal is connected to input
Signal end;One end of resistance RY3 is connected to phase inverter FY5 output end, other end be respectively connected to capacitor CY3 one end, with
The input terminal of an input terminal of an input terminal of NOT gate FY7 or door FY8, phase inverter FY6;The other end of capacitor CY3 connects
It is connected to ground terminal, another input terminal of NAND gate FY7 is connected to input signal end or another input terminal of door FY8 connects
It is connected to input signal end;2 input terminals of NAND gate FY9 are respectively connected to NAND gate FY7 output end or door FY8 output end;Instead
Phase device FY6 output end is the output signal end after delay;NAND gate FY9 output end is Edge check signal output end.
Either, in M identical delay detection circuits of each phase, each delay detection circuit includes resistance RY0, electricity
Hinder RY1, resistance RY2, capacitor CY0, capacitor CY1, capacitor CY2, diode DY1, diode DY2, driving gate FY0, phase inverter
FY1, phase inverter FY2, phase inverter FY3, NAND gate FY4;Resistance RY0 be connected to input signal end and driving gate FY0 input terminal it
Between, capacitor CY0 is connected between driving gate FY0 input terminal and ground terminal, and driving gate FY0 output end is the output signal after delay
End;Capacitor CY1 is connected between input signal end and phase inverter FY1 input terminal, and resistance RY1 is connected to phase inverter FY1 input terminal
Between ground terminal, diode DY1 cathode is connected to phase inverter FY1 input terminal, anode is connected to ground terminal;Phase inverter FY2 input connects
It is connected to input signal end;Capacitor CY2 is connected between phase inverter FY2 output end and phase inverter FY3 input terminal, resistance RY2 connection
Between phase inverter FY3 input terminal and ground terminal, diode DY2 cathode is connected to phase inverter FY3 input terminal, anode is connected to the ground
End;2 input terminals of NAND gate FY4 are respectively connected to phase inverter FY1 output end, phase inverter FY3 output end;NAND gate FY4's
Output end is Edge check signal output end.
Either, in M identical delay detection circuits of each phase, each delay detection circuit includes resistance RY1, electricity
Hinder RY2, capacitor CY1, capacitor CY2, diode DY1, diode DY2, phase inverter FY1, phase inverter FY2, phase inverter FY3, reverse phase
Device FY11, phase inverter FY12, phase inverter FY13, phase inverter FY14, NAND gate FY4;Phase inverter FY11 input terminal is connected to input
Signal end, phase inverter FY12 input terminal are connected to phase inverter FY11 output end, and phase inverter FY13 input terminal is connected to phase inverter
FY12 output end, phase inverter FY14 input terminal are connected to phase inverter FY13 output end, and phase inverter FY14 output end is after postponing
Output signal end;Capacitor CY1 is connected between input signal end and phase inverter FY1 input terminal, and resistance RY1 is connected to phase inverter
Between FY1 input terminal and ground terminal, diode DY1 cathode is connected to phase inverter FY1 input terminal, anode is connected to ground terminal;Phase inverter
FY2 input is connected to input signal end;Capacitor CY2 is connected between phase inverter FY2 output end and phase inverter FY3 input terminal, electricity
Resistance RY2 is connected between phase inverter FY3 input terminal and ground terminal, and diode DY2 cathode is connected to phase inverter FY3 input terminal, anode
It is connected to ground terminal;2 input terminals of NAND gate FY4 are respectively connected to phase inverter FY1 output end, phase inverter FY3 output end;With it is non-
Door FY4 output end is Edge check signal output end.
In each phase, trigger region control signal generator module is not with M input signal end or door FY10;Or door
The M input signal end of FY10 is respectively connected to the Edge check signal output end in M delay detection circuit;Or door FY10
Trigger region does not control signal for output end output.
In each phase, by the voltage of AC power source phase voltage waving interval range be divided into M+1 voltage class section come into
Row compensation control;By the multiple output voltages of on-off assembled state control selections auto-transformer of thyristor in thyristor switch group
In 01 or multiple voltage superpositions realize and voltage as the magnet exciting coil voltage of compensator transformer
The corresponding voltage compensation state of grade interval;The corresponding voltage compensation shape in each voltage class section of AC power source phase voltage
State;The on-off assembled state of thyristor issues trigger pulse control by trigger unit by Trig control signal in thyristor switch group
System.
In each phase, voltage class encoded radio is shared and the one-to-one M+1 efficient coding in M+1 voltage class section
Value, the corresponding compensation work state in each voltage class section;Effective Trig control signal of interlocking control circuit output
Shared M+2 group;In effective Trig control signal of the M+2 group, M+1 group for realizing AC power source phase voltage compensation control
System, 1 group for turning off its all thyristor controlled;The M is the integer more than or equal to 1.
In each phase, when trigger region control signal is not effective, interlocking control circuit exports 1 group of effective Trig control signal,
Turn off all thyristors controlled;Trigger region control invalidating signal and voltage class encoded radio are not M+1 efficient coding value
In 1 when, 1 group in the corresponding output effective Trig control signal of M+1 group of interlocking control circuit, realize to AC power source mutually electricity
The compensation of pressure controls;Trigger region control invalidating signal and voltage class encoded radio be invalid code value when, interlocking control circuit
Export 1 group of invalid Trig control signal.
It is the three of input that the three-phase Trig control signal of error detection control unit judgement input, which is correct or wrong foundation,
In phase Trig control signal, when the Trig control signal of every phase is 1 group in the effective Trig control signal of this phase M+2 group, three
Phase Trig control signal is correct, otherwise mistake.
The auto compensating type AC voltage-stabilizing controller is for compensating control to auto compensating type three-phase main circuit;Institute
Stating auto compensating type three-phase main circuit is three-phase four-line system, and the AC power source phase voltage of every phase uses identical compensation circuit
It realizes and compensates with compensation way;Every phase main circuit includes compensator transformer, auto-transformer, thyristor switch group.Every phase master
Circuit by thyristor in this phase thyristor switch group the multiple outputs of on-off assembled state control selections this phase auto-transformer
One or more voltage superposition in voltage is realized and multiple voltages as the magnet exciting coil voltage of this phase compensator transformer
The corresponding multiple compensation work states of grade interval.The on-off assembled state of thyristor is by respectively touching in each phase thyristor switch group
Hair control signal is controlled by the trigger pulse that trigger unit issues.
Auto compensating type three-phase main circuit trigger signal of the input from the auto compensating type AC voltage-stabilizing controller and
Protection control signal;When the protection of input control signal is effective, control three-phase thyristor switching group is in guard mode, specifically
Method is that the input side supply voltage that control disconnects all auto-transformers in auto compensating type three-phase main circuit comes to three-phase crystalline substance
Thyristor switch group is protected;When the protection of input controls invalidating signal, it is automatically stopped the protection of three-phase thyristor switching group
State.
Thyristor in three-phase thyristor switching group is bidirectional thyristor or 2 unidirectional thyristor reverse parallel connection shapes
At thyristor alternating-current switch.
The beneficial effects of the present invention are: the auto compensating type AC voltage-stabilizing controller includes compensation transformation for every phase
Device, auto-transformer, thyristor switch group auto compensating type three-phase main circuit when compensating control, the trigger pulse of output
Ipsilateral thyristor does not simultaneously turn in it ensure that each phase thyristor switch group, that is, while realizing thyristor mutual lock control,
It also breaks down to the sampling comparison circuit that is likely to occur and outputs invalid code value and logic occurs in interlocking control circuit
Mistake and the case where output invalid Trig control signal, stops issuing thyristor triggering impulse and the protection control by making to issue
Signal processed is effective, and auto compensating type three-phase main circuit disconnects the primary side power supply of auto-transformer, carries out thyristor switch group
Protection effectively strengthens the protection that the compensation three-phase AC voltage stabilizer is directed to course of work exception.Not using single
The switching switching of the program mode (PM) control thyristor of piece machine, PLC etc., avoids pressure stabilizing caused by the problems such as program runs fast, crashes
Device failure.Above-mentioned function keeps the work of the compensation three-phase AC voltage stabilizer more stable, reliable.
Specific embodiment
Below in conjunction with attached drawing, the invention will be further described.
Fig. 1 is the three-phase alternating current pressure stabilizing that auto compensating type AC voltage-stabilizing controller and auto compensating type three-phase main circuit form
Device system block diagram, auto compensating type AC voltage-stabilizing controller include compensation control unit, trigger unit and error detection control unit.It mends
Trig control signal P5A, P5B, P5C of control unit output A, B, C three-phase are repaid to trigger unit and error detection control unit;Triggering
Unit issues three-phase trigger signal P6 to auto compensating type three-phase according to three-phase Trig control signal P5A, P5B, P5C of input
Main circuit;Error detection control unit judges whether Trig control signal P5A, P5B, P5C of input are effective Trig control signal,
And the working power according to judging result control trigger unit, and whether the protection control signal for controlling sending is effective.
The trigger signal that auto compensating type three-phase main circuit reception self coupling compensating-type AC voltage stabilization controller issues, control A,
B, in C three-phase main circuit thyristor switch group thyristor on-off;Auto compensating type three-phase main circuit receives auto compensating type and hands over
The protection that stream voltage-stabilizing controller issues controls signal and judges whether it is effective, controls whether according to judging result to the main electricity of three-phase
Three-phase thyristor switching group in road is protected.
Compensation control unit is made of the compensation control circuit of A, B, C three-phase, and Fig. 2 is the composition of A phase compensation control circuit
Block diagram, sampling comparison circuit carry out voltage sample, output voltage grade encoded radio P2A to A phase AC power source phase voltage;Delay is protected
Protection circuit input voltage grade encoded radio P2A, exports the voltage class encoded radio P3A after postponing and trigger region does not control signal
P4A;Voltage class encoded radio P3A after interlocking control circuit input delay and not trigger region control signal P4A, output A phase
Trig control signal P5A.B phase, the structure of the compensation control circuit of C phase, function, control logic are identical as A phase, respectively to B phase
AC power source phase voltage, C phase AC power source phase voltage carry out voltage sample and control, export Trig control signal P5B, P5C.
Fig. 3 is the A phase main circuit in auto compensating type three-phase main circuit embodiment 1, including compensator transformer TB1 and self coupling
Transformer TB2,6 bidirectional thyristor SR1-SR6 collectively constitute A phase thyristor switch group, and fuse FU1 and relay normally open are opened
It closes KA-1, relay normally closed switch KA-2 composition A phase relay and protects circuit.
In Fig. 3, the bucking coil of compensator transformer TB1 is connected in A phase phase line, and phase line input terminal is LA1, and output end is
LA2.Voltage on TB1 magnet exciting coil is controlled by A phase thyristor switch group.Auto-transformer TB2 have 3 output tap C1, C2,
One end of TB1 magnet exciting coil is connected to after one end of C3, bidirectional thyristor SR1, SR3, SR5 are in parallel, SR1, SR3, SR5 are in addition
One end is respectively connected to tap C1, C2, C3;TB1 magnet exciting coil is connected to after one end of bidirectional thyristor SR2, SR4, SR6 are in parallel
Other end, the other end of SR2, SR4, SR6 is then respectively connected to tap C1, C2, C3.If auto-transformer TB2 tap
Output voltage U12 between C1, C2 is different from the output voltage U23 between C2, C3, then thyristor switch group is up to forward direction U12, just
To U23, forward direction U12+U23, reversed U12, reversed U23, reversed U12+U23 totally 6 kinds of magnet exciting coil voltage compensation working conditions, outside
Add a kind of input voltage within normal range (NR) when 0 voltage compensation working condition, the exchange of A phase phase line input terminal LA1 input
Power supply phase voltage can at most be divided into 7 voltage ranges and compensate control.In Fig. 3, N is zero curve, G11, G12 to G61,
G62 is respectively the trigger signal input terminal of bidirectional thyristor SR1 to SR6.In Fig. 3, bidirectional thyristor SR1, SR3, SR5 composition are same
Side thyristor, bidirectional thyristor SR2, SR4, SR6 form another ipsilateral thyristor;It, cannot in ipsilateral thyristor to avoid short circuit
There are 2 and 2 or more thyristors to simultaneously turn on simultaneously;For example, SR1, SR3 cannot be simultaneously turned on, SR4, SR6 cannot be led simultaneously
Lead to, etc..
Fig. 4 is the A phase main circuit in auto compensating type three-phase main circuit embodiment 2, including compensator transformer TB1 and self coupling
Transformer TB2,8 bidirectional thyristor SR1-SR8 collectively constitute A phase thyristor switch group, and fuse FU1 and relay normally open are opened
It closes KA-1, relay normally closed switch KA-2 composition A phase relay and protects circuit.
In Fig. 4, the bucking coil of compensator transformer TB1 is connected in A phase phase line, and phase line input terminal is LA1, and output end is
LA2.Voltage on TB1 magnet exciting coil is controlled by thyristor switch group.Auto-transformer TB2 have 4 output tap C1, C2, C3,
Be connected to one end of TB1 magnet exciting coil after one end of C4, bidirectional thyristor SR1, SR3, SR5, SR7 is in parallel, SR1, SR3, SR5,
The other end of SR7 is respectively connected to tap C1, C2, C3, C4;After one end of bidirectional thyristor SR2, SR4, SR6, SR8 are in parallel
Be connected to the other end of TB1 magnet exciting coil, the other end of SR2, SR4, SR6, SR8 be then respectively connected to tap C1, C2,
C3,C4.If the output voltage U12 between auto-transformer TB2 tap C1, C2, the output voltage U23 between C2, C3, between C3, C4
Output voltage U34 is respectively different, then thyristor switch group includes forward direction U12, forward direction U23, forward direction U34, forward direction U12+U23, just
To U23+U34, forward direction U12+U23+U34, reversed U12, reversed U23, reversed U34, reversed U12+U23, reversed U23+U34, anti-
To U12+U23+U34 totally 12 kinds of magnet exciting coil voltage compensation working conditions, when a kind of additional input voltage is within normal range (NR)
0 voltage compensation working condition, phase line input terminal LA1 input A phase AC power source phase voltage can be divided into most 13 electricity
Control is compensated between pressure area.In Fig. 4, N is zero curve, and G11, G12 to G81, G82 are respectively the touching of bidirectional thyristor SR1 to SR8
Signalling input terminal.In Fig. 4, the ipsilateral thyristor of bidirectional thyristor SR1, SR3, SR5, SR7 composition, bidirectional thyristor SR2, SR4,
SR6, SR8 form another ipsilateral thyristor;To avoid short circuit, there cannot be 2 and 2 or more brilliant locks in ipsilateral thyristor simultaneously
Pipe simultaneously turns on;For example, SR1, SR7 cannot be simultaneously turned on, and SR4, SR8 cannot be simultaneously turned on, etc..
Each bidirectional thyristor in Fig. 3, Fig. 4 can be substituted with the unidirectional thyristor of 2 reverse parallel connections.Fig. 3, Fig. 4
In, relay normally open switch and relay normally closed switch composition relay protection switch.
Auto compensating type three-phase main circuit is three-phase four-line system, and the main circuit of A, B, C three-phase uses identical circuit
Structure and form respectively compensate the phase voltage of A, B, C phase, i.e., B, C two-phase use with A phase main circuit identical circuit knot
Structure and compensation way respectively compensate the phase voltage of B, C phase.
Sampling comparison circuit includes AC power source phase voltage sample circuit and comparison circuit.Fig. 5 is A phase compensation control circuit
Middle sampling comparison circuit embodiment 1 compensates control for auto compensating type three-phase main circuit embodiment 1.The alternating current of Fig. 5
In the phase voltage sample circuit of source, the A phase AC power source phase voltage inputted from A phase phase line L1A and zero curve N is depressured through transformer TV
Afterwards, after the rectifier bridge rectification being made of diode DV1-DV4, then divide through capacitor CV1 filtering and resistance RV1, RV2, obtain with
The A phase AC power source phase voltage sampled value U1 of the A phase AC power source phase voltage virtual value direct proportionality of input.
In the comparison circuit of Fig. 5, resistance RF1-RF7 forms bleeder circuit, after power supply+VCC1 partial pressure, obtains 6 threshold values
Voltage UF1-UF6.6 comparator FA1-FA6 realize A phase AC power source phase voltage sampled value U1 and 6 threshold voltage UF1-UF6
Comparison, the A phase voltage grade encoded radio P2A of output is made of the output Y11-Y16 of 6 comparator FA1-FA6, is 6 two
The voltage of A phase AC power source phase voltage waving interval range is divided into 7 voltage class sections by scale coding.Amplifier FA0 composition
Follower, A phase AC power source phase voltage sampled value U1 are sent same to comparator FA1-FA6 simultaneously after follower FA0 driving
Phase input terminal;6 threshold voltage UF1-UF6 are sent respectively to the inverting input terminal of comparator FA1-FA6.In Fig. 5, it can also use
Other precision voltage sources replace power supply+VCC1, and bleeder circuit divides precision voltage source, so that threshold voltage is more smart
Really.The rail-to-rail amplifier that amplifier FA0 and comparator FA1-FA6 is preferably powered using single supply+VCC1, for example, LMV324,
LMV358, AD8517, TLV2432, TLV2434 etc..
If the A phase AC power source phase voltage fluctuation range of input is 220V ± 10%, it is desirable that stablized in 220V ± 2%
In the range of export.Comparison circuit embodiment 1 is sampled using Fig. 5, input can be divided into 242V to the voltage between 198V
Section voltage swing is 7 voltage class sections of 6.4V, and the voltage in 3 voltage class sections therein is higher than desired output
Voltage range needs to carry out drop compensation;The voltage in 3 voltage class sections lower than require output voltage range, need into
Row boosting compensation;1 voltage class section carries out 0 voltage compensation, i.e. uncompensation within desired output voltage range.
The voltage range of 6.4V is not more than 220V ± 1.5%, meets requirement of the output control within 220V ± 2%;7 electricity of 6.4V
Pressing the corresponding AC supply voltage waving interval of grade interval is 242.4V to 197.6V, covers the range actually fluctuated.It adopts
It is compensated with the A phase main circuit in the compensation main circuit embodiment 1 of Fig. 3, and the output voltage U12 of auto-transformer TB2 is low,
U23 high;Voltage U23 is 2 times of voltage U12;Then the input voltage of auto-transformer TB2 is alternating current 220V, only uses output voltage
When U12 does the magnet exciting coil voltage of TB1, TB1 offset voltage is 6.4V;The input voltage of auto-transformer TB2 is alternating current 220V,
When only making the magnet exciting coil voltage of TB1 of output voltage U23, TB1 offset voltage is 12.8V;The input electricity of auto-transformer TB2
Pressure is alternating current 220V, while when doing using output voltage U12, U23 the magnet exciting coil voltage of TB1, TB1 offset voltage is 19.2V.
Ratio between the selection and A phase AC power source phase voltage sampled value U1 and A phase AC power source phase voltage of threshold voltage UF1-UF6
It is related;If the ratio between A phase AC power source phase voltage sampled value U1 and A phase AC power source phase voltage is 0.01, i.e. A phase exchanges
Power supply phase voltage sampled value U1 is the 1% of A phase AC power source phase voltage virtual value, then A phase AC power source phase voltage is divided into area
Between voltage swing be 6.4V 7 voltage class sections 6 threshold voltage UF1-UF6 be respectively 2.36V, 2.296V,
2.232V, 2.168V, 2.104V, 2.04V are corresponding with the AC power source phase voltage value in 7 voltage class sections is separated
The intermediate dividing voltage value of 6 of phase voltage sampled value;According to the size of 6 threshold voltage UF1-UF6 and+VCC1, can calculate
The size of resistance RF1-RF7 out.
In Fig. 5, resistance R11, resistance R12 and comparator FA1 form Schmidt's comparator, reasonably select resistance R11, resistance
The resistance value of R12 can control the size of hysteresis voltage range, avoid A phase AC power source phase voltage in the more critical of comparator
When point fluctuation nearby, the frequent switching of electric thyristor sub switch in A phase thyristor switch group is caused.Resistance R21, resistance R22 are extremely
Resistance R61, the effect of resistance R62 are identical, form Schmidt's comparator with comparator FA2 to comparator FA6 respectively.Due to self coupling
The compensation way of compensation three-phase main circuit has Schmidt's characteristic automatically, and comparator FA1 to comparator FA6 can not also be formed
Schmidt's comparator, at this point, resistance R12 to resistance R62 without using with connection, resistance R11 to resistance R61 then retains either
Respectively short circuit connection.
The sampling comparison circuit embodiment 1 of Fig. 5 can also be compensated for auto compensating type three-phase main circuit embodiment 2
Control, at this time, it may be necessary to which the voltage of the AC power source phase voltage waving interval range of each phase is divided into more voltage class sections.
For example, the circuit of Fig. 5 is answered when the voltage of A phase AC power source phase voltage waving interval range is divided into 13 voltage class sections
This extends to 12 comparators, is compared with 12 threshold voltages of different sizes, the A phase voltage grade encoded radio of output
P2A will be by 12, for example, Y11-Y112 is formed.
The A phase of Fig. 5 samples comparison circuit embodiment 1 either for going back to auto compensating type three-phase main circuit embodiment 1
It is that control is compensated to auto compensating type three-phase main circuit embodiment 2, B phase, C phase are all made of identical with A phase structure, function
Sample comparison circuit;A, the threshold voltage in B, C three-phase sampling comparison circuit, can be provided by the same bleeder circuit, can also
To be provided by respective bleeder circuit.
Fig. 6 is that comparison circuit embodiment 2 is sampled in A phase compensation control circuit, real for auto compensating type three-phase main circuit
It applies example 2 and compensates control.In Fig. 6, FD1 is that real available value detects device LTC1966, LTC1966 and transformer TV1, capacitor
CV2, capacitor CV3 constitute AC power source phase voltage sample circuit, to the A phase AC power source inputted from A phase phase line L1A and zero curve N
Phase voltage measures, and obtains AC power source phase voltage sampled value U2.UIN1, UIN2 of LTC1966 is that alternating voltage difference is defeated
Enter end, USS be the negative supply input terminal that can be grounded, and UDD is positive power input, and GND is ground terminal, and EN is effective for low level
Enabled control signal, UOUT are voltage output end, and COM is output voltage return terminal.
In Fig. 6, FD2, resistance RD1, resistance RD2 form comparison circuit;FD2 compares display driver LM3914 for 10 grades,
The internal voltage divider circuit that inside is together in series containing 10 1k Ω precision resistances is formed in 10 comparative threshold voltages are respectively connected to
The positive input terminal of 10 comparators in portion;6 feet are that internal voltage divider circuit is high-end, and the internal standard power supply of 7 feet is connected to through resistance RD1
Export VREF;4 feet are internal voltage divider circuit low side, are connected to the ground through resistance RD2;8 feet are internal standard power supply low side, are connected to
Ground;2 feet are negative power end, are connected to the ground;3 feet are positive power source terminal, are connected to power supply+VCC1;5 feet are signal input part, connection
To A phase AC power source phase voltage sampled value U2, it is connected internally to the negative input end of 10 comparators;10 feet of LM3914 are to 18 feet
Output signal Y11 to Y19 be compared with 9 comparative threshold voltages of highest output as a result, wherein Y11 comparison voltage highest, according to
Secondary reduction, Y19 comparison voltage are minimum;The equal low level of Y11 to Y19 is effective, the highest priority of Y11, and Y11 to Y19 forms A phase electricity
Grade encoded radio P2A is pressed, is 9 binary codings;The scheme control end of 9 feet is connected to 3 feet, realizes the strip of Y11 to Y19
(continuous) output.In Fig. 6, internal voltage divider circuit is high-end can also to be connected to other power supplys through resistance RD1, for example, power supply+
VCC1。
9 comparators inside LM3914 in 10 comparators have been used in Fig. 6, and A phase AC power source phase voltage has been compared
Divide into 10 voltage class sections.If A phase AC power source phase voltage fluctuation range is 220V+10% to 220V-20%, it is desirable that
Stablized and is exported in the range of 220V ± 2%.Using the sampling comparison circuit embodiment 2 of Fig. 6, will input 242V extremely
Voltage between 176V is divided into 10 voltage class sections that section voltage swing is 7V, 3 voltage class sections therein
Voltage is higher than desired output voltage range, needs to carry out drop compensation;The voltage in 6 voltage class sections is defeated lower than what is required
Voltage range out needs to carry out boosting compensation;1 voltage class section carries out 0 voltage within desired output voltage range
Compensation, i.e. uncompensation.The voltage range of 7V is 220V ± 1.6%, meets requirement of the output control within 220V ± 2%;7V
10 voltage class sections corresponding AC supply voltage waving intervals be 244.5V to 174.5V, cover and actually fluctuate
Range.It is compensated using the A phase main circuit in the compensation main circuit embodiment 2 of Fig. 4, and the output electricity of auto-transformer TB2
Press U12 minimum, U23 highest;Voltage U23 is 3 times of voltage U12, and voltage U34 is 2 times of voltage U12;Then auto-transformer TB2
Input voltage be alternating current 220V, when only making the magnet exciting coil voltage of TB1 of output voltage U12, TB1 offset voltage be 7V;From
The input voltage of coupling transformer TB2 is alternating current 220V, when only making the magnet exciting coil voltage of TB1 of output voltage U23, TB1 compensation
Voltage is 21V;The input voltage of auto-transformer TB2 is alternating current 220V, and the magnet exciting coil electricity of TB1 is only made of output voltage U34
When pressure, TB1 offset voltage is 14V;The input voltage of auto-transformer TB2 be alternating current 220V, while using output voltage U12,
When U23 does the magnet exciting coil voltage of TB1, TB1 offset voltage is 28V;Etc..The selection and A phase AC power source phase of threshold voltage
Ratio between voltage sample value U2 and A phase AC power source phase voltage is related;If A phase AC power source phase voltage sampled value U2 and A
Ratio between phase AC power source phase voltage is 0.005, i.e. A phase AC power source phase voltage sampled value U2 is A phase AC power source phase
A phase AC power source phase voltage is then divided into 10 voltage class sections that section voltage swing is 7V by the 0.5% of voltage effective value
9 threshold voltages be respectively 1.1875V, 1.1525V, 1.1175V, 1.0825V, 1.0475V, 1.0125V, 0.9775V,
0.9425V, 0.9075V sample for phase voltage corresponding with the AC power source phase voltage value in 10 voltage class sections is separated
The intermediate dividing voltage value of 9 of value;The high-end voltage of internal voltage divider circuit is connected to highest comparator positive input terminal, therefore 6 foot voltages
For 1.1875V.According to the size of 9 threshold voltages and internal standard power supply output VREF (1.2V or 1.25V), Ke Yiji
Calculate the size of resistance RD1, RD2.If it is required that improve voltage compensation precision either input voltage fluctuation range it is bigger,
It is required that the A phase of Fig. 6 samples comparison circuit embodiment 2 when voltage class is divided into more voltage class sections, for example, it is desired to
When the voltage of A phase AC power source phase voltage waving interval range is divided into 13 voltage class sections, 2 LM3914 realities can be used
It is existing, the internal voltage divider circuit in 2 LM3914 is connected, 20 comparative threshold voltages is formed, constitutes 20 grades of comparator circuits;Choosing
It selects 12 grades therein and compares output, the voltage class encoded radio of output will be by 12, for example, Y11-Y112 is formed.
The A phase of Fig. 6 sample comparison circuit embodiment 2 can be used for auto compensating type three-phase main circuit embodiment 1 into
Row compensation control, only need to divide into no more than 7 electricity for the voltage of the AC power source phase voltage waving interval range of input at this time
Grade interval is pressed, the comparison wherein no more than 6 grades is selected to export.
The A phase of Fig. 6 samples comparison circuit embodiment 2 either for going back to auto compensating type three-phase main circuit embodiment 1
It is that control is compensated to auto compensating type three-phase main circuit embodiment 2, B phase, C phase are all made of identical with A phase structure, function
Sample comparison circuit.
In the sampling comparison circuit embodiment 1,2 of Fig. 5, Fig. 6, when the AC power source phase voltage of input exceeds maximum voltage etc.
When grade interval range, voltage class encoded radio of output etc. is all the voltage class encoded radio of maximum voltage grade interval and carries out
Corresponding compensation;When the AC power source phase voltage of input is lower than minimum voltage levels interval range, the voltage class of output is compiled
Code value etc. is all the voltage class encoded radio in minimum voltage levels section and is compensated accordingly.
The sampling comparison circuit of each phase carries out voltage sample to the AC power source phase voltage of this phase and obtains corresponding alternating current
Source phase voltage sampled value is compared by AC power source phase voltage sampled value of the M comparator to this phase, exports M binary systems
The voltage class encoded radio of this phase that number is constituted.In addition to the A phase of Fig. 5 or Fig. 6 samples comparison circuit embodiment, mended for self coupling
It repays the either embodiment 2 of formula three-phase main circuit embodiment 1 and compensates control, three-phase sampling comparison circuit is also an option that other
AC power source phase voltage sample circuit and comparison circuit, realize sampling comparison circuit required by function.Fig. 5 AC power source phase
The AC power source phase voltage sampled value U1 of voltage sampling circuit output, can send the comparison circuit to Fig. 6 to be compared, output electricity
Press grade encoded radio;The AC power source phase voltage sampled value U2 of Fig. 6 AC power source phase voltage sample circuit output, can send to figure
5 comparison circuit is compared, output voltage grade encoded radio.
Fig. 7 is that A phase delay protects circuit embodiments block diagram, wherein delay detection module YC1 is respectively to the position the M A phase of input
Voltage class encoded radio Y11-Y1M carries out A phase voltage grade encoded radio Y21-Y2M, Y21-Y2M after signal delay is postponed
Form P3A;YC1 module carries out Edge check to M Y11-Y1M signals respectively simultaneously and obtains M Edge check signal Y31-
Y3M;Trigger region does not control signal generator module YC2 and the Edge check signal Y31-Y3M of input is converted to the not trigger region control of A phase
Signal P4A output processed.In the embodiment block diagram of Fig. 7, the input of delay detection module YC1 is that A phase compensation control circuit is adopted in Fig. 5
When the A phase voltage grade encoded radio that sample comparison circuit embodiment 1 exports, M is equal to 6.In the embodiment block diagram of Fig. 7, delay detection
The input of module YC1 is that A phase compensation control circuit samples the A phase voltage grade encoded radio that comparison circuit embodiment 2 exports in Fig. 6
When, M is equal to 9.B phase, C phase use the identical delay protection circuit with A phase.
Fig. 8 is the delay detection circuit embodiment 1 for encoding value signal Y11 in delay detection module needle to voltage class.Electricity
Hinder RY0, capacitor CY0, driving gate FY0 realize the signal delay of Y11 is obtained Y11 it is delayed after signal Y21.Resistance RY1,
Capacitor CY1, diode DY1, phase inverter FY1 composition are directed to the rising edge detection circuit of input signal Y 11, and phase inverter FY1's is defeated
Out in signal YP1, the pulse of corresponding negative pulse form is exported after Y11 rising edge.Resistance RY2, capacitor CY2,
Diode DY2, phase inverter FY2, FY3 composition are directed to the failing edge detection circuit of input signal Y 11, the output letter of phase inverter FY3
In number YP2, the pulse of corresponding negative pulse form is exported after Y11 failing edge.NAND gate FY4 is accomplished that or patrols
(under negative logic) function is collected, when there is negative pulse generation in input signal Y P1, YP2, the Edge check letter of NAND gate FY4 output
Positive pulse is generated in number Y31, i.e., when input signal Y 11 changes, NAND gate FY4 exports the simple venation of a positive pulse form
Punching.In Fig. 8, the device of driving gate FY0, phase inverter FY1, phase inverter FY3 preferably with Schmidt's input, for example, phase inverter selects
74HC14, CD40106 etc.;Driving gate FY0 can be made of 2 phase inverters with Schmidt's input.
Fig. 9 is the delay detection circuit embodiment 2 for encoding value signal Y11 in delay detection module needle to voltage class.Instead
Phase device FY5, resistance RY3, capacitor CY3 carry out reverse phase and delay to input signal Y 11, obtain the delayed inversion signal of Y11
YP0;Phase inverter FY6 again by YP0 reverse phase, obtain Y11 it is delayed after signal Y21.NAND gate FY7 input signal be Y11 and
The pulse of negative pulse form corresponding with Y11 rising edge is generated in Y11 delayed inversion signal YP0, output signal YP1;
Or the signal of door FY8 input is the delayed inversion signal YP0 of Y11 and Y11, is generated and Y11 failing edge phase in output signal YP2
The pulse for the negative pulse form answered.NAND gate FY9 is accomplished that or logic (under negative logic) function, when input signal Y P1,
When having negative pulse generation in YP2, positive pulse is generated in the Edge check signal Y31 of NAND gate FY9 output, that is, works as input signal
When Y11 is changed, NAND gate FY9 exports the pulse of a positive pulse form.In Fig. 9, phase inverter FY6, NAND gate FY7 or
Device of the door FY8 preferably with Schmidt's input, for example, phase inverter selects 74HC14, CD40106 etc.;NAND gate selection
74HC132, CD4093 etc.;Or door select 74HC7032, or selection 2 band Schmidt input phase inverters and 1 and
NOT gate is realized or door function.
Figure 10 is the delay detection circuit embodiment 3 for encoding value signal Y11 in delay detection module needle to voltage class,
In the rising edge detection circuit for input signal Y 11 formed by resistance RY1, capacitor CY1, diode DY1, phase inverter FY1, and
Failing edge detection circuit for input signal Y 11 is formed by resistance RY2, capacitor CY2, diode DY2, phase inverter FY2, FY3,
And it is identical as the embodiment 1 of Fig. 8 using the circuit of NAND gate FY4 output Edge check signal Y31.In Figure 10, by phase inverter
FY11, FY12, FY13, FY14 realize the signal delay of Y11 is obtained Y11 it is delayed after signal Y21.
It can choose Fig. 8, Fig. 9, Figure 10 embodiment for the delay detection circuit of the signal Y11 in voltage class encoded radio
Any one of 1-3;Under normal conditions, it for all signals in A, B, C three-phase voltage grade encoded radio, is all made of same
Kind delay detection circuit.For example, setting M equal to 6, the voltage class encoded radio of A, B, C three-phase is made of 6 bit binary value,
18 delay detection circuits are then needed altogether;18 delay detection circuits can be all using the embodiment of Fig. 81, or whole
Using the embodiment 2 of Fig. 9, or all using the embodiment of Figure 10 3.Delay detection circuit can also be using meeting the requirements
Other circuits realize its function.
The not trigger region control signal generator module function of each phase is, when input is directed to the side of this phase voltage grade encoded radio
Along detection any one of signal or it is multiple have pulse relevant to edge when, the not trigger region control of the phase is believed
A pulse is exported in number.Figure 11 is that trigger region does not control signal generator module embodiment to A phase, by including M input
Or door FY10 realizes that the input signal of corresponding function or door FY10 are the Edge check signal Y31-Y3M of A phase, exports as A phase
Trigger region does not control signal P4A.In Figure 11 embodiment, the A phase pulse that trigger region control signal does not export is positive pulse, i.e., not
It is effective that trigger region controls signal high level;When or door FY10 change nor gate into when, not trigger region control signal output pulse
For negative pulse.If the pulse relevant to edge that has generated in the Edge check signal Y31-Y3M of input is negative pulse,
In Figure 11 or door should be changed to NAND gate either with door, realize under negative logic or logic function.
Figure 12 is the part waveform correlation schematic diagram in delay protection circuit.In Figure 12, in A phase voltage grade encoded radio
Rising edge change occurs respectively for Y11 and failing edge changes, and Y21 is the A phase voltage grade coding after the Y11 delay T1 time
Value;In the delay detection circuit embodiment 1 of Fig. 8, (i.e. time constant is big by the product size of resistance RY0 and capacitor CY0 by T1
It is small) it determines;In the delay detection circuit embodiment 2 of Fig. 9, T1 is determined by the product size of resistance RY3 and capacitor CY3;Scheming
In 10 delay detection circuit embodiment 3, T1 is determined by the gate delay time size of phase inverter FY11, FY12, FY13, FY14 itself
It is fixed.In Figure 12, because the negative pulse width that Y11 rising edge generates is T2 in signal YP1;In the delay detection circuit embodiment 1 of Fig. 8
In the delay detection circuit embodiment 3 of Figure 10, T2 is determined by the product size of resistance RY1 and capacitor CY1;In the delay of Fig. 9
In detection circuit embodiment 2, T2 is determined by the product size of resistance RY3 and capacitor CY3.In Figure 12, because under Y11 in signal YP2
Drop is T3 along the negative pulse width generated;In the delay detection circuit embodiment 1 of Fig. 8 and the delay detection circuit embodiment of Figure 10
In 3, T3 is determined by the product size of resistance RY2 and capacitor CY2;In the delay detection circuit embodiment 2 of Fig. 9, T3 is by resistance
The product size of RY3 and capacitor CY3 determines.In Figure 12,2 positive pulses in Edge check signal Y31 are respectively and in signal YP1
Because the negative pulse that Y11 failing edge generates corresponds in the negative pulse and signal YP2 generated by Y11 rising edge.It is located at Figure 12 voltage etc.
When rising edge and decline change occur for the Y11 in grade encoded radio, no change has taken place by the Y12-Y1M in voltage class encoded radio,
Its corresponding Edge check signal Y32-Y3M does not generate positive pulse at this time, after Y11 failing edge, A phase voltage grade coding
One-shot change, the corresponding positive pulse that Edge check signal Y32 is generated occur for the Y12 in value;During this period, Y11,
Other voltage class coding value signal except Y12 is believed there is no variation with other voltage class encoded radios except Y11, Y12
Number corresponding Edge check signal is low level, is not drawn into Figure 12.In Figure 12, signal is controlled according to not trigger region above-mentioned
The logic function of generation module, trigger region does not control the 1st positive pulse in signal P4A by Edge check signal Y31 to A phase
1st negative pulse generates, and the 2nd positive pulse is generated by the 2nd negative pulse in Edge check signal Y31, the 3rd positive pulse by
Negative pulse in Edge check signal Y32 generates.Comparison circuit embodiment is sampled from the A phase compensation control circuit of Fig. 5, Fig. 6
1, it is found that when due to voltage fluctuation, the output for being only possible to a comparator under normal circumstances changes embodiment 2, i.e., electric
When pressure grade encoded radio Y12-Y1M changes, one only therein changes.
It is delayed in detection circuit embodiment 1 in the delay protection circuit of Fig. 8, voltage class encoded radio changes to right
When the delay time in the not trigger region control signal pulse forward position answered is the delay of FY10 in gate circuit FY1, FY4 and Figure 11
Between the sum of or gate circuit FY3, FY4 and Figure 11 in FY10 the sum of delay time;By multiplying for resistance RY0 and capacitor CY0
The range of choice of the signal delay time T1 for the voltage class encoded radio that product size determines is the ms order of magnitude, it is clear that is greater than voltage
Grade encoded radio changed to the delay time in corresponding not trigger region control signal pulse forward position, i.e. grade encoded radio is believed
Number delay is later than forward position moment of the pulse exported after voltage class encoded radio changes at the time of change.Strictly speaking,
T1 actually includes the sum of lag time and the delay time of gate circuit FY0 caused by resistance RY0 and capacitor CY0.Fig. 8
In embodiment 1, in selection parameter, the value of the value and T3 that make T2 is all larger than the value of T1, changes grade encoded radio signal delay
Meet the rear requirement along the moment of the pulse exported after need to changing earlier than voltage class encoded radio at the time of change.
In the delay detection circuit embodiment 2 in Fig. 9 delay protection circuit, voltage class encoded radio changes to right
When the delay time in the not trigger region control signal pulse forward position answered is the delay of FY10 in gate circuit FY7, FY9 and Figure 11
Between the sum of or gate circuit FY8, FY9 and Figure 11 in FY10 the sum of delay time;T1 is the numerical value of the ms order of magnitude, is shown
So, the signal delay time T1 of the voltage class encoded radio determined at this time by the product size of resistance RY3 and capacitor CY3 is greater than electricity
Pressure grade encoded radio changed to the delay time in corresponding not trigger region control signal pulse forward position, i.e. voltage class is compiled
Code value signal delay is later than the forward position moment of the pulse exported after voltage class encoded radio changes at the time of change.Fig. 9
Delay detection circuit embodiment 2 in, voltage class encoded radio signal delay change at the time of with voltage class encoded radio occur
The rear of the pulse exported after change is influenced by signal YP0 change along the moment;Voltage class encoded radio signal delay changes
At the time of change for signal YP0 after delay again through gate circuit FY6;The pulse that voltage class encoded radio exports after changing
It is rear along the moment be the sum of delay time again through FY10 in gate circuit FY7, FY9 and Figure 11, or letter after signal YP0 changes
The sum of delay time again through FY10 in gate circuit FY8, FY9 and Figure 11 after number YP0 changes;Obviously, voltage class encodes at this time
The rear of the pulse that value signal delay exports after changing at the time of change than voltage class encoded radio few passes through 2 along the moment
The delay time of gate circuit, meeting at the time of voltage class encoded radio signal delay changes need to occur earlier than voltage class encoded radio
The rear requirement along the moment of the pulse exported after change.
Figure 13 is the embodiment of interlocking control circuit, wherein Figure 13 (a) is A phase interlocking control circuit embodiment 1, wherein
YR1 be ROM memory.If in the A phase main circuit of Fig. 3 auto compensating type three-phase main circuit embodiment 1, auto-transformer TB2
Output voltage U12 it is low, U23 high;Voltage U23 is 2 times of voltage U12.Table 1 is A phase interlocking control circuit embodiment 1 for figure
The A phase voltage grade for sampling the output of comparison circuit embodiment 1 in 5 A phase compensation control circuit and postponing through delay protection circuit
The logic true value table of encoded radio progress logic control;AC power source phase voltage fluctuation range is 220V ± 10%, it is desirable that it is steady
It is scheduled in the range of 220V ± 2% and exports, A phase AC power source phase voltage, which is compared, divides into 7 voltage class sections.Using
When ROM memory realizes the logic function of interlocking control circuit, P4A, Y26-Y21 are sequentially connected to the ground of ROM memory respectively
Location input terminal A6-A0, the data output D0-D5 of ROM memory are that the logic of interlocking control circuit exports, 6 output signals
P51-P56 forms A phase Trig control signal P5A.As can be seen from Figure 5, when A phase AC power source phase voltage is in highest, voltage class
For 7 section when, Y16-Y11 exports high level;Between A phase AC power source phase voltage is in second highest region, i.e., voltage class is 6
Section when, Y11 exports low level, and Y16-Y12 exports high level;When A phase AC power source phase voltage is in minimum section, i.e.,
When the section that voltage class is 1, Y16-Y11 exports low level.In table 1,7 Y26-Y21's corresponding with voltage class 1-7
Value is the efficient coding value of voltage class encoded radio, and Y26-Y21 is signal of the Y16-Y11 after delay protection circuit postpones.
In table 1, trigger region does not control invalidating signal to A phase, i.e. embodiment P4A is equal to 0, and voltage class encoded radio is and voltage
When the corresponding value of grade 1-7, the A phase main circuit that interlocking control circuit controls auto compensating type three-phase main circuit embodiment 1 is carried out
Corresponding voltage compensation;For example, control P51, P56 output is gone to open two-way when input voltage is minimum voltage class 1 for 0
Thyristor SR1, SR6, other outputs such as control P52 are gone to turn off other bidirectional thyristors, be done using output voltage U12+U23 for 1
The magnet exciting coil voltage of TB1 carries out positive compensation;When input voltage is voltage class 2, control P53, P56 output is gone open-minded for 0
Bidirectional thyristor SR3, SR6, other outputs such as control P51 go to turn off other bidirectional thyristors for 1, only with output voltage U23
The magnet exciting coil voltage for being TB1 carries out positive compensation;When input voltage is voltage class 4, control P55, P56 output is gone out for 0
Pass two-way thyristor SR5, SR6, other outputs such as control P51 go to turn off other bidirectional thyristors for 1, realize 0 voltage compensation;It is defeated
When to enter voltage be voltage class 5, control P52, P53 output remove to open bidirectional thyristor SR2, SR3 for 0, other are defeated by control P51 etc.
It goes to turn off other bidirectional thyristors for 1 out, reversely be mended only with the magnet exciting coil voltage that reversed output voltage U12 is TB1
It repays;Etc..Trigger region control signal is not effective, when P4A is equal to 1, shows that AC power source phase voltage has fluctuation, makes its voltage etc.
Grade encoded radio produces variation, needs to carry out the switching of thyristor switch group on-off assembled state, changes the compensation way of A phase.
In the handoff procedure of electronic switch, when to avoid thyristor switching in thyristor switch group, because electronic switch is delayed to turn off
Factor cause power supply short circuit, not trigger region control the signal valid period, i.e. the P4A of A phase embodiment be equal to 1 when, turn off A phase
All bidirectional thyristors in thyristor switch group, A phase interlocking control circuit control P51-P56 all output 1.
Table 1
In table 1, A phase not trigger region control invalidating signal (P4A be equal to 0) when, 7 voltage class encoded radio P3A's is effective
Encoded radio is corresponding with 7 groups of effective Trig control signals, accordingly realizes the control of 7 kinds of voltage compensation states;When P2A change makes not touch
Control signal in hair area is corresponding with 1 group of effective Trig control signal when effective (P4A is equal to 1), and interlocking control circuit exports altogether 8 groups
Effective Trig control signal.When not trigger region control invalidating signal (P4A is equal to 0), and the voltage etc. of interlocking control circuit input
When grade encoded radio P3A is invalid code value, the Trig control signal of interlocking control circuit output is corresponding with 1 group and triggers control in vain
Signal.The voltage class encoded radio P2A that the circuit embodiments 1 of Fig. 5 export is made of 6 binary codings, after delay
The voltage class encoded radio P3A formed to 6 binary codings shares 64 kinds of possible coding outputs;Not trigger region control letter
When number invalid (P4A is equal to 0), in addition to the efficient coding value of 7 voltage class encoded radio P3A, there is also 57 groups of invalid code values,
It may be because comparator failure and other reasons, interlocking control circuit made to export 1 group in this 57 groups of invalid code values;In not trigger region
When to control invalidating signal and P3A be invalid code value, interlocking control circuit exports 1 group of specifically invalid Trig control signal;Table 1
In, it is 1 which, which makes P56 output be 0, P51-P55 output,;The specific invalid Trig control signal
Without the practical control of thyristor, even if playing the triggering control action of thyristor, it is connected to TB1 magnet exciting coil certainly
A tap and excitation voltage of coupling transformer TB2 is 0, without voltage compensation;This 1 group specific invalid Trig control signal
It is also an option that other not can be carried out the triggering combination of voltage compensation, for example, P55 output is made to be 0, others output is 1.
In table 1, low level is effective when the Trig control signal triggering bidirectional thyristor of interlocking control circuit output is connected.Such as
High level is effective when the Trig control signal of fruit interlocking control circuit output requires triggering bidirectional thyristor to be connected, then 1 logic of table
1 in the output signal of truth table, which needs to change into 0,0, needs to change into 1;When realizing its function with ROM memory, storage is single
The content of member is according to 1 reverse phase of table.
Figure 13 (b) is A phase interlocking control circuit embodiment 2, and YR2 therein is ROM memory.If Fig. 4 auto compensating type
In the A phase main circuit of three-phase main circuit embodiment 2, the output voltage U12 of auto-transformer TB2 is minimum, U23 highest;Voltage U23
It is 3 times of voltage U12, voltage U34 is 2 times of voltage U12.Table 2 compensates control electricity for the A phase of Fig. 6 for interlocking control circuit
The output of comparison circuit embodiment 2 is sampled in road and the A phase voltage grade encoded radio through delay protection circuit delay carries out logic control
Logic true value table when processed;AC power source phase voltage fluctuation range is 220V+10% to 220V-20%, it is desirable that is stablized
It is exported in the range of 220V ± 2%, A phase AC power source phase voltage, which is compared, divides into 10 voltage class sections.Using Figure 13
(b) embodiment 2 of A phase interlocking control circuit when realizing its logic function using ROM memory YR2, inputs P4A, Y29-
Y21 is connected to the address end A9-A0 of ROM memory, and the data output D0-D7 of ROM memory is the logic of interlocking control circuit
Output, 8 output signal P51-P58 form A phase Trig control signal P5A.Y29-Y21 is Y19-Y11 through delay protection circuit
Signal after delay.
From the function of Fig. 6 and LM3914 it is found that i.e. voltage class is 10 when A phase AC power source phase voltage is in highest section
Section when, Y19-Y11 exports low level;Between A phase AC power source phase voltage is in second highest region, i.e., voltage class is 9
When section, Y11 exports high level, and Y19-Y12 exports low level;It is when A phase AC power source phase voltage is in minimum section, i.e., electric
When the section that pressure grade is 1, Y19-Y11 exports high level.In table 2,10 Y19-Y10's corresponding with voltage class 1-10
Value is the efficient coding value of voltage class encoded radio.
In table 2, trigger region does not control invalidating signal to A phase, and P4A is equal to 0, A phase voltage grade encoded radio and is and voltage class
When the corresponding value of 1-10, the A phase main circuit that A phase interlocking control circuit controls auto compensating type three-phase main circuit embodiment 2 is carried out
Corresponding voltage compensation;For example, control P57, P58 output goes to open bidirectional thyristor when input voltage is voltage class 7 for 0
SR7, SR8, other outputs such as control P51 go to turn off other bidirectional thyristors for 1, realize 0 voltage compensation;Input voltage is voltage
When grade 8, control P52, P53 output go to open bidirectional thyristor SR2, SR3 for 0, other outputs such as control P51 go to turn off for 1
Other bidirectional thyristors carry out Contrary compensation only with the magnet exciting coil voltage that reversed output voltage U12 is TB1;Input voltage
When for voltage class 9, control P56, P57 output go to open bidirectional thyristor SR6, SR7 for 0, other outputs such as control P51 are 1
It goes to turn off other bidirectional thyristors, carries out Contrary compensation only with the magnet exciting coil voltage that reversed output voltage U34 is TB1;It is defeated
When to enter voltage be voltage class 10, control P54, P55 output remove to open bidirectional thyristor SR4, SR5 for 0, control P51 etc. other
Output goes to turn off other bidirectional thyristors for 1, carries out only with the magnet exciting coil voltage that reversed output voltage U23 is TB1 reversed
Compensation;When input voltage is voltage class 6, control P51, P54 output goes to open bidirectional thyristor SR1, SR4 for 0, controls P52
It is exported Deng other and goes to turn off other bidirectional thyristors for 1, carried out just only with the magnet exciting coil voltage that output voltage U12 is being TB1
To compensation;When input voltage is voltage class 4, control P53, P56 output goes to open bidirectional thyristor SR3, SR6 for 0, controls
Other outputs such as P51 go to turn off other bidirectional thyristors for 1, carry out only with the magnet exciting coil voltage that output voltage U23 is TB1
Forward direction compensation;When input voltage is voltage class 3, control P51 output goes to open bidirectional thyristor SR1, SR6 for 0, controls P52
It is exported Deng other and goes to turn off other bidirectional thyristors for 1, carried out using the magnet exciting coil voltage that output voltage U12+U23 is TB1
Forward direction compensation;When input voltage is voltage class 1, control P51, P58 output goes to open bidirectional thyristor SR1, SR8 for 0, controls
Other outputs such as P52 go to turn off other bidirectional thyristors for 1, and the magnet exciting coil electricity of TB1 is done using output voltage U12+U23+U34
Pressure carries out positive compensation;Etc..Trigger region control signal is not effective, when P4A is equal to 1, shows that there are waves for AC power source phase voltage
It is dynamic, so that A phase voltage grade encoded radio is produced variation, need to carry out the switching of thyristor switch group on-off assembled state, changes
Compensation way turns off all bidirectional thyristors in A phase thyristor switch group at this time, and it is complete that A phase interlocking control circuit controls P51-P58
Portion's output 1.
Table 2
In table 2, A phase not trigger region control invalidating signal (P4A be equal to 0) when, 10 A phase voltage grade encoded radio P3A's
Efficient coding value is corresponding with 10 groups of effective Trig control signals, accordingly realizes the control of 10 kinds of voltage compensation states;When A phase voltage
Grade encoded radio P2A change make A phase not trigger region control signal effectively (P4A be equal to 1) when be corresponding with 1 group of effectively triggering control and believe
Number, interlocking control circuit exports altogether 11 groups of effective Trig control signals.When (P4A is not equal to trigger region control invalidating signal A phase
0) when, and the A phase voltage grade encoded radio P3A of interlocking control circuit input is invalid code value, interlocking control circuit output
Trig control signal is corresponding with 1 group of specifically invalid Trig control signal.The voltage class that the circuit embodiments 2 of Fig. 6 export is compiled
Code value P2A is made of 9 binary codings, and the voltage class encoded radio of 9 binary codings composition is obtained after delay
P3A shares 512 kinds of possible coding outputs;Not when trigger region control invalidating signal (P4A is equal to 0), except 10 voltage class are compiled
Outside the efficient coding value of code value P3A, there is also 502 groups of invalid code values, probably due to comparator failure and other reasons, make mutual lock control
1 group in this 502 groups of invalid code values of circuit output processed;When not trigger region controls invalidating signal and P3A is invalid code value,
Interlocking control circuit exports 1 group of specifically invalid Trig control signal;In table 2, which keeps P58 defeated
Be out 0, P51-P57 output be 1;The specific invalid practical control of the Trig control signal without thyristor, even if playing
The triggering control action of thyristor, also only makes the TB1 magnet exciting coil be connected to a tap and excitation voltage of auto-transformer TB2
It is 0, without voltage compensation;This 1 group specifically invalid Trig control signal be also an option that other not can be carried out voltage compensation
Triggering combination, for example, make P57 go out be 0, others output be 1.
In table 2, there is low level when the Trig control signal triggering bidirectional thyristor of A phase interlocking control circuit output is connected
Effect.If high level is effective when the Trig control signal of interlocking control circuit output requires to be connected for triggering bidirectional thyristor,
1 in the output signal of 2 logic true value table of table, which needs to change into 0,0, needs to change into 1;When realizing its function with ROM memory,
The content of storage unit is according to 2 reverse phase of table.
Combination logic function in 2 truth table of table 1 or table can also be gone using the other modes except ROM memory
It realizes.The interlocking control circuit of B phase and C phase uses with A phase interlocking control circuit identical circuit and control logic.
Figure 14 is the trigger circuit embodiment that bidirectional thyristor SR1 in A phase main circuit is triggered in trigger unit, is touched by exchange
Shine coupling UG1, resistance RG1, resistance RG2 composition, and Trig control signal P51 low level is effective.Altemating trigger optocoupler UG1 can be selected
Select the phase shifts type bidirectional thyristor output light thermocouple such as MOC3021, MOC3022, MOC3023, MOC3051, MOC3052, MOC3053
Clutch.Power supply+VCCK is the controlled source controlled by error detection control unit.Fig. 3 auto compensating type three-phase main circuit is triggered to implement
Bidirectional thyristor SR2-SR6 in the A phase main circuit of example 1, or the A of triggering Fig. 4 auto compensating type three-phase main circuit embodiment 2
The touching of bidirectional thyristor in the trigger circuit of bidirectional thyristor SR2-SR8 in phase main circuit, and triggering B phase and C phase main circuit
Power Generation Road, as the circuit structure of bidirectional thyristor SR1 in triggering A phase main circuit.The altemating trigger optocoupler UG1 of Figure 14 from
The trigger pulse of other altemating trigger optocouplers output collectively constitutes touching in the trigger pulse and trigger unit of G11A, G12A output
Signalling P6.
Figure 15 is error detection control unit embodiment, wherein YR3, YR4, YR5 are ROM memory, YR3, YR4, YR5 group
At discrimination module, for judging whether Trig control signal P5A, P5B, P5C of A, B, C phase of input are effective triggering control respectively
Signal processed;With door FK1, triode VT, triode VK1, triode VK2, relay coil KF, relay switch KF-1, afterflow
Diode VD, resistance RK1, resistance RK2, resistance RK3 composition protection control signal generating circuit.+ VCC2 is relay coil
The source current of power supply and trigger unit controlled source.
The error detection control unit embodiment of Figure 15 is used to form thyristor switch by 6 bidirectional thyristors for the every phase of control
The Trig control signal issued when group is judged.Table 3 is the triggering control for judging A phase interlocking control circuit embodiment 1 and issuing
Signal processed whether be effective Trig control signal logic true value table, auto-transformer has 3 taps, by 6 two-way crystalline substances at this time
Brake tube forms thyristor switch group;When the Trig control signal that A phase interlocking control circuit embodiment 1 issues is 8 rows of front in table 3
When 1 group in 8 groups of listed effective Trig control signals, the A phase of ROM memory YR3 output triggers control and differentiates that signal is effective,
That is P7A is 1, and expression A phase Trig control signal is effective Trig control signal;It is issued when A phase interlocking control circuit embodiment 1
Trig control signal is other signals, is not any 1 group in table 3 in 8 groups of effective Trig control signals listed by 8 rows of front
When, the A phase of YR3 output triggers control and differentiates that invalidating signal, i.e. P7A are 0, indicates that A phase Trig control signal is not effectively to trigger
Control signal;When the input of A phase interlocking control circuit embodiment 1 is invalid code value, and exports invalid Trig control signal,
From table 3 it can be seen that the P7A of YR3 output is similarly 0.ROM memory YR4 is used for export to B phase interlocking control circuit 6
Trig control signal judged, 6 Trig control signals that ROM memory YR5 is used to export C phase interlocking control circuit into
Row judgement, principle judge with ROM memory YR3 6 Trig control signals for being used to export A phase interlocking control circuit
Principle it is identical.When 6 Trig control signal P5B of B phase interlocking control circuit output are in 8 groups of effective Trig control signals
At 1 group, otherwise it is 0 that the P7B of YR4 output, which is 1,;When 6 Trig control signal P5C of C phase interlocking control circuit output are 8 groups
When 1 group in effective Trig control signal, otherwise it is 0 that the P7C of YR5 output, which is 1,.
Table 3
When all effective Trig control signals of the Trig control signal that A phase, B phase, C phase interlocking control circuit issues,
Auto compensating type three-phase main circuit is in compensation work state;When the triggering control that A phase, B phase, C phase interlocking control circuit issues
When signal is not all of as effective Trig control signal, auto compensating type three-phase main circuit is in the protection shape of thyristor switch group
State.In Figure 15, as P7A, P7B, P7C all 1, the Trig control signal that A phase, B phase, C phase interlocking control circuit issues is whole
When for effective Trig control signal, the triggering control with door FK1 output differentiates that resultant signal P7 is effective, i.e. P7 is 1, triode VK1,
VK2 conducting, controlled source+VCCK obtain electric, trigger unit normal work, issue corresponding triggering arteries and veins according to Trig control signal
Punching.P7 is 1 while controlling triode VT conducting, and relay coil KF obtains electric, relay switch KF-1 closure, and F1, F2 are indirect
It is logical, make the protection issued control invalidating signal.It is 1 when P7A, P7B, P7C are not all of, A phase, B phase, C phase interlocking control circuit
The Trig control signal of sending not all effective Trig control signals when, P7 0 invalid with the output signal of door FK1, three poles
Pipe VK1, VK2 cut-off, controlled source+VCCK power loss, trigger unit do not work, i.e., do not issue the trigger pulse of triggering thyristor.
P7 is 0 while controlling triode VT cut-off, and relay coil KF power loss, relay switch KF-1 is disconnected, and F1, F2's is separated,
Keep the protection issued control signal effective.In Figure 15, when relay switch KF-1 is closed, the protection of sending controls invalidating signal,
When relay switch KF-1 is disconnected, the protection control signal of sending is effective.If by relay switch KF-1 in Figure 15 by normally opened
Switch is changed to normally closed switch, then relay switch KF-1 is closed, and when connecting between F1, F2, the protection control signal of sending is effective;
Relay switch KF-1 is disconnected, F1, F2 it is separated when, the protection of sending controls invalidating signal.With the triggering control of door FK1 output
System differentiates that the triggering control of resultant signal and input three-phase differentiates that the equal high level of signal is effective.
When interlocking control unit, i.e., when the protection that auto compensating type AC voltage-stabilizing controller issues controls invalidating signal, i.e.,
When connecting between F1, F2 of Figure 15 embodiment, control makes the relay normally open switch KA- in the compensation main circuit embodiment 1 of Fig. 2
1 closure, relay normally closed switch KA-2 are disconnected;Protection control invalidating signal controls the implementation of auto compensating type three-phase main circuit simultaneously
Corresponding relay normally open switch is disconnected in the B phase and C phase main circuit of example 1 closes, and relay normally closed switch disconnects, at three-phase main circuit
In compensation work state.When the protection control signal that auto compensating type AC voltage-stabilizing controller issues is effective, i.e. Figure 15 embodiment
F1, F2 it is separated when, control disconnect the relay normally open switch KA-1 in the compensation main circuit embodiment 1 of Fig. 2, relay
Device normally closed switch KA-2 closure;Protection control signal effectively simultaneously control auto compensating type three-phase main circuit embodiment 1 B phase and
Corresponding relay normally open switch disconnects in C phase main circuit, and relay normally closed switch is disconnected to be closed, the auto-transformer primary side of each phase
It opens a way, three-phase main circuit is in protection working condition, realizes the protection to three-phase thyristor switching group.
From table 3 it can be seen that when the input of A phase interlocking control circuit embodiment 1 is invalid code value, and export invalid touching
It is 0 that YR3, which is equally exported, when hair control signal, in discrimination module, and the protection control signal for issuing AC voltage-stabilizing controller is effective.
Therefore, either because each phase sampling comparison circuit failure occurs and causes to output invalid code value or each mutual lock control
Control mistake, which occurs, in circuit processed to be caused to output invalid Trig control signal, and error detection control unit makes the protection issued control
Signal is effective, and thyristor switch group is protected in starting.When the logic true value table that A phase differentiates in 3 discrimination module of table uses ROM
When memory is realized, the address input of ROM memory needs 6, i.e. a0-a5 in table 3 is correspondingly connected with input signal P51-
P56;The data output of ROM memory needs 1, i.e. d0 in table 3 is correspondingly connected with the control signal P7A of output;At this point, into
Row B phase differentiate with C phase the input of 6 bit address is also respectively adopted, the ROM memory of 1 data output realizes corresponding function.
Table 4 is the Trig control signal that error detection control unit is directed to that Figure 13 (b) A phase interlocking control circuit embodiment 2 issues
Whether be effective Trig control signal logic true value table, the Trig control signal of input is 8, and auto-transformer has 4 at this time
A tap, every phase form thyristor switch group by 8 bidirectional thyristors.When the logic true value table of table 4 is realized using ROM memory
When, the address input of ROM memory needs 8, i.e. a0-a7 in table 4 is correspondingly connected with input signal P51-P58;ROM storage
The data output of device needs 1, i.e. d0 in table 4, for the control signal P7A of output;At this point, when the embodiment using Figure 15 is real
When the function of existing error detection control unit, it is only necessary to change the address input of ROM memory YR3, YR4, YR5 in Figure 15 from 6
It is 8, the working principle with process of other circuits are as when 6 Trig control signals of control in Figure 15.At this point, working as A
The Trig control signal that phase interlocking control circuit embodiment 2 issues effectively triggers control for 11 groups listed by 11 rows of front in table 4
When 1 group in signal, the A phase of ROM memory YR3 output triggers control and differentiates that signal is effective, i.e. P7A is 1, indicates that A phase triggers
Control signal is effective Trig control signal;When the Trig control signal that A phase interlocking control circuit embodiment 2 issues is other letters
Number, when not being any 1 group in 11 groups of effective Trig control signals listed by 11 rows of front in table 4, the A phase of YR3 output is triggered
Control differentiates that invalidating signal, i.e. P7A are 0, indicates that A phase Trig control signal is not effective Trig control signal;When the mutual lock control of A
The input of circuit embodiments 2 processed is invalid code value, and when exporting invalid Trig control signal, from table 4, it can be seen that YR3 is defeated
P7A out is similarly 0.8 Trig control signals that ROM memory YR4 is used to export B phase interlocking control circuit are sentenced
Disconnected, 8 Trig control signals that ROM memory YR5 is used to export C phase interlocking control circuit judge, principle and ROM
The principle that memory YR3 is used to judge 8 Trig control signals that A phase interlocking control circuit exports is identical.When B is mutual
When 8 Trig control signal P5B of lock control circuit output are 1 group in 11 groups of effective Trig control signals, YR4 output
P7B is 1, is otherwise 0;When 8 Trig control signal P5C of C phase interlocking control circuit output are 11 groups of effectively triggering control letters
When 1 group in number, otherwise it is 0 that the P7C of YR5 output, which is 1,.
Table 4
Combination logic function in either 4 truth table of table of table 3, can also be using the other modes except ROM memory
It goes to realize.
In the A phase, B phase, C phase that the judgement of error detection control unit inputs totally three groups of Trig control signals, there is one group and one group
When not being effective Trig control signal above, keep the protection issued control signal effective.Auto compensating type three-phase main circuit receives
When the protection control signal arrived is effective, controls the thyristor switch group of A phase, B phase, C phase while being in guard mode, i.e., not to defeated
Enter voltage to compensate, the voltage of output is the three-phase alternating-current supply phase voltage inputted.Have in the protection control signal of sending
When effect, if error detection control unit judges that touch to be effective by totally three groups of Trig control signal full recoveries for the A phase, B phase, C phase inputted
Hair control signal then makes the protection issued control invalidating signal again;The protection control that auto compensating type three-phase main circuit receives
Signal processed terminates the guard mode of thyristor switch group, the thyristor switch of A phase, B phase, C phase from when effectively becoming invalid automatically
Group is all in compensation work state again.
From above embodiment and its course of work it is found that as long as error detection control unit judges three groups of triggering controls of input
Signal processed is not all effective Trig control signal, then while not issuing the trigger pulse of triggering thyristor, makes the guarantor issued
Shield control signal is effective, starts and the thyristor switch group of three-phase is made to be in guard mode;The mutual lock control electricity of A phase, B phase, C phase
Effective Trig control signal of road output ipsilateral crystalline substance in it ensure that each phase thyristor switch group of auto compensating type three-phase main circuit
Brake tube does not simultaneously turn on, that is, while realizing thyristor mutual lock control, error detection control unit is also to appearance other are improper
Control logic mistake, including each phase sampling comparison circuit break down, output invalid code value and interlocking control circuit
There is logic error, when outputing invalid Trig control signal, while not issuing the trigger pulse of triggering thyristor, makes to send out
Protection control signal out is effective, starts after being received by auto compensating type three-phase main circuit and thyristor switch group is made to be in protection
State.Above-mentioned function effectively strengthens the protection that auto compensating type AC voltage-stabilizing controller is directed to course of work exception,
Keep the course of work of three-phase alternating current pressure stabilizing more stable, reliable.
In above each embodiment attached drawing, all ROM memories, logic gates and logic function integrated circuit are adopted
It is powered with single supply+VCC1.Except for the technical features described in the specification, the other technologies of auto compensating type AC voltage-stabilizing controller
It is the routine techniques that those skilled in the art are grasped.