CN109244137A - A kind of high reliability SiC MOSFET element - Google Patents

A kind of high reliability SiC MOSFET element Download PDF

Info

Publication number
CN109244137A
CN109244137A CN201811094670.9A CN201811094670A CN109244137A CN 109244137 A CN109244137 A CN 109244137A CN 201811094670 A CN201811094670 A CN 201811094670A CN 109244137 A CN109244137 A CN 109244137A
Authority
CN
China
Prior art keywords
area
grid
electrode
well
sic mosfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201811094670.9A
Other languages
Chinese (zh)
Inventor
李轩
肖家木
邓小川
张波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Electronic Science and Technology of China
Original Assignee
University of Electronic Science and Technology of China
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Electronic Science and Technology of China filed Critical University of Electronic Science and Technology of China
Priority to CN201811094670.9A priority Critical patent/CN109244137A/en
Publication of CN109244137A publication Critical patent/CN109244137A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
    • H01L29/7806—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a Schottky barrier diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The present invention provides a kind of high reliability SiC MOSFET element, include: N-type substrate, N-type epitaxy layer, the area P-body, the contact zone P+, the contact zone N+, oxide layer, grid, Schottky contact electrode, the depth area P-well, the deep area P-well by the right side of oxide layer, on the right side of Schottky contact electrode and part downside tight；The present invention can promote SiC MOSFET third quadrant performance; it realizes low reversed cut-in voltage and conduction loss and avoids bipolar degenerate problem; device turns off the area Shi Shen P-well both can be with the electric field at shielding trench grid chamfering; it can protect the integrated schottky interface of slot bottom again; effectively inhibit the phenomenon that this at two electric field it is excessive; improve device integrated electronic characteristic and reliability; JFET pinch off is yet formed between the deep area P-well of the adjacent cellular of the device; Schottky contact electrode can also provide assisted depletion, therefore the structure has better short-circuit capacity.

Description

A kind of high reliability SiC MOSFET element
Technical field
The invention belongs to Electronics Science and Technology fields, are mainly concerned with power semiconductor technology, specifically It is related to a kind of high reliability SiC MOSFET element.
Background technique
Semiconductor material with wide forbidden band SiC is to prepare the excellent ideal material of high voltage electric and electronic device, relative to Si material, SiC material has breakdown field strength height (4 × 106V/cm), carrier saturation drift velocity height (2 × 107Cm/s), thermal conductivity High (490W/Mk), the advantages that thermal stability is good, therefore particularly suitable for high-power, high pressure, high temperature and anti-radiation electronics device Part.
MOSFET is the most widely used a kind of device architecture in SiC power device, relative to ambipolar device, by There is no charge-storage effect in SiC MOSFET, so it has lower switching loss and higher frequency characteristic.
Since current SiC material and the poor interfacial state of grid oxygen medium result in too low channel mobility, so that plane Gate type MOSFET on state characteristic compares also biggish distance with theoretical limit.And Grooved-gate MOSFET's structure is because it is without the area JFET Domain, and gully density is improved, so that its forward conduction ability is obviously improved.Recently as SiC MOSFET advantage gradually by Industry approves that technique preparative capacibility is continued to optimize, and device designed capacity is constantly promoted, SiC MOSFET forward blocking and conducting Ability is significantly enhanced.
With industry to power electronic system of new generation power density and in terms of requirements at the higher level, the system core SiC MOSFET element does not need only to have the electric property of outstanding first quartile, and the optimization of third quadrant performance also needs It pays special attention to.Although there are parasitic body diodes for MOSFET structure, there is reverse-conducting ability, since SiC material has The wider feature of forbidden bandwidth, body diode cut-in voltage is up to 3 volts (much higher than Si based diode cut-in voltage), therefore body Loss when diode reverse-conducting is larger.Simultaneously because there are the still unsolved defects such as stacking fault to ask for SiC epitaxial material Topic, body diode, which works long hours, easily causes bipolar degeneration, also degenerates therewith so as to cause MOSFET electric property, is such as connected Resistance increase, blocking leakage current increase etc..This will bring stern challenge to the Performance And Reliability of entire power system.
For these reasons, researcher proposes Embedded Xiao Te on the basis of traditional SiC MOSFET structure Based diode.Because the cut-in voltage of SiC Schottky diode is low, it both can reduce device in this way and worked in third quadrant Reversed cut-in voltage and conduction loss, can also be to avoid bipolar degenerate problem.But when device is in blocking state, Schottky The electric field of interface is larger, causes the reverse leakage current of integrated Schottky diode to increase, so as to cause entire SiC MOSFET leakage current dramatically increases, and performance is degenerated.The problem is especially prominent in mesohigh SiC MOSFET element.
In order to optimize SiC MOSFET element third quadrant performance and avoid bipolar degradation phenomena, while avoiding integrated The excessive problem of blocking state leakage current caused by schottky interface electric field is assembled, the present invention propose that one kind integrates Xiao in slot bottom The SiC MOSFET element of special based diode.Device work provides reverse-conducting by Schottky diode in third quadrant When current path, realize low reversed cut-in voltage and conduction loss and avoid bipolar degenerate problem.And when device shutdown The deep area P-well not only can be with the electric field at shielding trench grid chamfering, but also can protect the integrated schottky interface of slot bottom, effectively inhibited This excessive phenomenon of electric field at two, improves device integrated electronic characteristic and reliability.In addition, being pressed from both sides compared to traditional structure channel It is disconnected, JFET pinch off is yet formed between the deep area P-well of the adjacent cellular of the device, Schottky contact electrode can also provide auxiliary It helps and exhausts, therefore the structure has better short-circuit capacity.
Summary of the invention
The problem to be solved in the present invention is: promoting SiC MOSFET third quadrant performance (low cut-in voltage and conducting damage Consumption), bipolar degenerate problem, small leakage current under blocking state, strong short-circuit energy are avoided the occurrence of from the approach of structure optimization Power etc..
For achieving the above object, technical solution of the present invention is as follows:
A kind of high reliability SiC MOSFET element, comprising: N-type substrate 12, the N-type extension above N-type substrate 12 Floor 10 connects positioned at the area P-body 20 on the left side, the contact zone P+ 21 above the area P-body 20 and N+ above N-type epitaxy layer 10 Touch area 11, the oxide layer 4 positioned at 20 right side of the area P-body and grid 3, the Schottky contact electrode 53 positioned at 3 lower section of grid, position The deep area P-well 22 on the right above N-type epitaxy layer 10, wherein the depth area P-well 22 by the right side of oxide layer 4, Schottky contacts 53 right side of electrode and part downside tight；The contact zone P+ 21 and the contact zone N+ 11 are deep by Ohmic contact formation source electrode 51 The area P-well 22 passes through Ohmic contact by the N-type substrate 12 below Ohmic contact formation source electrode 51, device and forms drain electrode 52；Source Pole 51 is connect with Schottky contact electrode 53 by domain mode, so that the two current potential is equal.
It is preferred that grid 3 is split into two side grid, and side grid central filler has oxide layer 4.
It is preferred that grid 3 is split into two side grid, side grid central filler has metal to make source electrode 51 and Schottky Contact electrode 53 is linked into the same region, which is metal electrode 54, filled with aerobic between metal electrode 54 and grid 3 Change layer 4.
It is preferred that being equipped with separate gate 31 between grid 3 and Schottky contact electrode 53, and separate gate 31 and grid 3, Schottky contact electrode 53, N-type epitaxy layer 10, be isolated filled with the work of oxide layer 4 between the depth area P-well 22.
It is preferred that the contact zone P+ 21 is located at 20 inside of the area P-body and is located at 11 lower left of the contact zone N+, P+ is connect It touches area 21 and the contact zone N+ 11 and source electrode 51 is formed by Ohmic contact.
It is preferred that 53 lower left of Schottky contact electrode is equipped with the area P-shield 23, and the area P-shield 23 With deep 22 phase of the area P-well from.
It is preferred that each doping type accordingly becomes opposite doping in the device, i.e. p-type doping becomes N-type N-type doping becomes p-type doping while doping.
The device material therefor is SiC material or other semiconductor materials.
The invention has the benefit that 1: SiC MOSFET element proposed by the present invention can promote SiC MOSFET third Quadrant performance realizes low reversed cut-in voltage and conduction loss and avoids bipolar degenerate problem.2: depth P- when device turns off The area well not only can be with the electric field at shielding trench grid chamfering, but also can protect the integrated schottky interface of slot bottom, effectively inhibit this two Locate the excessive phenomenon of electric field, improves device integrated electronic characteristic and reliability, 3: comparing traditional structure channel pinch off, the device JFET pinch off is yet formed between the deep area P-well of adjacent cellular, Schottky contact electrode can also provide assisted depletion, because This structure has better short-circuit capacity.
Detailed description of the invention
Fig. 1 is traditional Si C Grooved-gate MOSFET's device junction composition；
Fig. 2 is the device junction composition of the embodiment of the present invention 1；
Fig. 3 is the device junction composition of the embodiment of the present invention 2；
Fig. 4 is the device junction composition of the embodiment of the present invention 3；
Fig. 5 is the device junction composition of the embodiment of the present invention 4；
Fig. 6 is the device junction composition of the embodiment of the present invention 5；
Fig. 7 is the device junction composition of the embodiment of the present invention 6；
Fig. 8 is 1 device I-V analogous diagram of embodiment.
3 it is grid, 4 be oxide layer, 10 be N-type epitaxy layer, 11 be the contact zone N+, 12 be N-type substrate, 20 is P-body Area, 21 be the contact zone P+, 22 be the deep area P-well, 23 be the area P-shield, 31 be separate gate, 51 be source electrode, 52 be drain electrode, 53 It is metal electrode for Schottky contact electrode, 54.
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from Various modifications or alterations are carried out under spirit of the invention.
Embodiment 1
As shown in Fig. 2, the high reliability SiC MOSFET element of the present embodiment, comprising: N-type substrate 12 is located at N-type substrate 12 top N-type epitaxy layer 10, positioned at the area P-body 20 on the left side, the P above the area P-body 20 above N-type epitaxy layer 10 + contact zone 21 and the contact zone N+ 11, the oxide layer 4 positioned at 20 right side of the area P-body and grid 3, the Xiao Te positioned at 3 lower section of grid Base contacts electrode 53, positioned at N-type epitaxy layer 10 above on the right of the deep area P-well 22, wherein the depth area P-well 22 is by oxide layer 4 Right side, 53 right side of Schottky contact electrode and part downside tight；The contact zone P+ 21 and the contact zone N+ 11 are connect by ohm Touching forms source electrode 51, and the deep area P-well 22 is connect by the N-type substrate 12 below Ohmic contact formation source electrode 51, device by ohm Touching forms drain electrode 52；Source electrode 51 is connect with Schottky contact electrode 53 by domain mode, so that the two current potential is equal.
The working principle of this example are as follows:
Device when normal use, drain 52 voltage be not less than source electrode 51 voltage.Because of source electrode 51 and Xiao Te Base contact electrode 53 is shorted together, so 52 voltages of drain electrode are also not less than 53 voltage of Schottky contact electrode.When grid 3 On bias voltage be 0 volt when, device work in blocking state.Under blocking state, although Schottky contact electrode 53 is in slot bottom Portion and N-type epitaxy layer 10 are formed by Schottky contacts interface and are in reverse-biased, but the electric field at the schottky interface is simultaneously It will not be very high.This is attributed to during the deep area P-well 22 between adjacent cellular exhausts to N-type epitaxy layer 10, when reverse-biased electricity When pressure reaches certain value, the deep area P-well 22 will exhaust the N-type epitaxy layer 10 on 53 periphery of pinch off Schottky contact electrode, effectively Protect schottky interface.When the bias voltage on grid 3 reaches device threshold voltage, device works in forward conduction state, The electrology characteristic of device is consistent with traditional Grooved-gate MOSFET's at this time.
When device is in dead zone state, when device being needed to play afterflow, Schottky contact electrode 53 in power application It is just had been switched on when the Schottky diode voltage that trench bottom integrates is less than 1 volt, free wheeling path is provided, this is far below traditional slot The cut-in voltage of gate MOSFET body diode.
In addition, comparing the traditional structure only pinch off at MOS channel, shape is gone back between the deep area P-well of the adjacent cellular of the device At JFET pinch off, Schottky contact electrode can also provide assisted depletion, therefore the structure has better short-circuit capacity.
Fig. 8 is 1 device I-V analogous diagram of embodiment, and wherein FS-TMOS is the I-V simulation curve of the embodiment of the present invention 1, C- TMOS is the I-V simulation curve of traditional Si C Grooved-gate MOSFET's device.Although from figure 8, it is seen that device described in embodiment 1 Forward conduction resistance ratio traditional Si C Grooved-gate MOSFET's device is slightly smaller, and both the first quartile performance of device of the present invention was slightly worse.But It is to apply the third quadrant cut-in voltage of device described in example 1 at 0.7 volt or so, and traditional Grooved-gate MOSFET's third quadrant cut-in voltage Close to 3 volts, i.e., the third quadrant performance of device architecture of the present invention is more excellent than traditional Si C Grooved-gate MOSFET's device.Above-mentioned emulation knot Fruit is consistent with theory analysis.
Embodiment 2
As shown in figure 3, the difference of the device architecture and embodiment 1 of the present embodiment is: grid 3 is split into two side grid, And side grid central filler has oxide layer 4.
Embodiment 3
As shown in figure 4, the present embodiment and 1 main distinction of embodiment are: grid 3 is split into two side grid, among the grid of side Filled with metal electrode, while source electrode 51 and Schottky contact electrode 53 being made to be linked into the same region, which is metal Electrode 54.There is oxide layer 4 between metal electrode 54 and grid 3.
Embodiment 4
As shown in figure 5, the difference of the present embodiment and embodiment 1 is: being equipped between grid 3 and Schottky contact electrode 53 Separate gate 31, and separate gate 31 and grid 3, Schottky contact electrode 53, N-type epitaxy layer 10, depth are filled out between the area P-well 22 It is isolated filled with the work of oxide layer 4.
Embodiment 5
As shown in fig. 6, the difference of the present embodiment and embodiment 1 is: the contact zone P+ 21 be located at the inside of the area P-body 20 and Positioned at 11 lower left of the contact zone N+, the contact zone P+ 21 and the contact zone N+ 11 pass through Ohmic contact formation source electrode 51.
Embodiment 6
As shown in fig. 7, the difference of the present embodiment and embodiment 1 is: 53 lower left of Schottky contact electrode is equipped with P- The area shield 23, and the area P-shield 23 and depth 22 phase of the area P-well from.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause This, all those of ordinary skill in the art are completed without departing from the spirit and technical ideas disclosed in the present invention All equivalent modifications or change, should be covered by the claims of the present invention.

Claims (7)

1. a kind of high reliability SiC MOSFET element, characterized by comprising: N-type substrate (12) is located on N-type substrate (12) The N-type epitaxy layer (10) of side is located at the area P-body (20) on the left side above N-type epitaxy layer (10), is located on the area P-body (20) The contact zone P+ (21) and the contact zone N+ (11) of side, the oxide layer (4) being located on the right side of the area P-body (20) and grid (3) are located at Schottky contact electrode (53) below grid (3), the deep area P-well (22) positioned at N-type epitaxy layer (10) top the right, The area Zhong Shen P-well (22) by the right side of oxide layer (4), on the right side of Schottky contact electrode (53) and part downside tight；P+ connects It touches area (21) and the contact zone N+ (11) and source electrode (51) is formed by Ohmic contact, the deep area P-well (22) is formed by Ohmic contact N-type substrate (12) below source electrode (51), device forms drain electrode (52) by Ohmic contact；Source electrode (51) and schottky junctions are got an electric shock Pole (53) is connected by domain mode, so that the two current potential is equal.
2. a kind of high reliability SiC MOSFET element according to claim 1, it is characterised in that: grid (3) is split into Two side grid, and side grid central filler has oxide layer (4).
3. a kind of high reliability SiC MOSFET element according to claim 1, it is characterised in that: grid (3) is split into Two side grid, side grid central filler have metal that source electrode (51) and Schottky contact electrode (53) is made to be linked into the same region, The region is metal electrode (54), there is oxide layer (4) between metal electrode (54) and grid (3).
4. a kind of high reliability SiC MOSFET element according to claim 1, it is characterised in that: grid (3) and Xiao Te Base contacts and is equipped with separate gate (31) between electrode (53), and separate gate (31) and grid (3), Schottky contact electrode (53), N-type Make to be isolated filled with oxide layer (4) between epitaxial layer (10), the depth area P-well (22).
5. a kind of high reliability SiC MOSFET element according to claim 1, it is characterised in that: the contact zone P+ (21) position In the area P-body (20) inside and it is located at the contact zone N+ (11) lower left, the contact zone P+ (21) and the contact zone N+ (11) pass through ohm Contact forms source electrode (51).
6. a kind of high reliability SiC MOSFET element according to claim 1, it is characterised in that: Schottky contact electrode (53) lower left is equipped with the area P-shield (23), and the area P-shield (23) and the depth area P-well (22) mutually from.
7. a kind of high reliability SiC MOSFET element described in any one according to claim 1~6, it is characterised in that: institute Stating each doping type in device accordingly becomes opposite doping, i.e., n-type doping becomes p-type while p-type doping becomes n-type doping Doping.
CN201811094670.9A 2018-09-19 2018-09-19 A kind of high reliability SiC MOSFET element Pending CN109244137A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811094670.9A CN109244137A (en) 2018-09-19 2018-09-19 A kind of high reliability SiC MOSFET element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811094670.9A CN109244137A (en) 2018-09-19 2018-09-19 A kind of high reliability SiC MOSFET element

Publications (1)

Publication Number Publication Date
CN109244137A true CN109244137A (en) 2019-01-18

Family

ID=65058227

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811094670.9A Pending CN109244137A (en) 2018-09-19 2018-09-19 A kind of high reliability SiC MOSFET element

Country Status (1)

Country Link
CN (1) CN109244137A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111384153A (en) * 2020-03-20 2020-07-07 电子科技大学 SGT device with grounded P-type region and preparation method thereof
CN111446293A (en) * 2020-03-25 2020-07-24 浙江大学 Silicon carbide power MOSFET device of enhanced body diode
CN111933711A (en) * 2020-08-18 2020-11-13 电子科技大学 SBD integrated super-junction MOSFET
CN112018162A (en) * 2019-05-29 2020-12-01 西安电子科技大学 4H-SiC side gate integrated SBD MOSFET device and preparation method thereof
WO2021128748A1 (en) * 2019-12-26 2021-07-01 株洲中车时代半导体有限公司 Cellular structure of silicon carbide mosfet device and power semiconductor device
CN114038908A (en) * 2021-11-30 2022-02-11 电子科技大学 Diode-integrated trench gate silicon carbide MOSFET device and manufacturing method thereof
CN117238968A (en) * 2023-11-10 2023-12-15 安建科技(深圳)有限公司 Trench gate silicon carbide MOSFET device and preparation method thereof

Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1054451A2 (en) * 1999-05-19 2000-11-22 Intersil Corporation MOS-gated power device having extended trench and doping zone and process for forming same
CN1540770A (en) * 2003-04-23 2004-10-27 株式会社东芝 Semiconductor device and its mfg. method
CN1547765A (en) * 2001-08-23 2004-11-17 通用半导体公司 Trench dmos transistor with embedded trench schottky rectifier
US20070152268A1 (en) * 2005-11-28 2007-07-05 Frank Hille Semiconductor component and method
JP2007317683A (en) * 2006-05-23 2007-12-06 Shindengen Electric Mfg Co Ltd Semiconductor device
CN101236989A (en) * 2007-01-30 2008-08-06 万国半导体股份有限公司 Split gate with different gate materials and work functions to reduce gate resistance of ultra high density MOSFET
CN103107193A (en) * 2011-11-11 2013-05-15 上海华虹Nec电子有限公司 Grooved type insulated gate field effect transistor
CN103875076A (en) * 2011-11-28 2014-06-18 富士电机株式会社 Insulated gate semiconductor device and method for manufacturing same
CN103890954A (en) * 2011-10-18 2014-06-25 丰田自动车株式会社 Semiconductor device and method of producing the same
CN103928524A (en) * 2014-04-21 2014-07-16 西安电子科技大学 Silicon carbide UMOSFET device with N-type drifting layer table face and manufacturing method
CN105027292A (en) * 2013-04-11 2015-11-04 富士电机株式会社 Semiconductor device and semiconductor device manufacturing method
CN205752183U (en) * 2016-05-24 2016-11-30 无锡同方微电子有限公司 The separate gate MOSFET element structure of voltage endurance capability can be improved
CN206059399U (en) * 2016-08-31 2017-03-29 上海格瑞宝电子有限公司 A kind of trench schottky diode
CN107170801A (en) * 2017-06-08 2017-09-15 电子科技大学 A kind of shield grid VDMOS device for improving avalanche capability
CN107248532A (en) * 2017-06-08 2017-10-13 电子科技大学 A kind of superjunction DMOS devices
CN107799582A (en) * 2017-10-20 2018-03-13 电子科技大学 A kind of trench gate electric charge memory type insulated gate bipolar transistor and its manufacture method
CN108183131A (en) * 2017-12-05 2018-06-19 中国电子科技集团公司第五十五研究所 A kind of unilateral MOS type device preparation method of integrated SBD structures

Patent Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1054451A2 (en) * 1999-05-19 2000-11-22 Intersil Corporation MOS-gated power device having extended trench and doping zone and process for forming same
CN1547765A (en) * 2001-08-23 2004-11-17 通用半导体公司 Trench dmos transistor with embedded trench schottky rectifier
CN1540770A (en) * 2003-04-23 2004-10-27 株式会社东芝 Semiconductor device and its mfg. method
US20070152268A1 (en) * 2005-11-28 2007-07-05 Frank Hille Semiconductor component and method
JP2007317683A (en) * 2006-05-23 2007-12-06 Shindengen Electric Mfg Co Ltd Semiconductor device
CN101236989A (en) * 2007-01-30 2008-08-06 万国半导体股份有限公司 Split gate with different gate materials and work functions to reduce gate resistance of ultra high density MOSFET
CN103890954A (en) * 2011-10-18 2014-06-25 丰田自动车株式会社 Semiconductor device and method of producing the same
CN103107193A (en) * 2011-11-11 2013-05-15 上海华虹Nec电子有限公司 Grooved type insulated gate field effect transistor
CN103875076A (en) * 2011-11-28 2014-06-18 富士电机株式会社 Insulated gate semiconductor device and method for manufacturing same
CN105027292A (en) * 2013-04-11 2015-11-04 富士电机株式会社 Semiconductor device and semiconductor device manufacturing method
CN103928524A (en) * 2014-04-21 2014-07-16 西安电子科技大学 Silicon carbide UMOSFET device with N-type drifting layer table face and manufacturing method
CN205752183U (en) * 2016-05-24 2016-11-30 无锡同方微电子有限公司 The separate gate MOSFET element structure of voltage endurance capability can be improved
CN206059399U (en) * 2016-08-31 2017-03-29 上海格瑞宝电子有限公司 A kind of trench schottky diode
CN107170801A (en) * 2017-06-08 2017-09-15 电子科技大学 A kind of shield grid VDMOS device for improving avalanche capability
CN107248532A (en) * 2017-06-08 2017-10-13 电子科技大学 A kind of superjunction DMOS devices
CN107799582A (en) * 2017-10-20 2018-03-13 电子科技大学 A kind of trench gate electric charge memory type insulated gate bipolar transistor and its manufacture method
CN108183131A (en) * 2017-12-05 2018-06-19 中国电子科技集团公司第五十五研究所 A kind of unilateral MOS type device preparation method of integrated SBD structures

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
XUAN LI: "SiC Trench MOSFET With Integrated Self-Assembled Three-Level Protection Schottky Barrier Diode", 《IEEE TRANSACTIONS ON ELECTRON DEVICES》 *

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112018162A (en) * 2019-05-29 2020-12-01 西安电子科技大学 4H-SiC side gate integrated SBD MOSFET device and preparation method thereof
CN112018162B (en) * 2019-05-29 2021-11-02 西安电子科技大学 4H-SiC side gate integrated SBD MOSFET device and preparation method thereof
WO2021128748A1 (en) * 2019-12-26 2021-07-01 株洲中车时代半导体有限公司 Cellular structure of silicon carbide mosfet device and power semiconductor device
CN111384153A (en) * 2020-03-20 2020-07-07 电子科技大学 SGT device with grounded P-type region and preparation method thereof
CN111446293A (en) * 2020-03-25 2020-07-24 浙江大学 Silicon carbide power MOSFET device of enhanced body diode
CN111933711A (en) * 2020-08-18 2020-11-13 电子科技大学 SBD integrated super-junction MOSFET
CN114038908A (en) * 2021-11-30 2022-02-11 电子科技大学 Diode-integrated trench gate silicon carbide MOSFET device and manufacturing method thereof
CN114038908B (en) * 2021-11-30 2023-05-26 电子科技大学 Diode-integrated trench gate silicon carbide MOSFET device and method of manufacture
CN117238968A (en) * 2023-11-10 2023-12-15 安建科技(深圳)有限公司 Trench gate silicon carbide MOSFET device and preparation method thereof
CN117238968B (en) * 2023-11-10 2024-03-15 安建科技(深圳)有限公司 Trench gate silicon carbide MOSFET device and preparation method thereof

Similar Documents

Publication Publication Date Title
CN109244137A (en) A kind of high reliability SiC MOSFET element
CN109244136A (en) Slot bottom Schottky contacts SiC MOSFET element
CN108389902B (en) Reverse conducting IGBT with back groove grid
CN109256427A (en) A kind of SiC MOSFET element of integrated schottky diode
CN113130627B (en) Silicon carbide fin-shaped gate MOSFET integrated with channel diode
CN110767753B (en) SiC power device
CN107808899B (en) Lateral power device with mixed conduction mode and preparation method thereof
CN109904155B (en) Silicon carbide MOSFET device integrated with high-speed reverse freewheeling diode
CN106206705B (en) A kind of RC-IGBT with double grid
CN108899370A (en) The VDMOS device in integrated resistor area
CN110518065A (en) The groove-shaped silicon carbide MOSFET device of low power consumption and high reliability
CN113471290B (en) Tunneling-assisted conduction silicon/silicon carbide heterojunction MOSFET power device
CN112420694B (en) Reversible conduction silicon carbide JFET power device integrated with reverse Schottky freewheel diode
CN112687744B (en) Planar silicon carbide reverse-resistance MOSFET device and preparation method thereof
CN112687746B (en) Silicon carbide planar MOSFET device and preparation method thereof
CN103489910A (en) Power semiconductor device and manufacturing method thereof
CN109119419A (en) A kind of integrated schottky freewheeling diode silicon carbide tank gate MOSFET
CN109860171B (en) Bipolar silicon carbide semiconductor power device integrated with high-speed reverse freewheeling diode
CN109244138A (en) SiC MOSFET element with good third quadrant performance
CN116646401B (en) Silicon carbide heterojunction cascode MOSFET device
CN107516679B (en) Deep-groove super-junction DMOS device
CN113437141A (en) Floating P-region CSTBT device with polysilicon diode grid structure
CN111933711A (en) SBD integrated super-junction MOSFET
CN103928507B (en) A kind of inverse conductivity type double grid insulated gate bipolar transistor
CN108122962B (en) Insulated gate bipolar transistor

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20190118