CN109239567B - Detection system for simultaneously pairing multiple MOS tubes - Google Patents
Detection system for simultaneously pairing multiple MOS tubes Download PDFInfo
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- CN109239567B CN109239567B CN201811187774.4A CN201811187774A CN109239567B CN 109239567 B CN109239567 B CN 109239567B CN 201811187774 A CN201811187774 A CN 201811187774A CN 109239567 B CN109239567 B CN 109239567B
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
The utility model provides a detection system for simultaneously pairing a plurality of MOS tubes, which comprises an upper computer, an MCU control module, an ADC module, a DAC module, a current sampling module, a voltage sampling module, a constant voltage source control module and a constant current source control module; the current sampling module and the voltage sampling module are connected with the ADC module; the constant voltage source control module and the constant current source control module are connected with the DAC module; the ADC module and the DAC module are connected with the MCU control module; the MCU control module is connected with the upper computer. The utility model has the advantages that: the test speed is high, and the test efficiency is high; an alarm can be sent out in time; the MOS tube to be tested can be prevented from being broken down in the test process; the amount of information available after testing is large.
Description
Technical Field
The utility model relates to the technical field of electronics, in particular to a detection system for simultaneously pairing a plurality of MOS tubes.
Background
In the practical application of high-power products, a single MOS tube often generates heat seriously due to overlarge power born in product design, so that a plurality of MOS tubes are often required to be connected in parallel for use. However, when a plurality of MOS transistors are used in parallel, due to inconsistent turn-on voltage and turn-on resistance of the MOS transistors, a certain MOS transistor in parallel is turned on, and the rest MOS transistors are not turned on, which causes a phenomenon of unbalanced current, and causes that the turned-on MOS transistor bears a large current, so that breakdown and burnout phenomena may occur, and equipment is caused to malfunction.
Through searching, the application date is 2014.05.13, and the Chinese patent application number is 201420256890.8 discloses a simple MOS tube detector, and the testing principle of the MOS tube detector is as follows: the MOS tube is fixed on a support of a simple MOS tube detector, and then a power supply is turned on to judge whether breakdown occurs or not by observing a small lamp load on the detector. Although the quality and the type of the MOS tube can be detected by the simple MOS tube detector, the following problems exist: 1. when specifically testing MOS tubes, a plurality of MOS tubes cannot be tested at the same time, so that the test efficiency is extremely low; 2. during testing, when the MOS tube is inserted in error (such as reverse connection), no related protection measures exist, visual judgment cannot be performed during reverse connection, and the MOS tube is broken down easily, so that the MOS tube is damaged; 3. when testing the MOS tube, the parameters which can be detected are fewer, and the information which can be obtained is also fewer.
Disclosure of Invention
The utility model aims to solve the technical problem of providing a detection system for simultaneously pairing a plurality of MOS tubes, and the detection system can effectively overcome the defects of low test efficiency, easy breakdown of the MOS tubes in the test process and less available information in the prior art.
The utility model is realized in the following way: the detection system comprises an upper computer, an MCU control module, an ADC module, a DAC module, a current sampling module, a voltage sampling module, a constant voltage source control module and a constant current source control module; the current sampling module and the voltage sampling module are connected with the ADC module; the constant voltage source control module and the constant current source control module are connected with the DAC module; the ADC module and the DAC module are connected with the MCU control module; the MCU control module is connected with the upper computer; the current sampling module is provided with a plurality of current sampling channels, and the voltage sampling module is provided with a plurality of voltage sampling channels; the constant voltage source control module is provided with a plurality of voltage setting channels, and the constant current source control module is provided with a plurality of current limiting channels.
Further, the detection system also comprises a reverse connection alarm module, and the reverse connection alarm module is connected with the MCU control module; the reverse connection alarm module is provided with a plurality of alarm channels.
Further, the current sampling module is provided with four current sampling channels, and the voltage sampling module is provided with four voltage sampling channels; the constant voltage source control module is provided with four voltage setting channels, and the constant current source control module is provided with four current limiting channels; the reverse connection alarm module is provided with four alarm channels.
Further, the current sampling module comprises four current operational amplifier circuits; and the sampling end of each current operational amplification circuit is connected with the drain electrode of the MOS tube to be detected, the output end of each current operational amplification circuit is connected with the ADC module, and the sampled tiny current quantity of the drain electrode of the MOS tube to be detected is converted into corresponding voltage quantity through each current operational amplification circuit and is transmitted to the ADC module.
Further, the voltage sampling module comprises four voltage operational amplification circuits, sampling ends of each voltage operational amplification circuit are connected with a drain electrode and a source electrode of a MOS tube to be detected, output ends of each voltage operational amplification circuit are connected with the ADC module, and tiny voltage variation between the drain electrode and the source electrode of the sampled MOS tube to be detected is converted into high voltage by the voltage operational amplification circuits and is transmitted to the ADC module.
Further, the constant voltage source control module comprises a constant voltage source operational amplification circuit, the input end of the constant voltage source operational amplification circuit is connected with the DAC module, the output end of the constant voltage source operational amplification circuit is respectively connected with the grid electrode of each MOS tube to be detected, and the constant voltage source operational amplification circuit converts the small voltage provided by the DAC module into high voltage and outputs the high voltage to the grid electrode of each MOS tube to be detected.
Further, the constant current source control module comprises a proportional integral regulating circuit, the input end of the proportional integral regulating circuit is connected with the DAC module, the input end of the proportional integral regulating circuit is respectively connected with the grid electrodes of the MOS tubes to be detected, and the voltage provided by the proportional integral regulating circuit according to the DAC module is converted into corresponding current amounts and then is output to the grid electrodes of the MOS tubes to be detected.
Further, the reverse connection alarm module comprises four light emitting diodes and four NPN triodes; the positive electrode of each light emitting diode is connected with the drain electrode of the MOS tube to be detected, and the negative electrode of each light emitting diode is connected with the drain electrode of one NPN triode; and the grid electrode of each NPN triode is connected with the MCU control module, and the source electrode of each NPN triode is grounded.
Further, the MCU control module adopts a TM4C1294NCPDT chip.
Further, the ADC module adopts an ADUCM360 chip, and the DAC module adopts an AD5689 chip.
The utility model has the following advantages: 1. the multiple channels are arranged, so that multiple MOS tubes can be detected at the same time, and the test speed and the test efficiency are high; 2. the reverse connection alarm module is arranged, so that when the MOS tube is in reverse connection, an alarm can be sent out timely, and the problem can be seen visually by a tester; 3. the voltage provided by the DAC module can be converted into a corresponding current value through the proportional integral regulating circuit, and the maximum value of the drain current of the MOS tube to be tested is limited through the current value, so that the MOS tube to be tested can be prevented from being broken down in the testing process; 4. the upper computer can dynamically display the on-resistance and the drain current of a plurality of MOS tubes to be tested under different grid voltages on the operation interface according to the data transmitted by the MCU control module, and after the test is finished, the upper computer automatically performs grouping pairing according to the on-voltage and the on-resistance of the MOS tubes to be tested, automatically draws transfer characteristic curves and output characteristic curves of the MOS tubes to be tested and automatically amplifies curve areas near the on-voltage of the MOS tubes to be tested, so that the information quantity obtained after the test is more.
Drawings
The utility model will be further described with reference to examples of embodiments with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a detection system for simultaneously pairing a plurality of MOS transistors according to the present utility model.
Fig. 2 is a circuit diagram of a current operational amplifier circuit according to the present utility model.
Fig. 3 is a circuit diagram of a voltage operational amplifier circuit according to the present utility model.
Fig. 4 is a circuit diagram of the constant voltage source operational amplifier circuit in the present utility model.
Fig. 5 is a circuit diagram of a proportional-integral regulating circuit in the present utility model.
Fig. 6 is a circuit diagram of the reverse connection alarm module in the present utility model.
Fig. 7 is a circuit diagram of a DAC module according to the present utility model.
Reference numerals illustrate:
the system comprises a 100-detection system, a 1-upper computer, a 2-MCU control module, a 3-ADC module, a 4-DAC module, a 5-current sampling module, a 51-current sampling channel, a 52-current operational amplification circuit, a 6-voltage sampling module, a 61-voltage sampling channel, a 62-voltage operational amplification circuit, a 7-constant voltage source control module, a 71-voltage setting channel, a 72-constant voltage source operational amplification circuit, an 8-constant current source control module, a 81-current limiting channel, a 82-proportional integral regulating circuit, a 9-reverse connection alarm module, a 91-alarm channel, a 92-light emitting diode and a 93-NPN triode.
Detailed Description
Referring to fig. 1 to 7, a detection system 100 for simultaneously pairing a plurality of MOS transistors according to the present utility model includes a host computer 1, an MCU control module 2, an ADC module 3, a DAC module 4, a current sampling module 5, a voltage sampling module 6, a constant voltage source control module 7, and a constant current source control module 8; the current sampling module 5 and the voltage sampling module 6 are connected with the ADC module 3; the constant voltage source control module 7 and the constant current source control module 8 are connected with the DAC module 4; the ADC module 3 and the DAC module 4 are connected with the MCU control module 2; the MCU control module 2 is connected with the upper computer 1; the current sampling module 5 is provided with a plurality of current sampling channels 51, and the voltage sampling module 6 is provided with a plurality of voltage sampling channels 61; the constant voltage source control module 7 is provided with a plurality of voltage setting channels 71, and the constant current source control module 8 is provided with a plurality of current limiting channels 81.
The upper computer 1 may be connected to the MCU control module 2 through an ethernet, and in a specific implementation, the upper computer 1 may set a gate voltage test range, a voltage step value, a step time, a maximum limit value of a drain current of each MOS transistor to be tested (not shown), and the like of each MOS transistor to be tested, and issue the relevant settings to the MCU control module 2. The MCU control module 2 mainly can realize the following functions: 1. the device is communicated with the upper computer 1, receives a setting instruction and the like issued by the upper computer 1, and controls the level output of the DAC module 4 according to the received instruction; 2. the digital signal transmitted from the ADC module 3 is processed and transmitted to the upper computer 1 through the Ethernet. The current sampling module 5 is used for sampling drain currents of the MOS transistors to be tested in real time; the voltage sampling module 6 is used for sampling the voltage value between the drain electrode and the source electrode of each MOS tube to be tested in real time. The ADC module 3 is used for converting the analog quantity transmitted by the current sampling module 5 and the voltage sampling module 6 into a digital quantity and transmitting the digital quantity to the MCU control module 2; the DAC module 4 (shown in fig. 7) is used for outputting a specific voltage with high precision according to the signal transmitted by the MCU control module 2, and providing the specific voltage to the constant voltage source control module 7 and the constant current source control module 8 for use. The constant voltage source control module 7 is used for converting the small voltage transmitted by the DAC module 4 into large voltage and outputting the large voltage to each MOS tube to be tested; the constant current source control module 8 is used for converting the voltage quantity transmitted by the DAC module 4 into current quantity, so as to control the maximum value of drain current of each MOS tube to be tested, and protect the MOS tube to be tested.
The detection system 100 further comprises a reverse connection alarm module 9, and the reverse connection alarm module 9 is connected with the MCU control module 2; the reverse connection alarm module 9 is provided with a plurality of alarm channels 91. In the specific implementation, when the condition that the MOS tube to be tested is reversely connected occurs, the reverse connection alarm module 9 gives an alarm so as to facilitate the testers to judge the problem in time and solve the problem in time.
In the preferred embodiment of the present utility model, the current sampling module 5 is provided with four current sampling channels 51, and the voltage sampling module 6 is provided with four voltage sampling channels 61; the constant voltage source control module 7 is provided with four voltage setting channels 71, and the constant current source control module 8 is provided with four current limiting channels 81; the reverse connection alarm module 9 is provided with four alarm channels 91. Of course, the detection of four MOS transistors to be tested simultaneously by setting four channels is a preferred embodiment of the present utility model, but the present utility model is not limited to this, and in the specific implementation, the specific number of channels may be set according to the actual detection requirement.
Referring to fig. 2, the current sampling module 5 includes four current operational amplifier circuits 52; the sampling end of each current operational amplification circuit 52 is connected with the drain electrode of a MOS transistor to be detected, the output end of each current operational amplification circuit 52 is connected with the ADC module 3, and the sampled micro current amount of the drain electrode of the MOS transistor to be detected is converted into a corresponding voltage amount by each current operational amplification circuit 52 and is transmitted to the ADC module 3. In practical implementation, each of the current operational amplifier circuits 52 is composed of a high-precision operational amplifier (e.g., U1B in fig. 2) and a precision resistor (e.g., R4, R9, R13 in fig. 2), and the composed current operational amplifier circuit 52 has a high-precision output function, so that the sampled minute current amount can be accurately converted into a corresponding voltage amount.
Referring to fig. 3, the voltage sampling module 6 includes four voltage operational amplification circuits 62, wherein sampling ends of each voltage operational amplification circuit 62 are connected with a drain electrode and a source electrode of a MOS transistor to be detected, output ends of each voltage operational amplification circuit 62 are connected with the ADC module 3, and small voltage variation between the drain electrode and the source electrode of the MOS transistor to be detected is converted into high voltage by the voltage operational amplification circuit 62 and is transmitted to the ADC module 3. In practical implementation, each voltage operational amplifier circuit 62 is composed of a high-precision operational amplifier (such as U2B in fig. 3) and a precision resistor (such as R5, R7, R16 in fig. 3), and the composed voltage operational amplifier circuit 62 has a high-precision output function, so that a tiny voltage variation between the drain and the source can be accurately converted into a high voltage.
Referring to fig. 4, the constant voltage source control module 7 includes a constant voltage source operational amplifier circuit 72, an input end of the constant voltage source operational amplifier circuit 72 is connected to the DAC module 4, an output end of the constant voltage source operational amplifier circuit 72 is connected to the gate of each MOS transistor to be detected, and the constant voltage source operational amplifier circuit 72 converts the small voltage provided by the DAC module 4 into the high voltage and outputs the high voltage to the gate of each MOS transistor to be detected. In practical implementation, the constant voltage source operational amplifier circuit 72 is composed of a high-precision operational amplifier (such as U2A in fig. 4) and precision resistors (such as R20, R24, R23 in fig. 4), and the composed constant voltage source operational amplifier circuit 72 has a high-precision output function, so that the small voltage provided by the DAC module 4 can be accurately converted into a high voltage.
Referring to fig. 5, the constant current source control module 8 includes a proportional integral adjusting circuit 82, an input end of the proportional integral adjusting circuit 82 is connected to the DAC module 4, an input end of the proportional integral adjusting circuit 82 is respectively connected to the gates of the MOS transistors to be detected, and the proportional integral adjusting circuit 82 converts the voltage provided by the DAC module 4 into corresponding current amounts and outputs the corresponding current amounts to the gates of the MOS transistors to be detected. In practical implementation, the proportional-integral regulating circuit 82 is composed of a high-precision operational amplifier (such as U1A in fig. 5) and a precision resistor (such as R12, R15, R59 in fig. 5), and the composed proportional-integral regulating circuit 82 has a high-precision output function, so that the voltage provided by the DAC module 4 can be accurately converted into a corresponding current.
Referring to fig. 6, the reverse connection alarm module 9 includes four leds 92 and four NPN transistors 93; the positive electrode of each light emitting diode 92 is connected with the drain electrode of a MOS tube to be detected, and the negative electrode is connected with the drain electrode of an NPN triode 93; the gates of the NPN triodes 93 are connected to the MCU control module 2, and the sources of the NPN triodes 93 are grounded. When the MOS transistor to be tested works specifically, a voltage capable of completely conducting the MOS transistor is required to be set on the grid electrode of each MOS transistor to be tested, so that the conducting resistance of the MOS transistor to be tested is almost reduced to the minimum, and the MOS transistor to be tested is generally in milliohm level; in addition, the drain current of the MOS tube to be tested is also in microampere level during testing, so that the voltage difference between the drain and the source of the MOS tube to be tested is only a voltage quantity close to 0V, and the voltage difference is a low level for the MCU control module 2; when the MOS tube to be tested is reversely inserted, that is, the positions of the grid electrode and the source electrode of the MOS tube to be tested are exchanged, the MOS tube to be tested is not started, and the voltage difference between the drain electrode and the source electrode of the MOS tube to be tested is equal to a high level for the MCU control module 2, so that the MCU control module 2 can judge that the MOS tube to be tested is reversely connected, and then the corresponding alarm can be given through the reverse connection alarm module 9.
The MCU control module 2 adopts a TM4C1294NCPDT chip.
The ADC module 3 adopts an ADUCM360 chip, and the DAC module 4 adopts an AD5689 chip.
The working principle of the detection system of the utility model is as follows:
setting a grid voltage testing range, a voltage stepping value, a stepping time and a maximum limit value of drain current of the MOS tube to be tested and the like of the MOS tube to be tested at the upper computer, and sending a related set instruction to the MCU control module; after receiving the setting instruction, the MCU control module transmits the related setting to the DAC module, and the DAC module outputs the required voltage quantity for the constant current source control module and the constant voltage source control module to use;
when the constant voltage source control module receives the small voltage quantity provided by the DAC module, the small voltage quantity is converted into a large voltage quantity through the constant voltage source operational amplifying circuit and is output to the grid electrode of each MOS tube to be tested, so that the MOS tube to be tested is fully conducted; meanwhile, when the constant current source control module receives the voltage quantity provided by the DAC module, the voltage quantity is converted into a corresponding current value through the proportional integral regulating circuit, and the maximum value of the drain current of the MOS tube to be tested is limited through the current value, so that the drain current of the MOS tube to be tested is limited within the set value of a user even if the MOS tube to be tested is fully conducted, and the MOS tube to be tested can be prevented from being broken down in the test process;
then, the voltage sampling module converts the tiny voltage variation between the drain electrode and the source electrode of each sampled MOS tube to be detected into high voltage through each voltage operational amplification circuit and transmits the high voltage to the ADC module; meanwhile, the current sampling module converts the sampled tiny current amounts of the drain electrodes of the MOS tubes to be detected into corresponding voltage amounts through the current operational amplification circuits and transmits the voltage amounts to the ADC module; the ADC module converts analog signals transmitted by the voltage sampling module and the current sampling module into digital signals through an internal multi-channel sigma-delta analog-to-digital converter and transmits the digital signals to the MCU control module through serial communication; the MCU control module can process the digital signals transmitted by the ADC module and the alarm signals provided by the reverse connection alarm module in a unified way, and then transmit the processed digital signals back to the upper computer through Ethernet communication, so that the upper computer can dynamically display the conduction impedance and the drain current of each MOS tube to be tested under different grid voltages on an operation interface according to the data transmitted by the MCU control module, and after the test is finished, the MOS tubes to be tested are automatically matched in groups according to the starting voltage and the conduction impedance of the MOS tubes to be tested, a transfer characteristic curve and an output characteristic curve of each MOS tube to be tested are automatically drawn, and curve areas near the starting voltage of each MOS tube to be tested are automatically amplified, and a user can dynamically amplify the freely selected areas on the curves, so that the user can more intuitively see the difference of each MOS tube to be tested, the reliability and the safety of each MOS tube to be tested after the matching in the use process are ensured, and the test data of each time can be automatically stored in an Excel table.
In summary, the utility model has the following advantages: 1. the multiple channels are arranged, so that multiple MOS tubes can be detected at the same time, and the test speed and the test efficiency are high; 2. the reverse connection alarm module is arranged, so that when the MOS tube is in reverse connection, an alarm can be sent out timely, and the problem can be seen visually by a tester; 3. the voltage provided by the DAC module can be converted into a corresponding current value through the proportional integral regulating circuit, and the maximum value of the drain current of the MOS tube to be tested is limited through the current value, so that the MOS tube to be tested can be prevented from being broken down in the testing process; 4. the upper computer can dynamically display the on-resistance and the drain current of a plurality of MOS tubes to be tested under different grid voltages on the operation interface according to the data transmitted by the MCU control module, and after the test is finished, the upper computer automatically performs grouping pairing according to the on-voltage and the on-resistance of the MOS tubes to be tested, automatically draws transfer characteristic curves and output characteristic curves of the MOS tubes to be tested and automatically amplifies curve areas near the on-voltage of the MOS tubes to be tested, so that the information quantity obtained after the test is more.
While specific embodiments of the utility model have been described above, it will be appreciated by those skilled in the art that the specific embodiments described are illustrative only and not intended to limit the scope of the utility model, and that equivalent modifications and variations of the utility model in light of the spirit of the utility model will be covered by the claims of the present utility model.
Claims (6)
1. Detection system that pairs is carried out a plurality of MOS pipes simultaneously, its characterized in that: the device comprises an upper computer, an MCU control module, an ADC module, a DAC module, a current sampling module, a voltage sampling module, a constant voltage source control module and a constant current source control module; the current sampling module and the voltage sampling module are connected with the ADC module; the constant voltage source control module and the constant current source control module are connected with the DAC module; the ADC module and the DAC module are connected with the MCU control module; the MCU control module is connected with the upper computer; the current sampling module is provided with a plurality of current sampling channels, and the voltage sampling module is provided with a plurality of voltage sampling channels; the constant voltage source control module is provided with a plurality of voltage setting channels, and the constant current source control module is provided with a plurality of current limiting channels;
the system also comprises a reverse connection alarm module, wherein the reverse connection alarm module is connected with the MCU control module; the reverse connection alarm module is provided with a plurality of alarm channels;
the current sampling module is provided with four current sampling channels, and the voltage sampling module is provided with four voltage sampling channels; the constant voltage source control module is provided with four voltage setting channels, and the constant current source control module is provided with four current limiting channels; the reverse connection alarm module is provided with four alarm channels;
the current sampling module comprises four current operational amplifier circuits; the sampling end of each current operational amplification circuit is connected with the drain electrode of the MOS tube to be detected, the output end of each current operational amplification circuit is connected with the ADC module, and the sampling tiny current amount of the drain electrode of the MOS tube to be detected is converted into corresponding voltage amount through each current operational amplification circuit and is transmitted to the ADC module;
the voltage sampling module comprises four voltage operational amplification circuits, sampling ends of each voltage operational amplification circuit are connected with a drain electrode and a source electrode of a MOS tube to be detected, output ends of each voltage operational amplification circuit are connected with the ADC module, and the voltage operational amplification circuits are used for converting small voltage variation between the drain electrode and the source electrode of the sampled MOS tube to be detected into high voltage and transmitting the high voltage to the ADC module.
2. The detection system for simultaneously pairing a plurality of MOS transistors according to claim 1, wherein: the constant voltage source control module comprises a constant voltage source operational amplification circuit, the input end of the constant voltage source operational amplification circuit is connected with the DAC module, the output end of the constant voltage source operational amplification circuit is respectively connected with the grid electrode of each MOS tube to be detected, and the constant voltage source operational amplification circuit converts the small voltage quantity provided by the DAC module into high voltage quantity and outputs the high voltage quantity to the grid electrode of each MOS tube to be detected.
3. The detection system for simultaneously pairing a plurality of MOS transistors according to claim 1, wherein: the constant current source control module comprises a proportional integral regulating circuit, the input end of the proportional integral regulating circuit is connected with the DAC module, the input end of the proportional integral regulating circuit is respectively connected with the grid electrode of each MOS tube to be detected, and the voltage provided by the proportional integral regulating circuit according to the DAC module is converted into corresponding current quantity and then is output to the grid electrode of each MOS tube to be detected.
4. The detection system for simultaneously pairing a plurality of MOS transistors according to claim 1, wherein: the reverse connection alarm module comprises four light emitting diodes and four NPN triodes; the positive electrode of each light emitting diode is connected with the drain electrode of the MOS tube to be detected, and the negative electrode of each light emitting diode is connected with the drain electrode of one NPN triode; and the grid electrode of each NPN triode is connected with the MCU control module, and the source electrode of each NPN triode is grounded.
5. The detection system for simultaneously pairing a plurality of MOS transistors according to claim 1, wherein: the MCU control module adopts a TM4C1294NCPDT chip.
6. The detection system for simultaneously pairing a plurality of MOS transistors according to claim 1, wherein: the ADC module adopts an ADUCM360 chip, and the DAC module adopts an AD5689 chip.
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