CN109215557A - GOA driving circuit and display panel - Google Patents
GOA driving circuit and display panel Download PDFInfo
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- CN109215557A CN109215557A CN201811212530.7A CN201811212530A CN109215557A CN 109215557 A CN109215557 A CN 109215557A CN 201811212530 A CN201811212530 A CN 201811212530A CN 109215557 A CN109215557 A CN 109215557A
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- transistor
- pull
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- grid
- module
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
Abstract
The application provides a kind of GOA driving circuit and display panel, the GOA driving circuit is made of the cascade of multistage GOA unit, every level-one GOA unit is for driving one-row pixels unit, when prime GOA unit includes: pull-up control module, pull-up module, grade transmission module, pull-down module, pull down maintenance module, abnormal protection module and bootstrap capacitor, by increasing by an abnormal protection module, within the scan period of non-current row pixel unit, when an anomaly occurs, low level can will be maintained when the line scan signals of prime GOA unit and pull-up control signal, so as to improve the stability of GOA driving circuit.
Description
Technical field
This application involves field of display technology more particularly to a kind of GOA driving circuits and display panel.
Background technique
GOA (Gate Driver on Array, the driving of array substrate row) technology is by the TFT in GOA driving circuit
(Thin Film Transistor, thin film transistor) is integrated in array substrate, to save original be arranged in battle array
Grid-driving integrated circuit part outside column substrate reduces the cost of product in terms of material cost and processing step two.
It need to be tieed up whithin a period of time after the line scan signals of prime GOA unit in existing GOA driving circuit in output
Hold the low level of line scan signals.However, due to generation abnormal in GOA driving circuit, so that being exported in GOA driving circuit
After the line scan signals of prime GOA unit, the low level of line scan signals cannot be maintained, and then to the fortune of GOA driving circuit
It impacts.
Summary of the invention
The embodiment of the present application provides a kind of GOA driving circuit and display panel, can make when GOA circuit occurs abnormal
It obtains in GOA driving circuit in output after the line scan signals of prime GOA unit, maintains the low level of line scan signals.
The embodiment of the present application provides a kind of GOA driving circuit, and the GOA driving circuit is made of the cascade of multistage GOA unit,
Every level-one GOA unit is for driving one-row pixels unit, when prime GOA unit includes:
Control module is pulled up, for according to the line scan signals exported by upper level GOA unit and grade communication received
Number, output pull-up control signal；
Pull-up module is connected with the pull-up control module, for controlling signal according to the pull-up, by what is received
High frequency clock signal output is when the line scan signals of prime GOA unit；
Grade transmission module, is connected with the pull-up control module, for controlling signal according to the pull-up, by the reception
The high frequency clock signal output arrived is when the grade communication number of prime GOA unit；
Pull-down module is connected with the pull-up control module and the pull-up module, receives down for basis
The line scan signals of level-one GOA unit output, by the pull-up control signal and the row scanning letter for working as prime GOA unit
Number it is pulled down to low level simultaneously；
Maintenance module is pulled down, is connected with the pull-up control module and the pull-up module, in non-current row picture
In the scan period of plain unit, the pull-up is controlled into signal and described when the line scan signals of prime maintain low level；
Abnormal protection module is connect with the drop-down maintenance module, within the scan period of non-current row pixel unit,
When the pull-up controls abnormal signal, by pull-up control signal and described when the line scan signals of prime pull down again
To low level；And
Bootstrap capacitor, one end of the bootstrap capacitor connect the pull-up and control signal, the other end of the bootstrap capacitor
The connection line scan signals for working as prime GOA unit.
In GOA driving circuit described herein, the pull-up control module includes: the first transistor；
The grid of the first transistor connects the grade communication number exported by the upper level GOA unit, and described first is brilliant
The source electrode of body pipe connects the line scan signals exported by the upper level GOA unit, and the drain electrode of the first transistor exports institute
State pull-up control signal.
In GOA driving circuit described herein, the pull-up module includes: second transistor；
The grid of the second transistor connects the pull-up and controls signal, described in the source electrode of the second transistor connects
High frequency clock signal, the drain electrode of the second transistor even export the line scan signals for working as prime GOA unit.
In GOA driving circuit described herein, the grade transmission module includes: third transistor；
The grid of the third transistor connects the pull-up and controls signal, described in the source electrode of the third transistor connects
High frequency clock signal, the drain electrode of the third transistor even export the grade communication number for working as prime GOA unit.
In GOA driving circuit described herein, the pull-down module includes: the 4th transistor and the 5th transistor；
The grid of 4th transistor and the grid of the 5th transistor are all connected with defeated by the next stage GOA unit
Line scan signals out；The source electrode of 4th transistor and the source electrode of the 5th transistor are all connected with low power supply signal；Institute
State the drain electrode connection line scan signals for working as prime GOA unit of the 4th transistor, the drain electrode connection of the 5th transistor
The pull-up controls signal.
In GOA driving circuit described herein, the drop-down maintenance module includes: the first drop-down maintenance unit and the
Two drop-down maintenance units；The first drop-down maintenance unit and the second drop-down maintenance unit work alternatively；
It is described first drop-down maintenance unit include: the 6th transistor, the 7th transistor, the 8th transistor, the 9th transistor,
Tenth transistor, the 11st transistor；
The source electrode of the grid of 6th transistor, source electrode and the 7th transistor is all connected with the first high frequency clock letter
Number；The drain electrode of the drain electrode of 6th transistor, the grid of the 7th transistor and the 8th transistor is connected with each other；
The drain electrode of 7th transistor, the drain electrode of the 9th transistor, the tenth transistor grid and the described 11st
The grid of transistor maintains node to connect with the first drop-down；The grid of 8th transistor and the grid of the 9th transistor
Extremely it is connect with pull-up control signal；The source electrode of 8th transistor, the source electrode of the 9th transistor, the described tenth
The source electrode of the source electrode of transistor and the 11st transistor is all connected with low power supply signal；The drain electrode of tenth transistor connects
Connect the line scan signals for working as prime GOA unit；The drain electrode of 11st transistor connects the pull-up and controls signal；
The second drop-down maintenance unit includes: the tenth two-transistor, the 13rd transistor, the 14th transistor, the tenth
Five transistors, the 16th transistor, the 17th transistor；
When the source electrode of the grid of tenth two-transistor, source electrode and the 13rd transistor is all connected with the second high frequency
Clock signal；The drain electrode of tenth two-transistor, the leakage of the grid and the 14th transistor of the 13rd transistor
Pole is connected with each other；The drain electrode of 13rd transistor, the drain electrode of the 15th transistor, the 16th transistor grid
The grid of pole and the 17th transistor maintains node to connect with the second drop-down；The grid of 14th transistor with
The grid of 15th transistor is connect with pull-up control signal；The source electrode of 14th transistor, described
The source electrode of the source electrode of 15 transistors, the source electrode of the 16th transistor and the 17th transistor is all connected with low power supply
Signal；The drain electrode connection line scan signals for working as prime GOA unit of 16th transistor；17th transistor
Drain electrode connect pull-up control signal；
First low-frequency clock signal and second low-frequency clock signal are that the antipodal low frequency of two phases is believed
Number source.
In GOA driving circuit described herein, the abnormal protection module includes: the 17th transistor；
The row scanning of grid connection all GOA units after prime GOA unit of 18th transistor
Signal, the source electrode source electrode of the 18th transistor connect the pull-up and control signal, and the drain electrode of the 17th transistor connects
Connecing first drop-down maintains node and second drop-down to maintain node.
In GOA driving circuit described herein, in the first order connection relationship of the GOA driving circuit, it is described on
Control module is drawn to connect the circuit start signal being also used to according to receiving, output pull-up control signal.
It is described in the afterbody connection relationship of the GOA driving circuit in GOA driving circuit described herein
Pull-down module is also used to the line scan signals according to the second level GOA unit received, and the pull-up is controlled signal and institute
It states the line scan signals of afterbody GOA unit while being pulled down to low level.
The embodiment of the present application also provides a kind of display panel, and spy includes above-described GOA driving circuit.
The invention has the benefit that GOA driving circuit provided by the invention and display panel, by increasing by an abnormal guarantor
Module is protected, within the scan period of non-current row pixel unit, when an anomaly occurs, can will be scanned when the row of prime GOA unit
Signal and pull-up control signal maintain low level, so as to improve the stability of GOA driving circuit.
Detailed description of the invention
It, below will be to embodiment or the prior art in order to illustrate more clearly of embodiment or technical solution in the prior art
Attached drawing needed in description is briefly described, it should be apparent that, the accompanying drawings in the following description is only some of invention
Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these
Figure obtains other attached drawings.
Fig. 1 is the GOA driving circuit structure schematic diagram of the embodiment of the present application；
Fig. 2 is the single step arrangement schematic diagram of the GOA driving circuit of the embodiment of the present application；
Fig. 3 is the single-level circuit schematic diagram of GOA driving circuit shown in Fig. 2；
Fig. 4 is the time diagram of the single-level circuit of GOA driving circuit shown in Fig. 3；
Fig. 5 is the single-stage framework first order connection relationship diagram of the GOA driving circuit of the embodiment of the present application；
Fig. 6 is the single-stage framework afterbody connection relationship diagram of the GOA driving circuit of the embodiment of the present application.
Specific embodiment
Embodiments of the present invention are described below in detail, the example of the embodiment is shown in the accompanying drawings, wherein from beginning
Same or similar element or element with the same or similar functions are indicated to same or similar label eventually.Below by ginseng
The embodiment for examining attached drawing description is exemplary, and for explaining only the invention, and is not considered as limiting the invention.
In the description of the present invention, term " first ", " second " are used for description purposes only, and should not be understood as instruction or dark
Show relative importance or implicitly indicates the quantity of indicated technical characteristic.The feature of " first ", " second " is defined as a result,
It can explicitly or implicitly include one or more feature.In the description of the present invention, the meaning of " plurality " is
Two or more, unless otherwise specifically defined.
Following disclosure provides many different embodiments or example is used to realize different structure of the invention.In order to
Simplify disclosure of the invention, hereinafter the component of specific examples and setting are described.Certainly, they are merely examples, and
And it is not intended to limit the present invention.In addition, the present invention can in different examples repeat reference numerals and/or reference letter,
This repetition is for purposes of simplicity and clarity, itself not indicate between discussed various embodiments and/or setting
Relationship.
Fig. 1, Fig. 2 are please referred to, Fig. 1 is the GOA driving circuit structure schematic diagram of the embodiment of the present application；Fig. 2 is that the application is real
Apply the single step arrangement schematic diagram of the GOA driving circuit of example.As shown in Figure 1, Figure 2, the GOA driving circuit 10 of the embodiment of the present application
It is made of multistage GOA unit grade 100, every level-one GOA unit 100 is for driving one-row pixels unit 200, when prime GOA is mono-
Member 100 includes: pull-up control module 101, pull-up module 102, grade transmission module 103, pull-down module 104, drop-down maintenance module
105, abnormal protection module 106 and bootstrap capacitor Cbt.
Please continue to refer to Fig. 2, pulls up control module 101 and be used for according to the row exported by upper level GOA unit received
Scanning letter G (N-1) and grade communication ST (N-1), output pull-up control signal Q (N).
Pull-up module 102 is connected with pull-up control module 101, for controlling signal Q (N) according to pull-up, will receive
High frequency clock signal CK output for when prime GOA unit line scan signals G (N).
Grade transmission module 103 is connected with pull-up control module 101, for controlling signal Q (N) according to pull-up, will receive
High frequency clock signal CK output for when prime GOA unit grade communication ST (N).
Pull-down module 104 is connected with pull-up control module 101 and pull-up module 102, receives down for basis
The line scan signals G (N-1) of level-one GOA unit output, by pull-up control signal Q (N) and when the row of prime GOA unit scans
Signal G (N) is pulled down to low level simultaneously.
Drop-down maintenance module 105 is connected with pull-up control module 101 and pull-up module 102, in non-current row picture
In the scan period of plain unit, by pull-up control signal Q (N) and when the line scan signals G (N) of prime maintains low level.
Abnormal protection module 106 is connect, for the scan period in non-current row pixel unit with drop-down maintenance module 105
It is interior, when pull-up control signal Q (N) is abnormal, by pull-up control signal Q (N) and when prime line scan signals G (N) again
It is pulled down to low level.The other end connection of one end connection pull-up control signal Q (N) of bootstrap capacitor Cbt, bootstrap capacitor Cbt is worked as
The line scan signals G (N) of prime GOA unit.
Further, referring to Fig. 3, Fig. 3 is the single-level circuit schematic diagram of GOA driving circuit shown in Fig. 2.Such as Fig. 3 institute
Show, which includes: the first transistor T1；The grid connection of the first transistor T1 is defeated by upper level GOA unit
The source electrode of grade communication ST (N-1) out, the first transistor T1 connect the line scan signals G (N- exported by upper level GOA unit
1), drain electrode output pull-up control signal Q (N) of the first transistor T1.
The pull-up module 102 includes: second transistor T2；The grid connection pull-up control signal Q of second transistor T2
(N), the source electrode of second transistor T2 connects high frequency clock signal CK, and the drain electrode of second transistor T2 is even exported when prime GOA is mono-
The line scan signals G (N) of member.
This grade of transmission module 103 includes: third transistor T3；The grid connection pull-up control signal Q of third transistor T3
(N), the source electrode of third transistor T3 connects high frequency clock signal CK, and the drain electrode of third transistor T3 is even exported when prime GOA is mono-
The grade communication G (N) of member.
The pull-down module 104 includes: the 4th transistor T4 and the 5th transistor T5；The grid and the 5th of 4th transistor T4
The grid of transistor T5 is all connected with the line scan signals exported by next stage GOA unit；The source electrode and the 5th of 4th transistor T4
The source electrode of transistor T5 is all connected with low power supply signal；Row scanning letter of the drain electrode connection of 4th transistor T4 when prime GOA unit
Number, the drain electrode connection pull-up control signal of the 5th transistor T5.
The drop-down maintenance module 105 includes: the first drop-down maintenance unit 1051 and the second drop-down maintenance unit 1052；Its
In,
The first drop-down maintenance unit 1051 includes: the 6th transistor T6, the 7th transistor T7, the 8th transistor T8, the
Nine transistor T9, the tenth transistor T10, the 11st transistor T11；Grid, source electrode and the 7th crystal of 6th transistor T6
The source electrode of pipe T7 is all connected with the first high frequency clock signal LC1；The drain electrode of 6th transistor T6, the grid of the 7th transistor T7 and
The drain electrode of 8th transistor T8 is connected with each other；Drain electrode, the drain electrode of the 9th transistor T9, the tenth transistor of 7th transistor T7
The grid of the grid of T10 and the 11st transistor T11 maintain node P (N) to connect with the first drop-down；8th transistor T8's
Grid is connect with pull-up control signal Q (N) with the grid of the 9th transistor T9；Source electrode, the 9th crystal of 8th transistor T8
The source electrode of the source electrode of pipe T9, the source electrode of the tenth transistor T10 and the 11st transistor T11 is all connected with low power supply signal VSS；The
The line scan signals G (N) of prime GOA unit is worked as in the drain electrode connection of ten transistor T10；The drain electrode of 11st transistor T11 connects
Pull-up control signal Q (N).
The second drop-down maintenance unit 1052 includes: the tenth two-transistor T12, the 13rd transistor T13, the 14th crystal
Pipe T14, the 15th transistor T15, the 16th transistor T16, the 17th transistor T17；The grid of tenth two-transistor T12,
The source electrode of source electrode and the 13rd transistor T13 are all connected with the second high frequency clock signal LC2；The drain electrode of tenth two-transistor T12,
The drain electrode of the grid and the 14th transistor T14 of 13rd transistor T13 is connected with each other；The drain electrode of 13rd transistor T13,
The grid of the drain electrode of 15th transistor T15, the grid of the 16th transistor T16 and the 17th transistor T17 is with second
Drop-down maintains node K (N) connection；The grid of 14th transistor T14 and the grid of the 15th transistor T15 are controlled with pull-up
Signal Q (N) connection；The source of the source electrode of 14th transistor T14, the source electrode of the 15th transistor T15, the 16th transistor T16
The source electrode of pole and the 17th transistor T17 are all connected with low power supply signal VSS；The drain electrode connection of 16th transistor T16 is current
The line scan signals G (N) of grade GOA unit；Drain electrode connection pull-up control signal Q (N) of 17th transistor T17；
The abnormal protection module 106 includes: the 17th transistor T17；Prime is worked as in the grid connection of 17th transistor T17
The line scan signals G (N+1) of all GOA units after GOA unit/G (N+2)/.../G (Last), the 18th transistor
The first drop-down of drain electrode connection of source electrode source electrode connection pull-up control signal Q (N) of T18, the 18th transistor T18 maintains node P
(N) and the second drop-down maintains node K (N).
Referring to Fig. 4, Fig. 4 is the time diagram of the single-level circuit of GOA driving circuit shown in Fig. 3.In conjunction with Fig. 3, Fig. 4
Shown, when the grade communication ST (N-1) of upper level GOA unit is high level, the scanning signal G (N-1) of upper level GOA unit is
When high level, the first transistor T1 conducting, the scanning signal G (N-1) of upper level GOA unit is by the first transistor T1 to bootstrapping
Capacitor Cbt charging, so that pull-up control signal Q (N) rises to a higher level.
The grade communication ST (N-1) of subsequent upper level GOA unit switchs to low level, and the first transistor T1 is closed, pull-up control
Signal Q (N) processed maintains a higher level by bootstrap capacitor Cbt.Meanwhile clock signal CK switchs to high level, clock signal
CK continues to charge to bootstrap capacitor Cbt by second transistor T2, so that pull-up control signal Q (N) reaches a higher level,
When the scanning signal G (N) and grade communication ST (N) of prime GOA unit also switch to high level.
When the scanning signal G (N+1) of next stage GOA unit switchs to high level, the 4th transistor T4 and the 5th transistor
T5 is opened, and the constant pressure low level that low power supply signal VSS is generated drags down pull-up control signal Q (N), and low power supply signal VSS is generated
Constant pressure low level will be dragged down as the scanning signal G (N) of prime GOA unit.
Since pull-up control signal Q (N) switchs to low level, so that the 7th transistor T7 and the 9th transistor T9 is closed, together
When, the high level that the first high frequency clock signal LC1 is generated opens the 6th transistor T6 and the 8th transistor T8, the first high frequency
The high level that clock signal LC1 is generated reaches the first drop-down and maintains node P (N), so that the tenth transistor T10 and the 11st crystal
Pipe T11 is opened, and the constant pressure low level that low power supply signal VSS is generated maintains pull-up control signal Q (N) and when prime GOA unit
The low level of scanning signal G (N).
However, since GOA driving circuit is easy to produce exception, that is, within the scan period of non-current row pixel unit, on
Control signal Q (N) is drawn to be easy jump to high level, to influence the normal operation of GOA driving circuit.The embodiment of the present application passes through
Increase by an abnormal protection module, within the scan period of non-current row pixel unit, when an anomaly occurs, can will work as prime GOA
The line scan signals and pull-up control signal of unit maintain low level, so as to improve the stability of GOA driving circuit.
Specifically, ought generate extremely, namely within the scan period of non-current row pixel unit, pull-up control signal Q (N) is jumped
Fade to high level；As GOA unit after prime GOA unit exports high level, the 18th transistor is opened, to pull up
The high level of control signal reaches the first drop-down and maintains node P (N), and the tenth transistor T10 and the 11st transistor T11 are opened,
And then pull-up control signal Q (N) and scanning signal G (N) D level when prime GOA unit can be continued to.
In some embodiments, the first drop-down maintenance unit 1051 and the second drop-down maintenance unit 1052 work alternatively, and,
First low-frequency clock signal LC1 and the second low-frequency clock signal LC2 is two antipodal low frequency signal sources of phase.
In some embodiments, it please refers to Fig. 5 and combines Fig. 3, Fig. 5 is the list of the GOA driving circuit of the embodiment of the present application
Level framework first order connection relationship diagram, i.e. GOA driving circuit connection relationship diagram when N is 1.Wherein, the pull-up control
Molding block connects the circuit start signal being also used to according to receiving, output pull-up control signal；Specifically, the first transistor
Grid, source electrode are all connected with circuit start signal.
It please refers to Fig. 6 and combines Fig. 3, Fig. 6 is last cascade of the single-stage framework of GOA driving circuit of the embodiment of the present application
Connect relation schematic diagram, i.e. GOA driving circuit connection relationship diagram when N is afterbody Last.Wherein, the pull-down module is also
For according to the line scan signals of second level GOA unit received, by pull-up control signal and afterbody GOA unit
Line scan signals are pulled down to low level simultaneously；Specifically, the grid of the grid and the 5th transistor of the 4th transistor is all connected with
The line scan signals of second level GOA unit output.
The application provides a kind of GOA driving circuit and display panel, the GOA driving circuit are cascaded by multistage GOA unit
It constitutes, every level-one GOA unit is for driving one-row pixels unit, when prime GOA unit includes: pull-up control module, upper drawing-die
Block, grade transmission module, pull-down module, drop-down maintenance module, abnormal protection module and bootstrap capacitor, by increasing by an abnormal protection
Module when an anomaly occurs, can will be believed within the scan period of non-current row pixel unit when the row scanning of prime GOA unit
Number and pull-up control signal maintain low level, so as to improve the stability of GOA driving circuit.
The application also provides a kind of display panel, which includes above-described GOA driving circuit, can specifically join
According to above, this will not be repeated here.
In conclusion although the present invention has been disclosed above in the preferred embodiment, but above preferred embodiment is not to limit
The system present invention, those skilled in the art can make various changes and profit without departing from the spirit and scope of the present invention
Decorations, therefore protection scope of the present invention subjects to the scope of the claims.
Claims (10)
1. a kind of GOA driving circuit, which is characterized in that the GOA driving circuit is made of the cascade of multistage GOA unit, every level-one
GOA unit is for driving one-row pixels unit, when prime GOA unit includes:
Control module is pulled up, it is defeated for the line scan signals exported by upper level GOA unit and grade communication number that basis receives
Pull-up control signal out；
Pull-up module is connected with the pull-up control module, for controlling signal, the high frequency that will be received according to the pull-up
Clock signal output is when the line scan signals of prime GOA unit；
Grade transmission module, is connected with the pull-up control module, for being received described according to pull-up control signal
High frequency clock signal output is when the grade communication number of prime GOA unit；
Pull-down module is connected with the pull-up control module and the pull-up module, for according to the next stage received
The line scan signals of GOA unit output, by pull-up control signal and described when the line scan signals of prime GOA unit are same
When be pulled down to low level；
Maintenance module is pulled down, is connected with the pull-up control module and the pull-up module, in non-current row pixel list
In the scan period of member, by pull-up control signal and described when the line scan signals of prime maintain low level；
Abnormal protection module is connect, for working as institute within the scan period of non-current row pixel unit with the drop-down maintenance module
State pull-up control abnormal signal when, by the pull-up control signal and it is described when the line scan signals of prime be pulled down to again it is low
Level；And
Bootstrap capacitor, one end of the bootstrap capacitor connect the pull-up and control signal, the other end connection of the bootstrap capacitor
The line scan signals when prime GOA unit.
2. GOA driving circuit according to claim 1, which is characterized in that the pull-up control module includes: first crystal
Pipe；
The grid of the first transistor connects the grade communication number exported by the upper level GOA unit, the first transistor
Source electrode connect the line scan signals that exports by the upper level GOA unit, the drain electrode of the first transistor exports on described
Draw control signal.
3. GOA driving circuit according to claim 1, which is characterized in that the pull-up module includes: second transistor；
The grid of the second transistor connects the pull-up and controls signal, and the source electrode of the second transistor connects the high frequency
Clock signal, the drain electrode of the second transistor even export the line scan signals for working as prime GOA unit.
4. GOA driving circuit according to claim 1, which is characterized in that the grade transmission module includes: third transistor；
The grid of the third transistor connects the pull-up and controls signal, and the source electrode of the third transistor connects the high frequency
Clock signal, the drain electrode of the third transistor even export the grade communication number for working as prime GOA unit.
5. GOA driving circuit according to claim 1, which is characterized in that the pull-down module include: the 4th transistor with
5th transistor；
The grid of 4th transistor and the grid of the 5th transistor are all connected with by next stage GOA unit output
Line scan signals；The source electrode of 4th transistor and the source electrode of the 5th transistor are all connected with low power supply signal；Described
The line scan signals of prime GOA unit are worked as in draining for four transistors described in connection, described in the drain electrode connection of the 5th transistor
Pull-up control signal.
6. GOA driving circuit according to claim 1, which is characterized in that the drop-down maintenance module includes: the first drop-down
Maintenance unit and the second drop-down maintenance unit；The first drop-down maintenance unit replaces work with the second drop-down maintenance unit
Make；
The first drop-down maintenance unit includes: the 6th transistor, the 7th transistor, the 8th transistor, the 9th transistor, the tenth
Transistor, the 11st transistor；
The source electrode of the grid of 6th transistor, source electrode and the 7th transistor is all connected with the first high frequency clock signal；
The drain electrode of the drain electrode of 6th transistor, the grid of the 7th transistor and the 8th transistor is connected with each other；Institute
State the drain electrode of the 7th transistor, the drain electrode of the 9th transistor, the grid of the tenth transistor and described 11st brilliant
The grid of body pipe maintains node to connect with the first drop-down；The grid of 8th transistor and the grid of the 9th transistor
It is connect with pull-up control signal；The source electrode of 8th transistor, the source electrode of the 9th transistor, the tenth crystalline substance
The source electrode of the source electrode of body pipe and the 11st transistor is all connected with low power supply signal；The drain electrode of tenth transistor connects
The line scan signals when prime GOA unit；The drain electrode of 11st transistor connects the pull-up and controls signal；
The second drop-down maintenance unit includes: the tenth two-transistor, the 13rd transistor, the 14th transistor, the 15th crystalline substance
Body pipe, the 16th transistor, the 17th transistor；
The source electrode of the grid of tenth two-transistor, source electrode and the 13rd transistor is all connected with the second high frequency clock letter
Number；Drain electrode, the grid of the 13rd transistor and the drain electrode phase of the 14th transistor of tenth two-transistor
It connects；The drain electrode of 13rd transistor, the drain electrode of the 15th transistor, the 16th transistor grid with
And the grid of the 17th transistor maintains node to connect with the second drop-down；The grid of 14th transistor with it is described
The grid of 15th transistor is connect with pull-up control signal；The source electrode of 14th transistor, the described 15th
The source electrode of the source electrode of transistor, the source electrode of the 16th transistor and the 17th transistor is all connected with low power supply letter
Number；The drain electrode connection line scan signals for working as prime GOA unit of 16th transistor；17th transistor
Drain electrode connects the pull-up and controls signal；
First low-frequency clock signal and second low-frequency clock signal are two antipodal low frequency signal sources of phase.
7. GOA driving circuit according to claim 5, which is characterized in that the abnormal protection module includes: the 18th crystalline substance
Body pipe；
The line scan signals of grid connection all GOA units after prime GOA unit of 18th transistor,
The source electrode source electrode of 18th transistor connects the pull-up and controls signal, described in the drain electrode of the 17th transistor connects
First drop-down maintains node and second drop-down to maintain node.
8. GOA driving circuit according to claim 1-7, which is characterized in that the first of the GOA driving circuit
In grade connection relationship, the pull-up control module connects the circuit start signal being also used to according to receiving, output pull-up control letter
Number.
9. GOA driving circuit according to claim 1-7, which is characterized in that the GOA driving circuit it is last
In level-one connection relationship, the pull-down module is also used to the line scan signals according to the second level GOA unit received, will be described
The line scan signals of pull-up control signal and the afterbody GOA unit are pulled down to low level simultaneously.
10. a kind of display panel, which is characterized in that including the described in any item GOA driving circuits of such as claim 1-9.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811212530.7A CN109215557A (en) | 2018-10-18 | 2018-10-18 | GOA driving circuit and display panel |
| PCT/CN2019/070903 WO2020077897A1 (en) | 2018-10-18 | 2019-01-08 | Goa drive circuit and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811212530.7A CN109215557A (en) | 2018-10-18 | 2018-10-18 | GOA driving circuit and display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109215557A true CN109215557A (en) | 2019-01-15 |
Family
ID=64980716
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811212530.7A Pending CN109215557A (en) | 2018-10-18 | 2018-10-18 | GOA driving circuit and display panel |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN109215557A (en) |
| WO (1) | WO2020077897A1 (en) |
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| CN111445878A (en) * | 2020-04-29 | 2020-07-24 | Tcl华星光电技术有限公司 | Display panel and display device |
| WO2020206898A1 (en) * | 2019-04-08 | 2020-10-15 | 武汉华星光电半导体显示技术有限公司 | Goa driving unit, goa circuit, and display device |
| CN113808533A (en) * | 2021-09-15 | 2021-12-17 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display terminal |
| CN114743482A (en) * | 2022-03-28 | 2022-07-12 | Tcl华星光电技术有限公司 | Display panel based on GOA |
| CN114842786A (en) * | 2022-04-26 | 2022-08-02 | Tcl华星光电技术有限公司 | GOA circuit and display panel |
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| CN114495793B (en) * | 2022-02-14 | 2023-08-22 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit and display panel |
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| WO2020077897A1 (en) | 2020-04-23 |
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