CN109164842B - Over-temperature protection circuit with overcurrent protection - Google Patents

Over-temperature protection circuit with overcurrent protection Download PDF

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CN109164842B
CN109164842B CN201810794867.7A CN201810794867A CN109164842B CN 109164842 B CN109164842 B CN 109164842B CN 201810794867 A CN201810794867 A CN 201810794867A CN 109164842 B CN109164842 B CN 109164842B
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bipolar transistor
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transistor
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CN109164842A (en
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金湘亮
李晓
张文杰
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Jiangsu Sit Electronic Science & Technology Co ltd
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    • G05D—SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES
    • G05D23/00—Control of temperature
    • G05D23/19—Control of temperature characterised by the use of electric means
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Abstract

The invention discloses an over-temperature protection circuit with over-current protection, which comprises a power supply VCC and a first over-temperature protection circuitThe circuit comprises a PMOS tube MP1, a first NMOS tube MN1, a second NMOS tube MN2, a first bipolar transistor Q1, a second bipolar transistor Q2, a third bipolar transistor Q3, a fourth bipolar transistor Q4, a fifth bipolar transistor Q5, a sixth bipolar transistor Q6, a seventh bipolar transistor Q7, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first inverter INV1 and a second inverter INV 2. The output of the over-temperature detection circuit is a detection signal of temperature change; when the temperature exceeds the over-temperature threshold T in the temperature rising processHWhen the temperature is lower than the recovery threshold T in the temperature reduction process, the detection signal output is changed from high level to low level, the protection circuit is started to generate an over-temperature protection signal, and the temperature is lower than the recovery threshold TLWhen the detection signal output is changed from low level to high level, the protection circuit is closed, and the chip recovers normal operation.

Description

Over-temperature protection circuit with overcurrent protection
Technical Field
The invention relates to the field of integrated circuits, in particular to an over-temperature protection circuit.
Background
Fig. 2 shows an over-temperature protection circuit of a conventional integrated circuit, in which a voltage across a resistor R1 is set to V1The voltage across the resistor R2 is V2Due to the emitter-base voltage V of the transistor Q1EBHas negative temperature characteristic, at normal temperature, VEB>VAAt this time, the output of the signal OTP _ OUT is high level 1, so that M1 is turned on and R2 is short-circuited to obtain VA＝V1With increasing temperature, VEBDecrease when VEB≤VAWhen the OTP _ OUT is turned to be low level 0, a protection signal is sent OUT, Ml is turned off, M2 is turned on, and V is obtainedA＝V1+V2The circuit is in an over-temperature protection state, and V is reduced along with the temperatureEBIncrease when VEB>VADuring the process, the OTP _ OUT recovers to output the high level 1 again, the system works normally, the purpose of over-temperature protection can be realized, but under different power supply voltages, I is causedPTATThe voltage on the resistors R1 and R2 is changed, so that the temperature threshold point and the hysteresis quantity of the circuit generate large deviation, the circuit performance cannot be ensured, the circuit needs a voltage comparator and reference voltage, the structure is complex, a plurality of required components are needed, the circuit is uncontrollable to be opened and closed, the power consumption is large, devices are burnt out due to overlarge current, and the circuit is not suitable for integrationThe invention not only achieves the purpose of basic over-temperature protection and hysteresis, but also utilizes a logic level switch to play a role of current leakage, can quickly close the whole circuit, reduces power consumption, and when the current is too large, the circuit forms self-locking to reduce the current, reduce the power consumption, prevent devices from being burnt out, protect chips, and the self-locking circuit accelerates the turnover of temperature detection signal output, improves sensitivity, and a signal output circuit isolates external signals to prevent the output signals of the over-temperature detection circuit from being interfered by the external signals, thereby improving the circuit performance. The design degree of difficulty is low, can conveniently adjust the excess temperature protection threshold value, realizes temperature hysteresis setting etc. also guarantees the safety and the life of chip.
Disclosure of Invention
In order to solve the defects of the prior art, the invention aims to provide an over-temperature protection circuit with over-current protection; the over-temperature protection circuit is simple in structure, few in components, high in sensitivity, controllable in circuit switching, low in power consumption and high in performance, does not need a voltage comparator and reference voltage, is low in design difficulty, is convenient to adjust an over-temperature protection threshold value, achieves temperature hysteresis setting and the like, and also guarantees the service life of a chip.
In order to achieve the above object, the present invention adopts the following technical solutions:
an over-temperature protection circuit with over-current protection comprises a power supply VCC, a first PMOS transistor MP1, a first NMOS transistor MN1 and a second NMOS transistor MN2, wherein a first bipolar transistor Q1 is NPN type, a second bipolar transistor Q2 is NPN type, a third bipolar transistor Q3 is NPN type, a fourth bipolar transistor Q4 is NPN type, a fifth bipolar transistor Q5 is NPN type, a sixth bipolar transistor Q6 is NPN type, a seventh bipolar transistor Q7 is PNP type, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first inverter INV1 and a second inverter INV 2.
The drain terminal of the first PMOS tube MP1 is connected with one end of the first resistor; the grid electrode of the first PMOS tube MP1 and the grid electrode of the first NMOS tube are marked as MP 1-g; the source end of the first PMOS pipe MP1 is connected with the substrate through a power supply.
The drain end of the first NMOS tube, the base electrode of the first bipolar transistor, the emitter electrode of the third bipolar transistor and the base electrode of the fourth bipolar transistor are connected, and the intersection point is A; the source end of the first NMOS tube and the substrate are grounded.
The source end of the second NMOS transistor, the collector electrode of the sixth bipolar transistor and one end of the fifth resistor are connected with the input end of the first phase inverter and are marked as C1; the drain end of a second NMOS transistor, the grid electrode of the second NMOS transistor, the collector electrode of a fourth bipolar transistor, the base electrode of a seventh bipolar transistor and one end of a fourth resistor are connected and are marked as MN 2-g; the substrate of the second NMOS tube is grounded.
The collector of the first bipolar transistor Q1 and the other end of the first resistor R1 are connected with the base of a third bipolar transistor Q3; the emitter of the first bipolar transistor Q1, the collector of the second bipolar transistor Q2 and the base of the fifth bipolar transistor Q5 are connected;
the base electrode of the second bipolar transistor Q2, the emitter electrode of the fourth bipolar transistor Q4 and the collector electrode of the fifth bipolar transistor Q5 are connected; the emitter of the second bipolar transistor Q2 is grounded;
the collector of the third bipolar transistor Q3 is connected with one end of a second resistor R2;
an emitter of the fifth bipolar transistor Q5 is connected with one end of a third resistor R3;
the base electrode of the sixth bipolar transistor Q6, one end of a sixth resistor R6 and the collector electrode of the seventh bipolar transistor Q7 are connected; the emitter of the sixth bipolar transistor Q6 is grounded;
an emitter of a seventh bipolar transistor Q7 is connected with a power supply VCC, the other end of a second resistor R2 is connected with the power supply VCC, the other end of a fourth resistor R4 is connected with the power supply VCC, the other end of a fifth resistor R5 is connected with the power supply VCC, the other end of a third resistor R3 is grounded, and the other end of a sixth resistor R6 is grounded;
the output end of the first inverter INV1 is connected to the input end of the second inverter INV2, and the output end of the second inverter INV2 is denoted as Vout.
The invention has the advantages that: when the protection circuit is used for detecting temperature and at normal temperature, the sixth bipolar transistor Q6 and the seventh bipolar transistor Q7 are closed, the second NMOS transistor MN2 is closed, so that the protection circuit is not started, and when the temperature is higher than an over-temperature threshold value T in the temperature rising processHWhen the current is too large, the circuit forms positive feedback to form self-locking, so that the current is reduced, the device is prevented from being burnt out, the power consumption is reduced, the chip self-locking circuit is protected to accelerate the turnover of the temperature detection signal output, and the sensitivity is improved; in the process of temperature reduction, when the temperature is lower than the over-temperature threshold value TLWhen the temperature detection circuit is in use, the sixth bipolar transistor Q6 and the seventh bipolar transistor Q7 are turned off, the second NMOS transistor MN2 is turned off, the protection circuit is turned off, and the temperature detection signal output is changed from low level to high level. And the signal output circuits of the two inverters isolate external signals, so that the over-temperature detection circuit is prevented from being interfered by the external signals, and the circuit performance is improved. A base signal MN2-g of the seventh bipolar transistor Q7 is a feedback signal, so that the temperature hysteresis is realized, and a certain hysteresis quantity (T) is keptH-TL) The system is prevented from being frequently turned on and off when the system works at a certain temperature point, so that adverse effects on the system are prevented; the relationship between the logic level and the switch operation is: when the circuit normally works, the low level is adopted, the first PMOS tube MP1 switch is turned on, the first NMOS tube MN1 switch is turned off, the over-temperature protection circuit normally works, the high level is adopted, the first PMOS tube MP1 switch is turned off, the first NMOS tube MN1 switch works, the electromotive force generated by the bipolar transistor is consumed through a loop formed by the switching triode and the bipolar transistor, the leakage current effect is realized, the whole circuit can be quickly turned off, the power consumption is reduced, the purposes of basic over-temperature protection and temperature hysteresis are achieved, the leakage current effect is realized by utilizing the logic level switch, the whole circuit can be quickly turned off, the power consumption is reduced, when the current is too large, the circuit forms positive feedback, and self-feedback is formedThe invention provides an over-temperature protection circuit which has the advantages of simple structure, few components, low power consumption, high sensitivity, high performance, controllable circuit switching and over-current self-locking, no need of a voltage comparator and reference voltage, low design difficulty, convenience in adjusting over-temperature protection threshold values, realization of temperature hysteresis setting and the like, and also guarantees the safety and the service life of a chip.
Drawings
FIG. 1 is a schematic circuit diagram of an embodiment of the present invention;
fig. 2 is a schematic diagram of a circuit structure commonly used in the prior art.
Detailed Description
The invention is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
As shown in fig. 1, an over-temperature protection circuit with over-current protection includes a power supply VCC, a first PMOS transistor MP1, a first NMOS transistor MN1, a second NMOS transistor MN2, a first bipolar transistor Q1, a second bipolar transistor Q2, a third bipolar transistor Q3, a fourth bipolar transistor Q4, a fifth bipolar transistor Q5, a sixth bipolar transistor Q6, a seventh bipolar transistor Q7, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first inverter INV1, and a second inverter INV 2;
the drain terminal of the first PMOS tube MP1 is connected with one end of a first resistor R1; the grid electrodes of the first PMOS transistor MP1 and the first NMOS transistor MN1 are marked as MP 1-g; the source end of the first PMOS pipe MP1 and the substrate are connected with a power supply VCC;
the drain end of the first NMOS transistor MN1, the base electrode of the first bipolar transistor Q1, the emitter electrode of the third bipolar transistor Q3 and the base electrode of the fourth bipolar transistor Q4 are connected, and the intersection point is A; the source end of the first NMOS transistor MN1 and the substrate are grounded;
the source end of the second NMOS transistor MN2, the collector electrode of the sixth bipolar transistor Q6, one end of a fifth resistor R5 and the input end of the first inverter INV1 are connected and marked as C1; the drain end of a second NMOS transistor MN2, the grid electrode of a second NMOS transistor MN2, the collector electrode of a fourth bipolar transistor Q4, the base electrode of a seventh bipolar transistor Q7 and one end of a fourth resistor R4 are connected and are marked as MN 2-g; the substrate of the second NMOS transistor MN2 is grounded;
the collector of the first bipolar transistor Q1 and the other end of the first resistor R1 are connected with the base of a third bipolar transistor Q3; the emitter of the first bipolar transistor Q1, the collector of the second bipolar transistor Q2 and the base of the fifth bipolar transistor Q5 are connected;
the base electrode of the second bipolar transistor Q2, the emitter electrode of the fourth bipolar transistor Q4 and the collector electrode of the fifth bipolar transistor Q5 are connected; the emitter of the second bipolar transistor Q2 is grounded;
the collector of the third bipolar transistor Q3 is connected with one end of a second resistor R2;
an emitter of the fifth bipolar transistor Q5 is connected with one end of a third resistor R3;
the base electrode of the sixth bipolar transistor Q6, one end of a sixth resistor R6 and the collector electrode of the seventh bipolar transistor Q7 are connected; the emitter of the sixth bipolar transistor Q6 is grounded;
an emitter of a seventh bipolar transistor Q7 is connected with a power supply VCC, the other end of a second resistor R2 is connected with the power supply VCC, the other end of a fourth resistor R4 is connected with the power supply VCC, the other end of a fifth resistor R5 is connected with the power supply VCC, the other end of a third resistor R3 is grounded, and the other end of a sixth resistor R6 is grounded;
the output end of the first inverter INV1 is connected to the input end of the second inverter INV2, and the output end of the second inverter INV2 is denoted as Vout.
As shown in FIG. 1, let Q7 be the threshold voltage VTH7The gate voltage of MN2 is denoted as VMN2-g. At room temperature, VMN2-gRelative to the high potential of the power supply, i.e. VCC-VMN2-gLess than VTH7Therefore, Q7 is turned off, which corresponds to no current flowing through the base of Q6, i.e., Q6 is not turned on, so C1 is high, VCC is selected, and V is selectedMN2-gLess than VCC, therefore MN2 is off and the protection circuit is offAnd (5) closing.
As shown in FIG. 1, the chip is working normally, let I3To flow R3 current, I4To flow R4 current, IMN2In order to flow MN2 current, VAIs a point voltage of A, VbeFor base-emitter voltages of triodes, VTIs the thermal voltage, q is the electron charge, k is the Boltzmann constant, T is the thermodynamic temperature, ICIs a collector current of a triodeBIs a base current of a triode, IEFor triode emitter current, Q1, Q2, Q3, Q4 and Q5 are all conducted, ISIs triode saturation current, beta is current amplification factor.
Then, IC＝IE＝βIB＝IS
Voltage at point a:
Figure BDA0001735756340000071
I3＝[(Vbe2-Vbe5)+(Vbe4-Vbe1)]÷R3
Vbe＝VTln(IC/IS)
VT＝KT/q
ΔVbe＝VTln[(IC2/IS2)(IS5/IC5)]+VTln[(IC4/IS4)(IS1/IC1)]
＝VTln[(IC2/IS2)(IS5/IC5)(IC4/IS4)(IS1/IC1)]
because, in fig. 1, the following current relationship can be obtained:
IB1＝IB4IE4＝IB2IE1＝IB5
(IC2/IS2)(IS5/IC5)]+VTln[(IC4/IS4)(IS1/IC1)
＝(β2IB1/IS2)(IS5/β2IB1)(βIB1/IS4)(IS1/βIB1)
＝(IS5/IS2)(IS1/IS4)
therefore: Δ Vbe＝VTln[(IS5/IS2)(IS1/IS4)]＝VTln (mn) is a quantity proportional to temperature,
wherein M is the ratio of the emitter areas of Q2 and Q5, N is the ratio of the emitter areas of Q4 and Q1,
then
Figure BDA0001735756340000081
Increase in temperature I3Increase of VMN2-gReduced, VCC-VMN2-gIncreasing;
when Q7 is in the on-critical condition, the determined temperature T is the over-temperature threshold TH。
That is, Q7 conduction threshold is VTH7＝VCC-VMN2-g
Therefore:
Figure BDA0001735756340000082
temperature higher than THTime, VCC-VMN2-gGreater than VTHThe Q7 is turned on, the current flows through the base of the Q6, the Q6 is turned on, the over-temperature protection signal is generated, the protection circuit is started, the power consumption is reduced, the temperature is reduced, and the temperature detection signal C1 is changed from high level to low level, namely the temperature output signal Vout is also changed from high level to low level.
In the process of temperature reduction, Q7 and Q6 are conducted at the beginning, the temperature detection signal C1 is low level, MN2 is opened, and the protection circuit is started. Let IMN2In order to flow MN2 current, VTH2Is MN2 threshold voltage, COXThe gate oxide capacitance per unit area of MN2, W is the gate width of MN2 effective part, L is the gate length of MN2 effective part, and V isGSIs the gate-source terminal voltage, u, of MN2nIn order to achieve the mobility of the electrons,
MN2 is made to operate in saturation region, then IMN2＝(1/2)unCOX(W/L)MN2(VGS-VTH2)2
In fig. 1, a point voltage:
Figure BDA0001735756340000091
I3＝[(Vbe2-Vbe5)+(Vbe4-Vbe1)]÷R3
Vbe＝VTln(IC/IS)
VT＝KT/q
ΔVbe＝VTln[(IC2/IS2)(IS5/IC5)]+VTln[(IC4/IS4)(IS1/IC1)]
＝VTln[(IC2/IS2)(IS5/IC5)(IC4/IS4)(IS1/IC1)]
because, the current relationship that can be obtained in fig. 1 is:
IB1＝IB4IE4＝IB2IE1＝IB5
(IC2/IS2)(IS5/IC5)]+VTln[(IC4/IS4)(IS1/IC1)
＝(β2IB1/IS2)(IS5/β2IB1)(βIB1/IS4)(IS1/βIB1)
＝(IS5/IS2)(IS1/IS4)
therefore: Δ Vbe＝VTln[(IS5/IS2)(IS1/IS4)]＝VTln (mn) is a quantity proportional to temperature;
then
Figure BDA0001735756340000092
I4＝I3+IMN2
Therefore, VMN2-g＝VCC-I4R4
When the Q7 threshold is closed, the determined temperature T is the recovery threshold TL，
Q7 critical closure condition, i.e. VCC-VMN2-g＝VTH7
Therefore, the first and second electrodes are formed on the substrate,
Figure BDA0001735756340000101
Figure BDA0001735756340000102
Figure BDA0001735756340000103
it can be obtained that the recovery threshold T can be obtained by adjusting the values of R3 and R4, and (W/L) of MN2 according to the formulaLDuring the temperature decrease, TLRequired for the threshold at which Q7 will close, so when the temperature falls below TL，VCC-VMN2-gLess than VTHAnd Q7 is turned off, so that Q6 is turned off, the output of the temperature detection C1 is changed from low level to high level, namely Vout is inverted from low level to high level, MN2 is turned off, the protection circuit is turned off, and the power consumption is reduced.
The transistor Q7 is at a temperature higher than T due to excessive current caused by the instant of the temperature detection signal turningHEmitter-base voltage V after turn-onEB7Negative temperature characteristic, temperature rise, VEB7Decreases, so the base voltage of Q7 increases because of I4Current is indeterminate, so VMN2-gVoltage can only be according to VEB7To determine, i.e. VMN2-gIncrease, resulting in Q7 base current IB7Decrease, resulting in a decrease in the pressure drop across R6, i.e., UBE6Reduced resulting in a base current I of Q6B6Reduced collector current IC6＝βIB6Decrease, resulting in VMN2-gDecrease, in turn, the base current I of Q7B7An electric circuitPositive feedback is formed, self-locking is formed, current is reduced, devices are prevented from being burnt out, and chips are protected. Due to the existence of the self-locking circuit, the turnover of the temperature detection signal is accelerated, the sensitivity is improved, and the situation that the temperature detection signal is in a middle value for a long time, so that PMOS and NMOS in the inverters INV1 and INV2 are conducted at the same time, and the device is damaged is avoided.
The output signal circuits of the two phase inverters isolate external signals to prevent the external signals from influencing the output signals of the over-temperature detection circuit, and the circuit performance is improved.
The feedback signal realizes the temperature hysteresis and keeps a certain hysteresis quantity (T)H-TL) The purpose of effective simulation temperature is achieved, and the system is prevented from being adversely affected by frequent turning on and off of the system when the system works at a certain temperature point.
The working state of the switch is as follows: when the circuit normally works, the low level, the grid electrode of the first PMOS pipe MP1 receives signals and is turned on as a switch, the first NMOS pipe MN1 is turned off as a switch, the over-temperature protection circuit normally works, the high level, the first PMOS pipe MP1 is turned off as a switch, and the first NMOS pipe MN1 is turned on as a switch, so that electromotive force generated by the bipolar transistor is consumed through a loop formed by the switch triode and the bipolar transistor, the effect of current leakage is achieved, the whole circuit can be quickly turned off, the temperature is reduced, and the power consumption is reduced.
The invention provides an over-temperature protection circuit with over-current protection, which achieves the purposes of basic over-temperature protection and delay setting, utilizes a logic level switch to play a role of current leakage, can quickly close the whole circuit, reduces power consumption, forms positive feedback when the current is overlarge, forms self-locking, reduces the current, accelerates the turnover of temperature detection signals by the self-locking circuit, improves the sensitivity, prevents devices from being burnt out, protects a chip, isolates external signals by a signal output circuit, prevents the external signals from interfering the temperature detection circuit, improves the circuit performance, solves the problems in the prior art, provides the over-temperature protection circuit with simple structure, few components, low power consumption, high sensitivity, high performance and controllable circuit switching, can well detect the change of the temperature of the chip, and achieves the effect of reducing the temperature by controlling the work of partial modules of the chip, the protection chip is not damaged by the heat, and the hysteresis function of setting guarantees that the circuit does not take place thermal oscillation, need not voltage comparator and reference voltage, and the design degree of difficulty is low, can conveniently adjust the excess temperature protection threshold value, realizes temperature hysteresis setting etc. has also guaranteed the life of chip, has good application prospect.
The foregoing illustrates and describes the principles, general features, and advantages of the present invention. It should be understood by those skilled in the art that the above over-temperature protection circuit is only exemplary, but those skilled in the art can modify and replace the secondary devices according to the above description, and the above examples do not limit the present invention in any way, and all technical solutions obtained by using equivalent modifications or equivalent changes fall within the protection scope of the present invention.

Claims (6)

1. An over-temperature protection circuit with over-current protection comprises a power supply (VCC), a first PMOS (P-channel metal oxide semiconductor) tube (MP 1), a first NMOS (MN 1), a second NMOS (MN 2), a first bipolar transistor (Q1), a second bipolar transistor (Q2), a third bipolar transistor (Q3), a fourth bipolar transistor (Q4), a fifth bipolar transistor (Q5), a sixth bipolar transistor (Q6), a seventh bipolar transistor (Q7), a first resistor (R1), a second resistor (R2), a third resistor (R3), a fourth resistor (R4), a fifth resistor (R5), a sixth resistor (R6), a first inverter (INV 1) and a second inverter (INV 2);
the drain terminal of the first PMOS tube (MP 1) is connected with one end of a first resistor (R1); the grid electrode of the first PMOS tube (MP 1) and the grid electrode of the first NMOS tube (MN 1) are marked as MP 1-g; the source end of the first PMOS tube (MP 1) and the substrate are connected with a power supply (VCC);
the drain end of the first NMOS transistor (MN 1), the base electrode of the first bipolar transistor (Q1) and the emitter electrode of the third bipolar transistor (Q3) are all connected with the base electrode of the fourth bipolar transistor (Q4), and the intersection point is A; the source end of a first NMOS (MN 1) tube and the substrate are grounded;
the source end of the second NMOS transistor (MN 2), the collector electrode of the sixth bipolar transistor (Q6) and one end of the fifth resistor (R5) are connected with the input end of the first inverter (INV 1) and are marked as C1; the drain end of a second NMOS transistor (MN 2), the grid electrode of the second NMOS transistor (MN 2), the collector electrode of a fourth bipolar transistor (Q4) and the base electrode of a seventh bipolar transistor (Q7) are connected with one end of a fourth resistor (R4) and are marked as MN 2-g; the substrate of the second NMOS transistor (MN 2) is grounded;
the collector of the first bipolar transistor (Q1) and the other end of the first resistor (R1) are connected with the base of the third bipolar transistor (Q3); the emitter of the first bipolar transistor (Q1) and the collector of the second bipolar transistor (Q2) are connected with the base of the fifth bipolar transistor (Q5);
the base of the second bipolar transistor (Q2) and the emitter of the fourth bipolar transistor (Q4) are connected with the collector of the fifth bipolar transistor (Q5); the emitter of the second bipolar transistor (Q2) is grounded;
the collector of the third bipolar transistor (Q3) is connected with one end of a second resistor (R2);
an emitter of the fifth bipolar transistor (Q5) is connected with one end of a third resistor (R3);
the base of the sixth bipolar transistor (Q6), one end of the sixth resistor (R6) and the collector of the seventh bipolar transistor (Q7) are connected; the emitter of the sixth bipolar transistor (Q6) is grounded;
an emitter of a seventh bipolar transistor (Q7) is connected with the power supply (VCC), the other end of a second resistor (R2) is connected with the power supply (VCC), the other end of a fourth resistor (R4) is connected with the power supply (VCC), the other end of a fifth resistor (R5) is connected with the power supply (VCC), the other end of a third resistor (R3) is grounded, and the other end of a sixth resistor (R6) is grounded;
the output end of the first inverter (INV 1) is connected with the input end of the second inverter (INV 2), and the output end of the second inverter (INV 2) is marked as Vout.
2. The over-temperature protection circuit with over-current protection as claimed in claim 1, wherein the first inverter (INV 1) and the second inverter (INV 2) are signal inverters formed by PMOS transistor and NMOS transistor.
3. The over-temperature protection circuit with over-current protection as claimed in claim 1, wherein the output terminal Vout of the second inverter (INV 2) is consistent with the over-temperature detection signal C1 output from the output terminal of the over-temperature detection circuit, the over-temperature detection signal is indicative of the temperature variation, the temperature rise process is performed when the temperature exceeds the over-temperature threshold THThe signal output changes from high level to low level, the temperature decreases and is lower than the recovery threshold TLThe signal output changes from low to high.
4. The over-temperature protection circuit with over-current protection as claimed in claim 1, wherein the output signal circuit of the first inverter (INV 1) and the second inverter (INV 2) isolates external signals, so as to prevent the over-temperature detection signal C1 from being interfered by external signals, thereby improving circuit performance.
5. The over-temperature protection circuit with over-current protection according to claim 1, wherein the over-temperature protection circuit operates with a dc voltage of: 3.3V to 5V.
6. The over-temperature protection circuit with over-current protection function according to claim 1, wherein the first bipolar transistor (Q1), the second bipolar transistor (Q2), the third bipolar transistor (Q3), the fourth bipolar transistor (Q4), the fifth bipolar transistor (Q5) and the sixth bipolar transistor (Q6) are NPN transistors, and the seventh bipolar transistor (Q7) is a PNP transistor.
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CN112362180B (en) * 2020-10-15 2022-08-12 国网思极紫光(青岛)微电子科技有限公司 Temperature difference detection circuit for over-temperature protection
CN112882505A (en) * 2021-03-09 2021-06-01 厦门市必易微电子技术有限公司 Temperature protection signal generation circuit and temperature protection point trimming method
CN113758589B (en) * 2021-09-07 2023-12-29 上海集成电路研发中心有限公司 Temperature detection circuit, chip and temperature detection method

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