CN109062099A - DSP chip selection circuit and related equipment - Google Patents
DSP chip selection circuit and related equipment Download PDFInfo
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- CN109062099A CN109062099A CN201810887881.1A CN201810887881A CN109062099A CN 109062099 A CN109062099 A CN 109062099A CN 201810887881 A CN201810887881 A CN 201810887881A CN 109062099 A CN109062099 A CN 109062099A
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- 230000005611 electricity Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/21—Pc I-O input output
- G05B2219/21119—Circuit for signal adaption, voltage level shift, filter noise
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The invention relates to a DSP chip selection circuit and related equipment, wherein the chip selection circuit comprises a JTAG interface, a selection switch and at least two chips; the selection switch comprises a selection end and at least two output ports; the chip comprises a TRST pin; the TRST pins of the chips are respectively connected with different output ports of the selection switch, and the TRST pin of each chip is only connected with one output port of the selection switch; and the TRST pin of the JTAG interface is connected with the selection end of the selection switch. The circuit or the related equipment can realize the function that a plurality of chips share one JTAG interface, and can effectively save the cost.
Description
Technical field
The present invention relates to chip controls technical fields, and in particular to a kind of dsp chip selection circuit and relevant device.
Background technique
With the application popularization of electric appliance, more and more electric appliances come into operation, and electric appliance realizes the process of its own function
In often may require that by Digital Signal Processing and complete some operations.
It carries out mostly using DSP (Digital Signal Processing, Digital Signal Processing) greatly when Digital Signal Processing
Chip is realized, and dsp chip may require that, by emulator programming program or in-circuit emulation test, at this time dsp chip then needs
It works in jtag interface (Joint Test Action Group, joint test working group) test pattern.Wherein, dsp chip
On the level of TRST pin determine the working method of dsp chip.When dsp chip work in normal mode, need TRST
Pin keeps low level；When needing to be tested with emulator programming program or in-circuit emulation, dsp chip needs work in jtag interface
Test pattern, TRST pin keeps high level at this time.Dsp chip is provided with internal pull down resistor at TRST pin simultaneously, protects
For card in normal mode, TRST pin keeps low level.After connecting upper emulator, emulator inputs high electricity to TRST pin
Flat, dsp chip works in jtag interface test pattern.
One piece of dsp chip and one are only installed on traditional printed circuit board (Printed Circuit Board, PCB)
A jtag interface.With the continuous development of technology, the function of electric appliance is more and more abundant, and the complexity of the control algolithm of electric appliance is not
It is disconnected to increase, to may need to carry multiple dsp chips on one piece of pcb board.It is then dsp chip corresponding one in the related technology
A jtag interface, therefore need to connect by multiple jtag interfaces with emulator when carrying out programming program to multiple dsp chips,
Lead to higher cost.
Summary of the invention
In view of this, it is an object of the invention to overcome the deficiencies of the prior art and provide a kind of dsp chip selection circuit and
Relevant device.
In order to achieve the above object, the present invention adopts the following technical scheme:
A kind of chip selection circuit, comprising:
Jtag interface, selection switch and at least two chips；The selection switch includes selection end and at least two outputs
Port；The chip includes TRST pin；
The TRST pin of each chip is respectively connected from the output port for selecting switch different, and each described
The TRST pin of chip is only connected with an output port of the selection switch；
The TRST pin of the jtag interface is connected with the selection end of the selection switch.
Optionally, described to select switch for data select switch, the data select switch includes: selection end and at least two
A output port.
Optionally, the data select switch further includes input terminal；
The chip selection circuit further include:
Selection signal input module；
The selection signal input module is connected with the input terminal of the data select switch, for inputting to the core
Piece carries out the selection signal of selection.
Optionally, the selection signal input module includes: toggle switch；The coding category number of the toggle switch is at least
Reach the number of the output port of the data select switch.
Optionally, the toggle switch is connected with common end power supply.
Optionally, the number of the chip is 3, and the number of the output port of the selection switch is no less than the chip
Number.
Optionally, the chip is provided with the first pull down resistor, and the TRST of first pull down resistor and the chip draws
Foot connection.
Optionally, the first pull down resistor ground connection.
Optionally, the input terminal of the data select switch includes at least two address pins.
Optionally, further includes: each address pin of the input terminal of the data select switch is respectively connected with the second drop-down
Resistance.
Optionally, the number of second pull down resistor is identical as the number of the address pin.
Optionally, the second pull down resistor ground connection.
Optionally, the chip further includes VCC pin, TCK pin, TDI pin and TMS pin；
The VCC pin of the chip is connected with the VCC power pins of the jtag interface；
The TCK pin of the chip is connected with the TCK pin of the jtag interface；
The TDI pin of the chip is connected with the TDI pin of the jtag interface；
The TMS pin of the chip is connected with the TMS pin of the jtag interface.
A kind of chip selection device, comprising: chip selection circuit as described above.
A kind of chip control system, comprising: emulator and the chip choosing as described above being connected with the emulator
Select circuit；Alternatively, emulator and the chip selection device as described above being connected with the emulator.
A kind of electrical equipment, comprising: chip selection circuit as described above；Or chip as described above selects dress
It sets.
Technical solution provided by the present application can include the following benefits:
The present invention discloses a kind of chip selection circuit, which includes jtag interface, selection switch and at least two chips；
The selection switch includes selection end and at least two output ports；The chip includes TRST pin；Each chip
TRST pin is respectively connected from the different output port of the selection switch, and the TRST pin of each chip only with institute
An output port for stating selection switch is connected；The selection end phase of the TRST pin of the jtag interface and the selection switch
Connection.When needing to carry out program burn writing to some chip at least two chips, then by described in selection switch connection
The TRST pin of the chip of the TRST pin and pending program burn writing of jtag interface, when the chip is connected with jtag interface
Afterwards, which is connected by jtag interface with emulator, and emulator carries out program burn writing to the chip in turn.Pass through the application
The selection switch of circuit foundation can select one from multiple chips and be connected with jtag interface, and it is total to can be realized multiple chips
With the function of a jtag interface.Chip selection circuit only needs a jtag interface that multiple chips and one can be realized in the application
The connection of a emulator can effectively save cost.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is a kind of structural schematic diagram of chip selection circuit shown according to an exemplary embodiment；
Fig. 2 is a kind of structural schematic diagram of dsp chip selection circuit shown according to two exemplary embodiments；
Fig. 3 is a kind of structural schematic diagram of chip control system shown according to three exemplary embodiments.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, technical solution of the present invention will be carried out below
Detailed description.Obviously, described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.Base
Embodiment in the present invention, those of ordinary skill in the art are obtained all without making creative work
Other embodiment belongs to the range that the present invention is protected.
Fig. 1 is a kind of structural schematic diagram of chip selection circuit shown according to an exemplary embodiment；As shown in Figure 1,
A kind of chip selection circuit, comprising:
Jtag interface 3, selection switch 2 and at least two chips 1；The selection switch 2 includes selection end b and at least two
Output port a；The chip includes TRST pin；
The TRST pin of each chip 1 is respectively connected from the output port a for selecting switch 2 different, and each
The TRST pin of the chip 1 is only connected with an output port a of the selection switch 2；
The TRST pin of the jtag interface 3 is connected with the selection end b of the selection switch 2.
Wherein, if the number of the chip is 3, the number of the output port a of the selection switch is no less than the chip
Number.Chip is provided with the first pull down resistor simultaneously, and first pull down resistor is connect with the TRST pin of the chip, the
One pull down resistor ground connection.
On the basis of the above, selecting switch can be data select switch or the second toggle switch；
To select switch be data select switch when described, and the data select switch includes: input terminal, selects end and at least
Two output ports；The chip selection circuit further include: selection signal input module；
The selection signal input module is connected with the input terminal of the data select switch, for inputting to the core
Piece carries out the selection signal of selection.
Wherein, the selection signal input module can be toggle switch；The coding category number of the toggle switch is at least
Reach the number of the output port of the data select switch；Toggle switch is connected with common end power supply.
The input terminal of data select switch includes at least two address pins, each address of the input terminal of data select switch
Pin is respectively connected with the second pull down resistor, when chip is not connected with jtag interface, by the first pull down resistor to chip
One low level is provided, normal operating conditions is at.When data select switch receives low level by the second pull down resistor
When, then it indicates at this time without selection chip.
Select switch for the second toggle switch when described；Second toggle switch includes common end and at least two outputs
Pin；
The common end of second toggle switch is connected with the TRST pin of the jtag interface；
Respectively the output pin different from second toggle switch is connected the TRST pin of each chip, and each
The TRST pin of the chip is only connected with an output pin of second toggle switch；Wherein, the second toggle switch
The number of output pin be at least the number of the chip.
When being able to achieve multiple chips 1 using foregoing circuit and being placed on same pcb board, by the TRST pin of each chip 1
It is connected from the different output ports of a selection switch, the corresponding output port of a chip selects the selection of switch
End is connected with jtag interface, is realized with this by selecting 2 pairs of switch multiple chips 1 to select, is connect to reach 1 JTAG
Mouth corresponds to the purpose of multiple chips 1, only needs a jtag interface that chip can be realized and emulate in the presence of multiple chips
The connection of device significantly reduces cost, and circuit structure is simple in the application, convenient for operation.
Now the application circuit is further introduced so that chip is dsp chip as an example.Fig. 2 is according to another exemplary
Implement a kind of structural schematic diagram of the dsp chip selection circuit exemplified；As shown in Fig. 2, a kind of dsp chip selection circuit, packet
It includes:
Jtag interface 3, selection signal input module, data select switch 2 and at least two dsp chips 1；Now with DSP core
Piece is 3, selection signal input module includes: to be illustrated for toggle switch 4:
The data select switch 2 includes output port D1, D2, D3 and D0, selects end and input terminal A1, A2；
Wherein VCC, TCK, TDI, TDO of 3 dsp chips and TMS pin pass through jtag interface 3 and directly connect with emulator
It connects, the VCC pin of dsp chip is connected with VCC (3.3V) power pins of the jtag interface；The TCK of the dsp chip draws
Foot is connected with the TCK pin of the jtag interface；The TDI pin phase of the TDI pin of the dsp chip and the jtag interface
Connection；The TMS pin of the dsp chip is connected with the TMS pin of the jtag interface；The TRST pin of jtag interface 3 with
The selection end of the data select switch 2 is connected；The input terminal of data select switch 2 is connected with toggle switch 4, for defeated
Enter the selection signal that selection is carried out to the dsp chip.Toggle switch 4 is connected with common end power supply, for providing high level.
The application uses the data select switch in 4 channels.To the A1 of data select switch, the access of A2 address pin
High level Vcc, it is intermediate to separate (toggle switch has two grades, one grade of conducting, another grade of disconnection) with toggle switch, when toggle switch
Wherein when one grade of conducting, indicate that this grade of corresponding address pin receives high level 1, when wherein one grade of disconnection of toggle switch, table
Show that this grade of corresponding address pin receives low level 0.6 be the second pull down resistor, when toggle switch 4 is all off, multichannel choosing
The address pin A1, A2 for selecting switch are connect with the second pull down resistor, are pulled down to low level, and receiving address is 00, therefore D0
Channel is strobed, selected without dsp chip.Similarly, if wanting to choose the 2nd dsp chip, the left side of toggle switch should be dialled
For closure, the right is dialled to disconnect, and makes address 10, then channel D2 is strobed.
As shown in the figure, the channel D1, D2, D3 of data select switch respectively corresponds 1 dsp chip, when data selection is opened
The address pin A1 of pass, when A2 receives signal 01,10,11, corresponding D1, D2, D3 output channel are strobed, corresponding DSP core
On piece TRST pin is connect with emulator, program burn writing can be carried out to corresponding dsp chip or in-circuit emulation is tested；Work as A1, A2
When receiving 00, D0 is strobed, and all dsp chips are not connected to emulator, and TRST pin is by dsp chips all at this time
It is low level that one pull down resistor 5, which is drawn, works in normal mode.Wherein, the signal that address pin receives can be dialled by artificially controlling
Code switch is realized.
The internal pull down resistor is connect with the TRST pin of each dsp chip respectively, the internal pull down resistor ground connection.
It should be noted that the case where Fig. 2 is only 3 DSP can be more using channel when dsp chip is more
Data select switch.
It can be when 3 dsp chips 1 be placed on same pcb board, by each DSP core using foregoing circuit
The TRST pin of piece 1 is connected with a data select switch 2, realizes a data select switch 2 to 3 dsp chips 1
Piece choosing is carried out, to achieve the purpose that the corresponding multiple dsp chips 1 of 1 jtag interface 3, due to only needing one in this circuit
The function that multiple dsp chips share a jtag interface can be realized in a jtag interface, reduces the quantity of jtag interface, greatly
Ground reduces costs, and it is simple and quick, structure is simple, small in size.
Fig. 3 is a kind of structural schematic diagram of chip control system shown according to an exemplary embodiment；As shown in figure 3,
A kind of chip control system, comprising: emulator 5 and the chip selection electricity as described above being connected with the emulator 5
Road.
Now specifically be illustrated to circuit: each chip 1 is connect by jtag interface 3 with the emulator 5 in figure.This Shen
Multiple output port a of switch 2 please be selected to be connected respectively 1 chip 1 described in circuit, select end b connection jtag interface 3,
By selecting switch 2 that the TRST pin of corresponding chip to be selected 1 can be made to be connected to the TRST pin of jtag interface 3, in turn
The chip 1 and emulator 5 are connected, and program burn writing can be carried out to corresponding chip 1 or in-circuit emulation is tested；When selection switch 2
When not connecting with any one chip 1, all chips 1 are not connected to the emulator 5, on chips 1 all at this time
It is low level that TRST pin is drawn by internal pull down resistor, works in normal mode.
The system can make multiple chips 1 share the progress program burn writing of jtag interface 2 and in-circuit emulation test, effectively save
About pcb board space and cost.In addition, realizing by hardware circuit, there is higher adaptability and reliability, it is with higher
Use value.
The application also provides a kind of chip selection device, comprising: chip selection circuit as described above.
On this basis, additionally provide another embodiment in the application: a kind of chip control system includes: emulation
Device and the chip selection device described above being connected with the emulator.It is above-described due to using in the present embodiment
Therefore chip selection device has similar beneficial effect, details are not described herein again.
One embodiment of the application also provides a kind of electrical equipment, comprising: chip selection circuit as described above.This
In embodiment, due to using above-described chip selection circuit, there is similar beneficial effect, herein no longer
It repeats.
It is understood that same or similar part can mutually refer in the various embodiments described above, in some embodiments
Unspecified content may refer to the same or similar content in other embodiments.
Although embodiments herein has been shown and described above, it is to be understood that above-described embodiment is example
Property, it should not be understood as the limitation to the application, those skilled in the art within the scope of application can be to above-mentioned
Embodiment is changed, modifies, replacement and variant.
It is understood that same or similar part can mutually refer in the various embodiments described above, in some embodiments
Unspecified content may refer to the same or similar content in other embodiments.
Although the embodiments of the present invention has been shown and described above, it is to be understood that above-described embodiment is example
Property, it is not considered as limiting the invention, those skilled in the art within the scope of the invention can be to above-mentioned
Embodiment is changed, modifies, replacement and variant.
Claims (16)
1. a kind of chip selection circuit characterized by comprising
Jtag interface, selection switch and at least two chips；The selection switch includes selection end and at least two output ports；
The chip includes TRST pin；
The TRST pin of each chip is respectively connected from the output port for selecting switch different, and each chip
TRST pin only with it is described selection switch an output port be connected；
The TRST pin of the jtag interface is connected with the selection end of the selection switch.
2. chip selection circuit according to claim 1, which is characterized in that it is described to select switch for data select switch,
The data select switch includes: selection end and at least two output ports.
3. chip selection circuit according to claim 2, which is characterized in that the data select switch further includes input
End；
The chip selection circuit further include:
Selection signal input module；
The selection signal input module is connected with the input terminal of the data select switch, for input to the chip into
The selection signal of row selection.
4. chip selection circuit according to claim 3, which is characterized in that the selection signal input module includes: to dial
Code switch；The coding category number of the toggle switch is at least up to the number of the output port of the data select switch.
5. chip selection circuit according to claim 4, which is characterized in that the toggle switch is connected with common end power supply
It connects.
6. chip selection circuit according to claim 1, which is characterized in that the number of the chip is 3, and the selection is opened
The number of the output port of pass is no less than the number of the chip.
7. chip selection circuit according to claim 1, which is characterized in that the chip is provided with the first pull down resistor,
First pull down resistor is connect with the TRST pin of the chip.
8. chip selection circuit according to claim 7, which is characterized in that the first pull down resistor ground connection.
9. chip selection circuit according to claim 2, which is characterized in that the input terminal of the data select switch includes
At least two address pins.
10. chip selection circuit according to claim 9, which is characterized in that further include: the data select switch it is defeated
Each address pin for entering end is respectively connected with the second pull down resistor.
11. chip selection circuit according to claim 10, which is characterized in that the number of second pull down resistor and institute
The number for stating address pin is identical.
12. chip selection circuit according to claim 10, which is characterized in that the second pull down resistor ground connection.
13. chip selection circuit according to claim 1, which is characterized in that
The chip further includes VCC pin, TCK pin, TDI pin and TMS pin；
The VCC pin of the chip is connected with the VCC power pins of the jtag interface；
The TCK pin of the chip is connected with the TCK pin of the jtag interface；
The TDI pin of the chip is connected with the TDI pin of the jtag interface；
The TMS pin of the chip is connected with the TMS pin of the jtag interface.
14. a kind of chip selection device characterized by comprising such as the described in any item chip selection electricity of claim 1-13
Road.
15. a kind of chip control system characterized by comprising emulator and be connected with the emulator as right is wanted
Seek the described in any item chip selection circuits of 1-13；
Alternatively, emulator and the chip selection device as claimed in claim 14 being connected with the emulator.
16. a kind of electrical equipment characterized by comprising such as the described in any item chip selection circuits of claim 1-13；
Or chip selection device as claimed in claim 14.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810887881.1A CN109062099A (en) | 2018-08-06 | 2018-08-06 | DSP chip selection circuit and related equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810887881.1A CN109062099A (en) | 2018-08-06 | 2018-08-06 | DSP chip selection circuit and related equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109062099A true CN109062099A (en) | 2018-12-21 |
Family
ID=64831737
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810887881.1A Pending CN109062099A (en) | 2018-08-06 | 2018-08-06 | DSP chip selection circuit and related equipment |
Country Status (1)
| Country | Link |
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| CN (1) | CN109062099A (en) |
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| CN112084001A (en) * | 2020-07-22 | 2020-12-15 | 北京杰创永恒科技有限公司 | Simulator based on STM32 chip |
| CN113064470A (en) * | 2021-03-12 | 2021-07-02 | 山东英信计算机技术有限公司 | A server backplane expansion device and its working method |
| CN114996189A (en) * | 2022-05-27 | 2022-09-02 | 联想(北京)信息技术有限公司 | Circuit structure and electronic equipment |
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| CN114996189A (en) * | 2022-05-27 | 2022-09-02 | 联想(北京)信息技术有限公司 | Circuit structure and electronic equipment |
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Application publication date: 20181221 |
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| RJ01 | Rejection of invention patent application after publication |