CN108982960A - A kind of capacitance current of distribution network measurement method and device - Google Patents

A kind of capacitance current of distribution network measurement method and device Download PDF

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Publication number
CN108982960A
CN108982960A CN201810917706.2A CN201810917706A CN108982960A CN 108982960 A CN108982960 A CN 108982960A CN 201810917706 A CN201810917706 A CN 201810917706A CN 108982960 A CN108982960 A CN 108982960A
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pin
voltage
chip
rtl8201bl
resistance
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CN108982960B (en
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王清亮
李洋
高梅
杨博
秦洁
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Xi'an Duopuduo Information Technology Co ltd
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Xian University of Science and Technology
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques

Abstract

The invention discloses a kind of capacitance current of distribution network measurement method and device, method is comprising steps of one, bus residual voltage and each non-faulting feeder line zero-sequence current data acquisition；Two, the calculating of residual voltage virtual value and each non-faulting feeder line zero sequence reactive power；Three, the calculating of the harmonic wave susceptance of each non-faulting feeder line；Four, the calculating of the sum of harmonic wave susceptance of all non-faulting feeder lines；Five, in residual voltage each harmonic voltage effective value calculating；Six, harmonic wave influences the calculating of coefficient；Seven, the calculating of the capacitive susceptance under all non-fault line fundamental waves；Eight, the calculating of all non-faulting feeder line capacitance currents；Nine, the calculating of fault feeder capacitance current；Ten, the calculating of capacitance current of distribution network；Its device includes processor, power circuit, ethernet communication circuit module, zero sequence voltage detection circuit and multiple feeder line circuit measuring zero phase sequence currents.The present invention is influenced suitable for signal distortion situation, not by neutral operation method, is not influenced power distribution network normal operation.

Description

A kind of capacitance current of distribution network measurement method and device
Technical field
The invention belongs to power supply safety technical fields, and in particular to a kind of capacitance current of distribution network measurement method and device.
Background technique
Capacitance current of distribution network level is evaluation one of power distribution network Supply Security and the important indicator of reliability.Work as power supply When system capacitive current value is exceeded, the electric arc of Single-phase Ground Connection Failure is unable to automatic distinguishing, easily generates and is up to voltage rating 2.5 ~3.0 times of arc overvoltage endangers the insulation of route and electrical equipment, short circuit accident is caused to cause system blackout.Capacitor electricity Flow horizontal is the important evidence of power supply system Operation Mode Selection, the DL/T620-1997 " overvoltage protection of alternating-current electric device And Insulation Coordination " regulation: the overhead transmission line of 3kV~10kV constitutes power distribution network, should install and disappear when system capacitive current is greater than 10A Arc coil；" safety regulations in coal mine " the 453rd article of regulation: mining high-voltage electric-network must take measures to limit capacitance current of distribution network not Therefore more than 20A, measurement capacitance current of distribution network is one of the important measures for guaranteeing safe operation of power system.
Currently, capacitance current measurement method can be divided into two class of direct method and indirect method.Direct method is directly to measure system electricity Capacitance current mainly has single phase metal to be grounded method, single phase to ground via resistance method.Both methods needs artificial progress single-phase earthing Experiment measures earth current.Direct method needs operator that measuring device is articulated on primary side when measuring, patching operations mistake Journey is cumbersome, and a large amount of time is wasted in out operation order, on grid switching operation, and all exists centainly to survey crew and distribution system Security risk.Indirect method includes the additional capacitance method of neutral point, Biased capacitor method, signal injection method etc..It is additional using neutral point Capacitance measurement is needed in primary side wiring, if the single-phase earthing of system generation at this time punctures extra capacitor, can jeopardize people Member's safety.Biased capacitor method in primary side there is still a need for being operated, and complicated for operation, time is long, and there are security risks.Signal Injection method injects alien frequencies signal in voltage transformer open-delta, but tests complexity height, heavy workload, test period It is long, and since Injection Signal size is difficult to choose, it is fallen into oblivion vulnerable to system background signal, measured signal is faint, therefore causes Error is larger.
In recent years, as user's nonlinear load largely accesses power grid, so that the background harmonic voltage of distribution network system side Increase, singlephase earth fault occurs often with this arc overvoltage, residual voltage, zero-sequence current distortion are serious, and existing Capacitance current measurement method does not consider the influence of signal distortion, this will lead to resultant error increase.Existing capacitance current is surveyed Measuring device of the amount method outside measurement process plus, wiring is complicated, and time is long, all there is safety to system and personnel Hidden danger, and can not monitor on-line for a long time.
Summary of the invention
In view of the above-mentioned deficiencies in the prior art, the technical problem to be solved by the present invention is that providing a kind of method and step Simply, it realizes that simple, at low cost, detected signal is obvious, be suitable for the case where signal distortion, not by neutral operation method shadow It rings, does not influence power distribution network normal operation, is applied widely, convenient for popularization and use capacitance current of distribution network measurement method.
In order to solve the above technical problems, the technical solution adopted by the present invention is that: a kind of capacitance current of distribution network measurement method, It is characterized in that, method includes the following steps:
Step 1: bus residual voltage and each non-faulting feeder line zero-sequence current data acquisition: when distribution network system occurs When transient single-phase earth fault, by all non-faulting feeder lines number be 1,2 ..., M, wherein M be it is non-in distribution network system therefore Hinder the total number of feeder line；Zero sequence voltage detection circuit distribution network system occurs the bus zero sequence after transient single-phase earth fault Voltage is measured in real time, and M feeder line circuit measuring zero phase sequence current respectively carries out the zero-sequence current of M non-faulting feeder line real-time It detects, the bus that zero sequence voltage detection circuit detects after processor acquisition distribution network system generation transient single-phase earth fault N number of instantaneous value u in one cycle of residual voltage1、u2、…、uN, and acquire distribution network system and the event of instantaneity single-phase earthing occurs The M group zero-sequence current instantaneous value that M feeder line circuit measuring zero phase sequence current detects after barrier, wherein m-th of feeder line zero-sequence current inspection N number of instantaneous value in one cycle of zero-sequence current for the non-faulting feeder line that the number that slowdown monitoring circuit detects is m is expressed as im1、 im2、…、imN, the value of m is the natural number of 1~M；
Step 2: the calculating of the zero sequence reactive power of residual voltage virtual value and each non-faulting feeder line: processor according to FormulaIt calculates distribution network system and the residual voltage virtual value U after transient single-phase earth fault occurs0, and root The idle function of zero sequence of each non-faulting feeder line is calculated according to the zero-sequence current sampled value of bus residual voltage and each non-faulting feeder line Rate；Wherein, the zero sequence reactive power for the non-faulting feeder line that number is m is expressed as Qm；ukIt is single-phase that instantaneity occurs for distribution network system K-th of instantaneous value in one cycle of bus residual voltage that zero sequence voltage detection circuit detects after ground fault, the value of k For the natural number of 1~N；
Step 3: the calculating of the harmonic wave susceptance of each non-faulting feeder line: processor is according to residual voltage virtual value and each item The zero sequence reactive power of non-faulting feeder line calculates the harmonic wave susceptance of each non-faulting feeder line；Wherein, the non-faulting feeder line that number is m Harmonic wave susceptance BmCalculation formula be
Step 4: the calculating of the sum of harmonic wave susceptance of all non-faulting feeder lines: processor is according to formula Bf=B1+B2+…+ BmCalculate the sum of the harmonic wave susceptance of all non-faulting feeder lines Bf；
Step 5: in residual voltage each harmonic voltage effective value calculating: firstly, processor call FFT decomposing module FFT decomposition is carried out to residual voltage, obtains fundamental voltage RMS U1With each harmonic voltage containing ratio；Then, processor root According to fundamental voltage RMS U1Each harmonic voltage effective value is calculated with each harmonic voltage containing ratio；Wherein, h subharmonic voltage Containing ratio is expressed as HRUh, h subharmonic voltage virtual value UhCalculation formula be Uh=U1×HRUh, the value of h is between 1~H The harmonic voltage number that FFT is decomposed, H are the harmonic voltage number maximum value that FFT is decomposed；
Step 6: harmonic wave influences the calculating of coefficient: processor is according to formulaCalculating harmonic wave influences coefficient P, wherein p1For the ratio between fundamental voltage RMS and residual voltage virtual value andphFor h subharmonic voltage virtual value with The ratio between residual voltage virtual value and
Step 7: the calculating of the capacitive susceptance under all non-fault line fundamental waves: processor is according to formulaIt calculates Capacitive susceptance B under all non-fault line fundamental wavesjb；
Step 8: the calculating of all non-faulting feeder line capacitance currents: processor is according to formula IfC=BjbU0It calculates all non- The capacitance current I of fault feederfC；
Step 9: fault feeder capacitance current IgCCalculating；
Step 10: capacitance current of distribution network ICCalculating: processor is according to formula IC=IfC+IgCCalculate power distribution network capacitor electricity Flow IC。
Above-mentioned a kind of capacitance current of distribution network measurement method, it is characterised in that: processor is according to mother described in step 2 When the zero-sequence current sampled value of line residual voltage and each non-faulting feeder line calculates the zero sequence reactive power of each non-faulting feeder line, The zero sequence reactive power Q for the non-faulting feeder line that wherein number is mmCalculation formula beH[uk] it is pair ukCarry out Hilbert transformation, imkThe non-faulting feeder line that the number detected for m-th of feeder line circuit measuring zero phase sequence current is m K-th of instantaneous value in one cycle of zero-sequence current.
A kind of above-mentioned capacitance current of distribution network measurement method, it is characterised in that: fault feeder capacitor described in step 9 Electric current IgCCalculation method are as follows: being divided to fault feeder is that two kinds of situations of cable run or overhead transmission line calculate fault feeder capacitors electricity Flow IgC, when fault feeder is cable run, processor is according to formula IgC=KUnL calculates fault feeder capacitance current IgC, wherein K be fault feeder capacitance current design factor andS is the sectional area of cable run, UnFor Cable run rated line voltage, L are the length of cable run；When fault feeder is overhead transmission line, processor is according to formula IgC =2.7Un' L ' calculating fault feeder capacitance current IgC, wherein Un' it is overhead transmission line rated line voltage, L ' is overhead line The length on road.
The present invention also provides a kind of circuit structures it is simple, novel in design rationally, realize it is convenient, versatile, convenient for pushing away The capacitance current of distribution network measuring device extensively used, it is characterised in that: including processor and be power unit power supply each in device Power circuit, and the ethernet communication circuit module to connect with processor；The input of the processor be terminated with for pair The zero sequence voltage detection electricity that bus residual voltage after distribution network system generation transient single-phase earth fault is measured in real time Road and multiple feeder line circuit measuring zero phase sequence currents that the zero-sequence current of a plurality of non-faulting feeder line is measured in real time respectively.
Above-mentioned device, it is characterised in that: the power circuit includes 5V Switching Power Supply and the output with 5V Switching Power Supply 5V to the 3.3V voltage conversion circuit of connection is held, the output end of the 5V Switching Power Supply is the+5V voltage output end of power circuit, 5V to the 3.3V voltage conversion circuit includes voltage stabilizing chip AMS1117, inductance L2, polar capacitor C7, polar capacitor C8, non-pole Property capacitor C9 and the 3rd pin of nonpolar capacitor C10, the voltage stabilizing chip AMS1117, polar capacitor C7 anode and nonpolarity One end of capacitor C9 is connect with the voltage output end of 5V Switching Power Supply, the cathode of the polar capacitor C7 and nonpolar capacitor C9 The other end be grounded, the one end of the anode of the 2nd pin of the voltage stabilizing chip AMS1117 and polar capacitor C8 with inductance L2 Connection, the other end of the inductance L2 connect with one end of nonpolar capacitor C10, and are 5V to 3.3V voltage conversion circuit 3.3V voltage output end, the 1st pin of the voltage stabilizing chip AMS1117, the cathode of polar capacitor C8 and nonpolar capacitor C10 The other end is grounded；The 3.3V voltage output end of 5V to the 3.3V voltage conversion circuit is that+3.3V the voltage of power circuit is defeated Outlet.
Above-mentioned device, it is characterised in that: the processor includes DSP digital signal processor TMS320F2812.
Above-mentioned device, it is characterised in that: the zero sequence voltage detection circuit includes three-phase five-pole voltage transformer PT1, voltage transformer TV1, Transient Suppression Diode TVS1, porous magnetic bead CR1, resistance R1 and nonpolar capacitor C1, described three One end of the first winding of one end of the auxiliary secondary winding of phase pentastyle voltage transformer pt 1 and the voltage transformer TV1 Connect, the one of the other end of the auxiliary secondary winding of the three-phase five-pole voltage transformer PT1 and the voltage transformer TV1 The other end of secondary winding connects, one end of secondary winding and the drawing for Transient Suppression Diode TVS1 of the voltage transformer TV1 The pin 1 of foot 1 and porous magnetic bead CR1 connect, and the other end and transient state of the secondary winding of the voltage transformer TV1 inhibit two poles The pin 4 of the pin 2 of pipe TVS1 and porous magnetic bead CR1 connect, one end phase of the pin 2 and resistance R1 of the porous magnetic bead CR1 It connects, the other end of the resistance R1 connects with one end of nonpolar capacitor C1 and be the zero sequence electricity of the zero sequence voltage detection circuit Output end V_OUT is pressed, the pin 3 of the porous magnetic bead CR1 and the other end of nonpolarity capacitor C1 are grounded；The residual voltage The ADC input port of the residual voltage output end V_OUT and DSP digital signal processor TMS320F2812 of detection circuit are connect.
Above-mentioned device, it is characterised in that: the circuit structure of multiple feeder line circuit measuring zero phase sequence currents is identical and equal Including zero sequence current mutual inductor CT1, voltage transformer TV2, Transient Suppression Diode TVS2, porous magnetic bead CR2, resistance R2, electricity Hinder an output end of R3 and nonpolar capacitor C2, the zero sequence current mutual inductor CT1 and one end and the mutual induction of voltage of resistance R3 One end of the first winding of device TV2 connects, and the another output of the first zero sequence current mutual inductor CT1 is another with resistance R3's The other end of the first winding of one end and voltage transformer TV2 connects, one end of the secondary winding of the voltage transformer TV2 with The pin 1 of the pin 1 of Transient Suppression Diode TVS2 and porous magnetic bead CR2 connect, the secondary winding of the voltage transformer TV2 The other end connect with the pin 4 of the pin 2 of Transient Suppression Diode TVS2 and porous magnetic bead CR2, the porous magnetic bead CR2's Pin 2 connects with one end of resistance R2, and the other end of the resistance R2 connects with one end of nonpolar capacitor C2 and is feeder line zero The pin 3 of zero-sequence current the output end I_OUT, the porous magnetic bead CR2 of sequence current detection circuit are another with nonpolar capacitor C2's One end is grounded；The zero-sequence current output end I_OUT and DSP digital signal processor of the feeder line circuit measuring zero phase sequence current The ADC input port of TMS320F2812 connects.
Above-mentioned device, it is characterised in that: the ethernet communication circuit module includes chips W 3100A, chip RTL8201BL, RJ45 interface N1, crystal oscillator X2, polar capacitor C68 and polar capacitor C71, magnetic bead CR38, nonpolar capacitor C48, Nonpolar capacitor C65, nonpolar capacitor C66, nonpolar capacitor C67, nonpolarity capacitor C69 and nonpolar capacitor C72, Yi Ji electricity Hinder R32, resistance R33, resistance R34, resistance R35 and resistance R93；At the 1st pin and DSP digital signal of the chips W 3100A Manage the 25th pin connection of device TMS320F2812, the 2nd pin, the 12nd pin, the 22nd pin, the 38th of the chips W 3100A Pin, the 39th pin, the 47th pin and the 58th pin are connect with+the 3.3V of power circuit voltage output end, the chip The 3rd pin, the 13rd pin, the 23rd pin, the 45th pin, the 54th pin, the 56th pin and the 57th pin of W3100A is grounded, The 4th pin of the chips W 3100A is connect with the 47th pin of chip RTL8201BL, and the 21st~14 of the chips W 3100A the Pin is corresponding in turn to be drawn with the 18th pin of DSP digital signal processor TMS320F2812, the 43rd pin, the 80th pin, the 85th Foot, the 103rd pin, the 108th pin, the 111st pin, the connection of the 118th pin, the 11st~5 pin of the chips W 3100A according to The 121st pin of secondary correspondence and DSP digital signal processor TMS320F2812, the 125th pin, the 130th pin, the 132nd are drawn Foot, the 138th pin, the 141st pin and the connection of the 144th pin, the 32nd~29 pin and the 27th~24 of the chips W 3100A Pin is corresponding in turn to be drawn with the 21st pin of DSP digital signal processor TMS320F2812, the 24th pin, the 27th pin, the 30th Foot, the 33rd pin, the 36th pin, the 39th pin and the connection of the 54th pin, the 33rd pin of the chips W 3100A, the 37th are drawn Foot, the 59th pin and the 60th pin are grounded, the 34th pin of the chips W 3100A and the 10th pin of chip RTL8201BL It is connected by+3.3V the voltage output end of resistance R29 and power circuit, the 35th pin of the chips W 3100A passes through resistance The connection of+the 3.3V of R67 and power circuit voltage output end, the 36th pin of the chips W 3100A is with chip RTL8201BL's The connection of the 11st pin of 9th pin and RJ45 interface N1 and the+3.3V voltage output end company for passing through resistance R31 and power circuit It connecing, the 40th pin of the chips W 3100A is connect with the 21st pin of chip RTL8201BL, and the 41st of the chips W 3100A the Pin is connect with the 20th pin of chip RTL8201BL, and the of the 42nd pin of the chips W 3100A and chip RTL8201BL The connection of 19 pins, the 43rd pin of the chips W 3100A are connect with the 18th pin of chip RTL8201BL, the chip The 44th pin of W3100A is connect with the 22nd pin of chip RTL8201BL, the 46th pin and chip of the chips W 3100A The 16th pin of RTL8201BL connects, and the 48th pin of the chips W 3100A is connect with the 1st pin of chip RTL8201BL, The 49th pin of the chips W 3100A is connect with the 6th pin of chip RTL8201BL, the 50th pin of the chips W 3100A It is connect with the 5th pin of chip RTL8201BL, the 51st pin of the chips W 3100A and the 4th pin of chip RTL8201BL Connection, the 52nd pin of the chips W 3100A connect with the 3rd pin of chip RTL8201BL, and the of the chips W 3100A 53 pins are connect with the 2nd pin of chip RTL8201BL, and the 55th pin of the chips W 3100A is with chip RTL8201BL's The connection of 7th pin, the 61st pin of the chips W 3100A and the 149th pin of DSP digital signal processor TMS320F2812 Connection, the 62nd pin of the chips W 3100A are connect with the 84th pin of DSP digital signal processor TMS320F2812, institute The 63rd pin for stating chips W 3100A is connect with the 42nd pin of DSP digital signal processor TMS320F2812；The chip The 8th pin of RTL8201BL connect with one end of magnetic bead CR38 and is grounded by nonpolarity capacitor C49, the magnetic bead CR38's The other end is connect with the anode of the 32nd pin of chip RTL8201BL, one end of nonpolar capacitor C67 and polar capacitor C68, institute The 11st pin, the 17th pin, the 24th pin, the 29th pin and the 35th pin for stating chip RTL8201BL are grounded, the chip The 12nd pin of RTL8201BL is grounded by resistance R28, and the 13rd pin of the chip RTL8201BL is with RJ45 interface N1's 9th pin is connected and is grounded by resistance R27, the 14th pin and the 48th pin and nonpolarity of the chip RTL8201BL One end of one end of capacitor C48, one end of nonpolar capacitor C72 and magnetic bead CR39 with the+3.3V of power circuit voltage output End connection, the 15th pin of the chip RTL8201BL are grounded by resistance R25, the 45th pin of the chip RTL8201BL And the other end of nonpolar capacitor C48 and the other end of nonpolar capacitor C72 are grounded, the of the chip RTL8201BL 25 pins are grounded by resistance R91, and the 26th pin of the chip RTL8201BL passes through the+3.3V of resistance R92 and power circuit Voltage output end connection, the 28th pin of the chip RTL8201BL are connect with one end of resistance R93, and the resistance R93's is another The cathode of one end, the other end of nonpolar capacitor C67 and polar capacitor C68 is grounded, and the 30th of the chip RTL8201BL is drawn Foot is connect with one end of the 8th pin of RJ45 interface N1 and resistance R35, the 31st pin and RJ45 of the chip RTL8201BL The 7th pin of interface N1 is connected with one end of resistance R34, and the other end of the resistance R35 and the other end of resistance R34 pass through One end of capacitor C51 ground connection, the 33rd pin of the chip RTL8201BL and the 2nd pin of RJ45 interface N1 and resistance R33 connect It connects, the 34th pin of the chip RTL8201BL is connect with one end of the pin 1 of RJ45 interface N1 and resistance R32, the resistance The other end of R33 and the other end of resistance R32 pass through capacitor C50 and are grounded, and the pin 6 of the RJ45 interface N1 passes through capacitor C5 Ground connection, the pin 10 of the RJ45 interface N1 are grounded by resistance R26, and the pin 12 of the RJ45 interface N1 passes through resistance R30 It is connect with+the 3.3V of power circuit voltage output end, the 13rd pin and the 14th pin of the RJ45 interface N1 is grounded, described The 36th pin of chip RTL8201BL is another with one end of nonpolar capacitor C69, the anode of polar capacitor C71 and magnetic bead CR39's One end connection, the other end of the nonpolarity capacitor C69 and the cathode of polar capacitor C71 are grounded, the chip RTL8201BL The 37th pin connected by+3.3V the voltage output end of resistance R100 and power circuit, the 38th of the chip RTL8201BL the Pin is connected by+3.3V the voltage output end of resistance R88 and power circuit, and the 39th pin of the chip RTL8201BL is logical + 3.3V the voltage output end for crossing resistance R101 and power circuit connects, and the 40th pin of the chip RTL8201BL passes through resistance 41st pin of R89 ground connection, the chip RTL8201BL is connected by+3.3V the voltage output end of resistance R86 and power circuit It connects, the 43rd pin of the chip RTL8201BL is grounded by resistance R90, and the 44th pin of the chip RTL8201BL passes through The connection of+3.3V the voltage output end of resistance R87 and power circuit, the 46th pin of the chip RTL8201BL is with crystal oscillator X2's One end is connected with one end of nonpolar capacitor C65, the 47th pin of the chip RTL8201BL and the other end of crystal oscillator X2 and non- One end of polar capacitor C66 connects, and the other end of the other end of the nonpolarity capacitor C65 and nonpolar capacitor C66 are grounded.
Compared with the prior art, the present invention has the following advantages:
1, the method and step of capacitance current of distribution network measurement method of the present invention is simple, and it is convenient and at low cost to realize, is applicable in model It encloses wide.
2, the present invention utilizes the characteristic of power distribution network itself, i.e. transient single-phase earth fault frequent occurrence, only need to be in distribution Net occurs to measure residual voltage and each feeder line head end zero-sequence current at bus when transient single-phase earth fault, then through the invention Method operation, it will be able to the measurement for realizing capacitance current of distribution network, do not need it is artificial measuring device is articulated in primary side, Without installing numerous measuring devices in primary side, safer, realization simply, therefore is more suitable for engineer application.
3, the present invention considers voltage and current aberration problems, and it is equivalent to carry out non-faulting feeder line using Fryze Power Theory The calculating of susceptance, be suitable for signal distortion the case where, do not need to be filtered collected voltage and current signal, effectively avoid Error caused by existing spectrum leakage is filtered, also avoids filtering in weak output signal that filter effect is undesirable to ask Topic, effectively increases measurement accuracy.
4, The present invention gives transient single-phase earth fault signal occurs using distribution network system to calculate small current neutral grounding The new method of system capacitive current has many advantages, such as that measured signal is obvious, easy to accomplish, is easy to get high-precision measurement knot Fruit.
5, capacitance current of distribution network measurement method of the invention, is not influenced by neutral operation method, does not influence power distribution network It operates normally, it is applied widely；Such as additional measuring device of existing method needs to exit arc suppression coil, and tuning method needs to adjust extinguishing arc Coil inductance, injection method harmonic signal have an impact to system normal operation；The present invention occurs frequently using in power distribution network The very high transient single-phase earth fault of rate does not have any additional operations to system, therefore operates normally no shadow to system It rings.
6, the circuit structure of capacitance current of distribution network measuring device of the present invention is simple, novel in design reasonable, and it is convenient to realize.
In conclusion novel design of the invention is rationally, measured signal is obvious, easy to accomplish, at low cost, is suitable for letter Number distortion the case where, do not influenced by neutral operation method, do not influence power distribution network normal operation, it is applied widely, convenient for promote It uses.
Below by drawings and examples, technical scheme of the present invention will be described in further detail.
Detailed description of the invention
Fig. 1 is the method flow block diagram of capacitance current of distribution network measurement method of the present invention.
Fig. 2 is the schematic block circuit diagram of capacitance current of distribution network measuring device of the present invention.
Fig. 3 is the circuit diagram of 5V to 3.3V voltage conversion circuit of the present invention.
Fig. 4 is the circuit diagram of processor of the present invention.
Fig. 5 is the circuit diagram of zero sequence voltage detection circuit of the present invention.
Fig. 6 is the circuit diagram of feeder line circuit measuring zero phase sequence current of the present invention.
Fig. 7 is the circuit diagram of ethernet communication circuit module of the present invention.
Fig. 8 is the power distribution network cabling diagram that use is emulated in the specific embodiment of the invention.
Fig. 9 is bus zero sequence electricity after the generation transient single-phase earth fault emulated in the specific embodiment of the invention Corrugating figure.
Figure 10 is the zero sequence for the non-faulting feeder line (feeder line 1) that the number emulated in the specific embodiment of the invention is 1 Current waveform figure.
Figure 11 is the zero sequence for the non-faulting feeder line (feeder line 2) that the number emulated in the specific embodiment of the invention is 2 Current waveform figure.
Figure 12 is the zero sequence for the non-faulting feeder line (feeder line 3) that the number emulated in the specific embodiment of the invention is 3 Current waveform figure.
Figure 13 is the zero sequence for the non-faulting feeder line (feeder line 4) that the number emulated in the specific embodiment of the invention is 4 Current waveform figure.
Figure 14 is the zero of the transient single-phase earth fault route (feeder line 5) emulated in the specific embodiment of the invention Sequence current waveform figure.
Figure 15 is to carry out the residual voltage spectrogram that FFT is decomposed to residual voltage in the specific embodiment of the invention.
Description of symbols:
1-zero sequence voltage detection circuit；2-feeder line circuit measuring zero phase sequence currents；3-processors；
4-ethernet communication circuit modules；5-power circuits.
Specific embodiment
As shown in Figure 1, capacitance current of distribution network measurement method of the invention, comprising the following steps:
Step 1: bus residual voltage and each non-faulting feeder line zero-sequence current data acquisition: when distribution network system occurs When transient single-phase earth fault, by all non-faulting feeder lines number be 1,2 ..., M, wherein M be it is non-in distribution network system therefore Hinder the total number of feeder line；Zero sequence voltage detection circuit 1 distribution network system occurs the bus zero after transient single-phase earth fault Sequence voltage is measured in real time, and M feeder line circuit measuring zero phase sequence current 2 respectively carries out the zero-sequence current of M non-faulting feeder line Real-time detection, processor 3 acquire zero sequence voltage detection circuit 1 after transient single-phase earth fault occurs for distribution network system and detect One cycle of bus residual voltage in N number of instantaneous value u1、u2、…、uN, and it is single-phase to acquire distribution network system generation instantaneity The M group zero-sequence current instantaneous value that M feeder line circuit measuring zero phase sequence current 2 detects after ground fault, wherein every group of zero-sequence current Instantaneous value includes that distribution network system generation transient single-phase earth fault the latter feeder line circuit measuring zero phase sequence current 2 detects A non-faulting feeder line one cycle of zero-sequence current in N number of instantaneous value, m-th feeder line circuit measuring zero phase sequence current 2 examine N number of instantaneous value in one cycle of zero-sequence current for the non-faulting feeder line that the number measured is m is expressed as im1、im2、…、imN, m Value be 1~M natural number；
Step 2: the calculating of the zero sequence reactive power of residual voltage virtual value and each non-faulting feeder line: 3 basis of processor FormulaIt calculates distribution network system and the residual voltage virtual value U after transient single-phase earth fault occurs0, and root The idle function of zero sequence of each non-faulting feeder line is calculated according to the zero-sequence current sampled value of bus residual voltage and each non-faulting feeder line Rate；Wherein, the zero sequence reactive power for the non-faulting feeder line that number is m is expressed as Qm；ukIt is single-phase that instantaneity occurs for distribution network system K-th of instantaneous value in one cycle of bus residual voltage that zero sequence voltage detection circuit 1 detects after ground fault, k's takes Value is the natural number of 1~N；
In the present embodiment, processor 3 described in step 2 is according to the zero sequence of bus residual voltage and each non-faulting feeder line When current sampling data calculates the zero sequence reactive power of each non-faulting feeder line, wherein number be m non-faulting feeder line zero sequence without Function power QmCalculation formula beH[uk] it is to ukCarry out Hilbert transformation, imkFor m-th of feeder line K-th in one cycle of zero-sequence current for the non-faulting feeder line that the number that circuit measuring zero phase sequence current 2 detects is m is instantaneous Value.
Step 3: the calculating of the harmonic wave susceptance of each non-faulting feeder line: processor 3 is according to residual voltage virtual value and each item The zero sequence reactive power of non-faulting feeder line calculates the harmonic wave susceptance of each non-faulting feeder line；Wherein, the non-faulting feeder line that number is m Harmonic wave susceptance BmCalculation formula be
Step 4: the calculating of the sum of harmonic wave susceptance of all non-faulting feeder lines: processor 3 is according to formula Bf=B1+B2+…+ BmCalculate the sum of the harmonic wave susceptance of all non-faulting feeder lines Bf；
Step 5: in residual voltage each harmonic voltage effective value calculating: firstly, processor 3 call FFT decomposing module FFT decomposition is carried out to residual voltage, obtains fundamental voltage RMS U1With each harmonic voltage containing ratio；Then, processor 3 According to fundamental voltage RMS U1Each harmonic voltage effective value is calculated with each harmonic voltage containing ratio；Wherein, h subharmonic voltage Containing ratio is expressed as HRUh, h subharmonic voltage virtual value UhCalculation formula be Uh=U1×HRUh, the value of h is between 1~H The harmonic voltage number that FFT is decomposed, H are the harmonic voltage number maximum value that FFT is decomposed；
Step 6: harmonic wave influences the calculating of coefficient: processor 3 is according to formulaCalculating harmonic wave influences coefficient P, wherein p1For the ratio between fundamental voltage RMS and residual voltage virtual value andphFor h subharmonic voltage virtual value with The ratio between residual voltage virtual value and
Step 7: the calculating of the capacitive susceptance under all non-fault line fundamental waves: processor 3 is according to formulaMeter Calculate the capacitive susceptance B under all non-fault line fundamental wavesjb；
Step 8: the calculating of all non-faulting feeder line capacitance currents: processor 3 is according to formula IfC=BjbU0It calculates all non- The capacitance current I of fault feederfC；
Step 9: fault feeder capacitance current IgCCalculating；
In the present embodiment, the I of fault feeder capacitance current described in step 9gCCalculation method are as follows: divide fault feeder be electricity The two kinds of situations in cable road or overhead transmission line calculate fault feeder capacitance current IgC, when fault feeder is cable run, processing Device 3 is according to formula IgC=KUnL calculates fault feeder capacitance current IgC, wherein K is that fault feeder capacitance current calculates system Number andS is sectional area (the unit mm of cable run2), UnFor cable run rated line voltage (unit It is the length (unit km) of cable run for kV), L；When fault feeder is overhead transmission line, processor 3 is according to formula IgC= 2.7·Un' L ' calculating fault feeder capacitance current IgC, wherein Un' it is overhead transmission line rated line voltage (unit kV), L ' For the length (unit km) of overhead transmission line.
Step 10: capacitance current of distribution network ICCalculating: processor 3 is according to formula IC=IfC+IgCCalculate power distribution network capacitor Electric current IC。
As shown in Fig. 2, capacitance current of distribution network measuring device of the invention, including processor 3 and be each electricity consumption in device The power circuit 5 of unit power supply, and the ethernet communication circuit module 4 to connect with processor 3；The input of the processor 3 It is terminated with zero for being measured in real time to the bus residual voltage after distribution network system generation transient single-phase earth fault Sequence voltage detection circuit 1 and multiple feeder line zero-sequence currents that the zero-sequence current of a plurality of non-faulting feeder line is measured in real time respectively Detection circuit 2.
In the present embodiment, as shown in figure 3, the power circuit 5 includes 5V Switching Power Supply and the output with 5V Switching Power Supply 5V to the 3.3V voltage conversion circuit of connection is held, the output end of the 5V Switching Power Supply is the+5V voltage output of power circuit 5 End, 5V to the 3.3V voltage conversion circuit include voltage stabilizing chip AMS1117, inductance L2, polar capacitor C7, polar capacitor C8, The 3rd pin of nonpolar capacitor C9 and nonpolar capacitor C10, the voltage stabilizing chip AMS1117, polar capacitor C7 it is positive and non- One end of polar capacitor C9 is connect with the voltage output end of 5V Switching Power Supply, cathode and the nonpolarity electricity of the polar capacitor C7 The other end for holding C9 is grounded, and the 2nd pin of the voltage stabilizing chip AMS1117 and the anode of polar capacitor C8 are with inductance L2's One end connection, the other end of the inductance L2 connect with one end of nonpolar capacitor C10, and are 5V to 3.3V voltage conversion circuit 3.3V voltage output end, the 1st pin of the voltage stabilizing chip AMS1117, the cathode of polar capacitor C8 and nonpolar capacitor C10 The other end be grounded；The 3.3V voltage output end of 5V to the 3.3V voltage conversion circuit is the+3.3V voltage of power circuit 5 Output end.
In the present embodiment, as shown in figure 4, the processor 3 includes DSP digital signal processor TMS320F2812.
In the present embodiment, as shown in figure 5, the zero sequence voltage detection circuit 1 includes three-phase five-pole voltage transformer PT1, voltage transformer TV1, Transient Suppression Diode TVS1, porous magnetic bead CR1, resistance R1 and nonpolar capacitor C1, described three One end of the first winding of one end of the auxiliary secondary winding of phase pentastyle voltage transformer pt 1 and the voltage transformer TV1 Connect, the one of the other end of the auxiliary secondary winding of the three-phase five-pole voltage transformer PT1 and the voltage transformer TV1 The other end of secondary winding connects, one end of secondary winding and the drawing for Transient Suppression Diode TVS1 of the voltage transformer TV1 The pin 1 of foot 1 and porous magnetic bead CR1 connect, and the other end and transient state of the secondary winding of the voltage transformer TV1 inhibit two poles The pin 4 of the pin 2 of pipe TVS1 and porous magnetic bead CR1 connect, one end phase of the pin 2 and resistance R1 of the porous magnetic bead CR1 It connects, the other end of the resistance R1 connects with one end of nonpolar capacitor C1 and be the zero sequence of the zero sequence voltage detection circuit 1 The other end of the pin 3 of voltage output end V_OUT, the porous magnetic bead CR1 and nonpolar capacitor C1 are grounded；The zero sequence electricity The ADC input port of the residual voltage output end V_OUT and DSP digital signal processor TMS320F2812 of detection circuit 1 is pressed to connect It connects.
In the present embodiment, as shown in fig. 6, the circuit structure of multiple feeder line circuit measuring zero phase sequence currents 2 is identical and equal Including zero sequence current mutual inductor CT1, voltage transformer TV2, Transient Suppression Diode TVS2, porous magnetic bead CR2, resistance R2, electricity Hinder an output end of R3 and nonpolar capacitor C2, the zero sequence current mutual inductor CT1 and one end and the mutual induction of voltage of resistance R3 One end of the first winding of device TV2 connects, and the another output of the first zero sequence current mutual inductor CT1 is another with resistance R3's The other end of the first winding of one end and voltage transformer TV2 connects, one end of the secondary winding of the voltage transformer TV2 with The pin 1 of the pin 1 of Transient Suppression Diode TVS2 and porous magnetic bead CR2 connect, the secondary winding of the voltage transformer TV2 The other end connect with the pin 4 of the pin 2 of Transient Suppression Diode TVS2 and porous magnetic bead CR2, the porous magnetic bead CR2's Pin 2 connects with one end of resistance R2, and the other end of the resistance R2 connects with one end of nonpolar capacitor C2 and is feeder line zero The pin 3 of zero-sequence current the output end I_OUT, the porous magnetic bead CR2 of sequence current detection circuit 2 are another with nonpolar capacitor C2's One end is grounded；The zero-sequence current output end I_OUT and DSP digital signal processor of the feeder line circuit measuring zero phase sequence current 2 The ADC input port of TMS320F2812 connects.
In the present embodiment, as shown in fig. 7, the ethernet communication circuit module 4 includes chips W 3100A, chip RTL8201BL, RJ45 interface N1, crystal oscillator X2, polar capacitor C68 and polar capacitor C71, magnetic bead CR38, nonpolar capacitor C48, Nonpolar capacitor C65, nonpolar capacitor C66, nonpolar capacitor C67, nonpolarity capacitor C69 and nonpolar capacitor C72, Yi Ji electricity Hinder R32, resistance R33, resistance R34, resistance R35 and resistance R93；At the 1st pin and DSP digital signal of the chips W 3100A Manage the 25th pin connection of device TMS320F2812, the 2nd pin, the 12nd pin, the 22nd pin, the 38th of the chips W 3100A Pin, the 39th pin, the 47th pin and the 58th pin are connect with+3.3V the voltage output end of power circuit 5, the chip The 3rd pin, the 13rd pin, the 23rd pin, the 45th pin, the 54th pin, the 56th pin and the 57th pin of W3100A is grounded, The 4th pin of the chips W 3100A is connect with the 47th pin of chip RTL8201BL, and the 21st~14 of the chips W 3100A the Pin is corresponding in turn to be drawn with the 18th pin of DSP digital signal processor TMS320F2812, the 43rd pin, the 80th pin, the 85th Foot, the 103rd pin, the 108th pin, the 111st pin, the connection of the 118th pin, the 11st~5 pin of the chips W 3100A according to The 121st pin of secondary correspondence and DSP digital signal processor TMS320F2812, the 125th pin, the 130th pin, the 132nd are drawn Foot, the 138th pin, the 141st pin and the connection of the 144th pin, the 32nd~29 pin and the 27th~24 of the chips W 3100A Pin is corresponding in turn to be drawn with the 21st pin of DSP digital signal processor TMS320F2812, the 24th pin, the 27th pin, the 30th Foot, the 33rd pin, the 36th pin, the 39th pin and the connection of the 54th pin, the 33rd pin of the chips W 3100A, the 37th are drawn Foot, the 59th pin and the 60th pin are grounded, the 34th pin of the chips W 3100A and the 10th pin of chip RTL8201BL It is connect by resistance R29 with the+3.3V voltage output end of power circuit 5, the 35th pin of the chips W 3100A passes through electricity Resistance R67 is connect with+3.3V the voltage output end of power circuit 5, the 36th pin and chip RTL8201BL of the chips W 3100A The 9th pin and RJ45 interface N1 the connection of the 11st pin and pass through the+3.3V voltage output end of resistance R31 and power circuit 5 Connection, the 40th pin of the chips W 3100A connect with the 21st pin of chip RTL8201BL, and the of the chips W 3100A 41 pins are connect with the 20th pin of chip RTL8201BL, and the 42nd pin of the chips W 3100A is with chip RTL8201BL's The connection of 19th pin, the 43rd pin of the chips W 3100A are connect with the 18th pin of chip RTL8201BL, the chip The 44th pin of W3100A is connect with the 22nd pin of chip RTL8201BL, the 46th pin and chip of the chips W 3100A The 16th pin of RTL8201BL connects, and the 48th pin of the chips W 3100A is connect with the 1st pin of chip RTL8201BL, The 49th pin of the chips W 3100A is connect with the 6th pin of chip RTL8201BL, the 50th pin of the chips W 3100A It is connect with the 5th pin of chip RTL8201BL, the 51st pin of the chips W 3100A and the 4th pin of chip RTL8201BL Connection, the 52nd pin of the chips W 3100A connect with the 3rd pin of chip RTL8201BL, and the of the chips W 3100A 53 pins are connect with the 2nd pin of chip RTL8201BL, and the 55th pin of the chips W 3100A is with chip RTL8201BL's The connection of 7th pin, the 61st pin of the chips W 3100A and the 149th pin of DSP digital signal processor TMS320F2812 Connection, the 62nd pin of the chips W 3100A are connect with the 84th pin of DSP digital signal processor TMS320F2812, institute The 63rd pin for stating chips W 3100A is connect with the 42nd pin of DSP digital signal processor TMS320F2812；The chip The 8th pin of RTL8201BL connect with one end of magnetic bead CR38 and is grounded by nonpolarity capacitor C49, the magnetic bead CR38's The other end is connect with the anode of the 32nd pin of chip RTL8201BL, one end of nonpolar capacitor C67 and polar capacitor C68, institute The 11st pin, the 17th pin, the 24th pin, the 29th pin and the 35th pin for stating chip RTL8201BL are grounded, the chip The 12nd pin of RTL8201BL is grounded by resistance R28, and the 13rd pin of the chip RTL8201BL is with RJ45 interface N1's 9th pin is connected and is grounded by resistance R27, the 14th pin and the 48th pin and nonpolarity of the chip RTL8201BL One end of one end of capacitor C48, one end of nonpolar capacitor C72 and magnetic bead CR39 with the+3.3V voltage output of power circuit 5 End connection, the 15th pin of the chip RTL8201BL are grounded by resistance R25, the 45th pin of the chip RTL8201BL And the other end of nonpolar capacitor C48 and the other end of nonpolar capacitor C72 are grounded, the of the chip RTL8201BL 25 pins are grounded by resistance R91, the 26th pin of the chip RTL8201BL by resistance R92 and power circuit 5+ The connection of 3.3V voltage output end, the 28th pin of the chip RTL8201BL are connect with one end of resistance R93, the resistance R93 The other end, the other end of nonpolar capacitor C67 and the cathode of polar capacitor C68 be grounded, the of the chip RTL8201BL 30 pins are connect with one end of the 8th pin of RJ45 interface N1 and resistance R35, the 31st pin of the chip RTL8201BL with The 7th pin of RJ45 interface N1 is connected with one end of resistance R34, and the other end of the resistance R35 and the other end of resistance R34 are equal It is grounded by capacitor C51, the one of the 33rd pin of the chip RTL8201BL and the 2nd pin of RJ45 interface N1 and resistance R33 End connection, the 34th pin of the chip RTL8201BL is connect with one end of the pin 1 of RJ45 interface N1 and resistance R32, described The other end of resistance R33 and the other end of resistance R32 pass through capacitor C50 and are grounded, and the pin 6 of the RJ45 interface N1 passes through electricity Hold C5 ground connection, the pin 10 of the RJ45 interface N1 is grounded by resistance R26, and the pin 12 of the RJ45 interface N1 passes through resistance R30 is connect with+3.3V the voltage output end of power circuit 5, and the 13rd pin and the 14th pin of the RJ45 interface N1 is grounded, The 36th pin of the chip RTL8201BL and one end of nonpolar capacitor C69, the anode and magnetic bead CR39 of polar capacitor C71 Other end connection, the other end of the nonpolarity capacitor C69 and the cathode of polar capacitor C71 be grounded, the chip The 37th pin of RTL8201BL is connect by resistance R100 with the+3.3V voltage output end of power circuit 5, the chip The 38th pin of RTL8201BL is connect by resistance R88 with the+3.3V voltage output end of power circuit 5, the chip The 39th pin of RTL8201BL is connect by resistance R101 with the+3.3V voltage output end of power circuit 5, the chip The 40th pin of RTL8201BL is grounded by resistance R89, and the 41st pin of the chip RTL8201BL passes through resistance R86 and electricity + 3.3V the voltage output end of source circuit 5 connects, and the 43rd pin of the chip RTL8201BL is grounded by resistance R90, described The 44th pin of chip RTL8201BL is connect by resistance R87 with the+3.3V voltage output end of power circuit 5, the chip The 46th pin of RTL8201BL is connect with one end of one end of crystal oscillator X2 and nonpolar capacitor C65, the chip RTL8201BL The 47th pin and the other end of crystal oscillator X2 and one end of nonpolar capacitor C66 connect, the other end of the nonpolar capacitor C65 It is grounded with the other end of nonpolar capacitor C66.
In order to verify the technical effect that power distribution network cable run insulation state monitoring method of the invention can generate, use MATLAB software has carried out following emulation:
The power distribution network cabling diagram of emulation is as shown in figure 8, power network neutral point is earth-free, voltage class 10kV, if Five cable feeder lines are equipped with, feeder line 1, feeder line 2 are 6km long, and feeder line 3, feeder line 4 are 10km long, and feeder line 5 is 12km long, cable cross-sectional area 95mm2, cable earth capacitance is 0.3 × 10-6F/km, the total direct-to-ground capacitance of distribution network system are 39.6 × 10-6F.Feeder line 5 is set Transient single-phase earth fault occurs.
Mostly along with arc grounding, voltage current waveform distortion when instantaneity single-phase earthing.It is instantaneous to emulate obtained generation Property singlephase earth fault after bus residual voltage waveform diagram as shown in figure 9, number be 1 non-faulting feeder line (feeder line 1) zero sequence Current waveform figure is as shown in Figure 10, and the zero-sequence current waveform diagram for the non-faulting feeder line (feeder line 2) that number is 2 is as shown in figure 11, compiles Number for 3 non-faulting feeder line (feeder line 3) zero-sequence current waveform diagram it is as shown in figure 12, the non-faulting feeder line (feeder line 4) that number is 4 Zero-sequence current waveform diagram it is as shown in figure 13, the zero-sequence current waveform diagram of transient single-phase earth fault route (feeder line 5) is as schemed Shown in 14.
Method of the step of capacitance current of distribution network measurement method one to step 3 through the invention, the feeder line being calculated 1 to feeder line 4 harmonic wave susceptance value it is as shown in table 1；
The harmonic wave susceptance of each non-faulting feeder line of table 1
All non-faulting feeder lines are calculated in the method for the step of capacitance current of distribution network measurement method four through the invention The sum of harmonic wave susceptance Bf=126.03 × 10-4S；
The method of the step of capacitance current of distribution network measurement method five according to the present invention carries out FFT decomposition to residual voltage, Obtained residual voltage spectrogram is as shown in figure 15, and obtaining fundamental voltage amplitude is 6334V, fundamental voltage RMS U1= 4479V, third harmonic voltage containing ratio HRU3=28.39%, quintuple harmonics voltage containing ratio HRU5=17.67%, the seventh harmonic Voltage containing ratio HRU7=10.28%, nine subharmonic voltage containing ratio HRU9=7.65%, ten first harmonic voltage containing ratios HRU11=5.30%, ten third harmonic voltage containing ratio HRU13=3.95%, ten quintuple harmonics voltage containing ratio HRU15= 2.86%, ten the seventh harmonic voltage containing ratio HRU17=2.05%, 19 subharmonic voltage containing ratio HRU19=1.41%；
The method of the step of capacitance current of distribution network measurement method six according to the present invention,
The method of the step of capacitance current of distribution network measurement method seven according to the present invention,
Capacitive susceptance under i.e. all non-fault line fundamental waves is 90.28 × 10-4S；
The method of the step of capacitance current of distribution network measurement method eight according to the present invention, formula of capacitive current IfC= BjbU0=43.06A, i.e., the capacitance current I of all non-faulting feeder linesfCFor 43.06A；
The method of the step of capacitance current of distribution network measurement method nine according to the present invention,
The method of the step of capacitance current of distribution network measurement method ten according to the present invention, IC=IfC+IgC=55.58A.
The above is only presently preferred embodiments of the present invention, is not intended to limit the invention in any way, it is all according to the present invention Technical spirit any simple modification to the above embodiments, change and equivalent structural changes, still fall within skill of the present invention In the protection scope of art scheme.

Claims (9)

1. a kind of capacitance current of distribution network measurement method, which is characterized in that method includes the following steps:
Step 1: bus residual voltage and each non-faulting feeder line zero-sequence current data acquisition: when distribution network system occurs instantaneously Property singlephase earth fault when, by all non-faulting feeder lines number be 1,2 ..., M, wherein M is non-faulting feedback in distribution network system The total number of line；Zero sequence voltage detection circuit (1) distribution network system occurs the bus zero sequence after transient single-phase earth fault Voltage is measured in real time, and M feeder line circuit measuring zero phase sequence current (2) respectively carries out the zero-sequence current of M non-faulting feeder line Real-time detection, processor (3) acquire zero sequence voltage detection circuit (1) after transient single-phase earth fault occurs for distribution network system and examine N number of instantaneous value u in one cycle of the bus residual voltage measured1、u2、…、uN, and acquire distribution network system and instantaneity occurs The M group zero-sequence current instantaneous value that M feeder line circuit measuring zero phase sequence current (2) detects after singlephase earth fault, wherein m-th N number of wink in one cycle of zero-sequence current for the non-faulting feeder line that the number that feeder line circuit measuring zero phase sequence current (2) detects is m Duration is expressed as im1、im2、…、imN, the value of m is the natural number of 1~M；
Step 2: the calculating of the zero sequence reactive power of residual voltage virtual value and each non-faulting feeder line: processor (3) is according to public affairs FormulaIt calculates distribution network system and the residual voltage virtual value U after transient single-phase earth fault occurs0, and according to Bus residual voltage and the zero-sequence current sampled value of each non-faulting feeder line calculate the zero sequence reactive power of each non-faulting feeder line； Wherein, the zero sequence reactive power for the non-faulting feeder line that number is m is expressed as Qm；ukOccur that instantaneity is single-phase connects for distribution network system K-th of instantaneous value in one cycle of bus residual voltage that zero sequence voltage detection circuit (1) detects after earth fault, k's takes Value is the natural number of 1~N；
Step 3: the calculating of the harmonic wave susceptance of each non-faulting feeder line: processor (3) is non-according to residual voltage virtual value and each item The zero sequence reactive power of fault feeder calculates the harmonic wave susceptance of each non-faulting feeder line；Wherein, the non-faulting feeder line that number is m Harmonic wave susceptance BmCalculation formula be
Step 4: the calculating of the sum of harmonic wave susceptance of all non-faulting feeder lines: processor (3) is according to formula Bf=B1+B2+…+Bm Calculate the sum of the harmonic wave susceptance of all non-faulting feeder lines Bf；
Step 5: in residual voltage each harmonic voltage effective value calculating: firstly, processor (3) call FFT decomposing module pair Residual voltage carries out FFT decomposition, obtains fundamental voltage RMS U1With each harmonic voltage containing ratio；Then, processor (3) root According to fundamental voltage RMS U1Each harmonic voltage effective value is calculated with each harmonic voltage containing ratio；Wherein, h subharmonic voltage Containing ratio is expressed as HRUh, h subharmonic voltage virtual value UhCalculation formula be Uh=U1×HRUh, the value of h is between 1~H The harmonic voltage number that FFT is decomposed, H are the harmonic voltage number maximum value that FFT is decomposed；
Step 6: harmonic wave influences the calculating of coefficient: processor (3) is according to formulaCalculating harmonic wave influences coefficient p, Wherein, p1For the ratio between fundamental voltage RMS and residual voltage virtual value andphFor h subharmonic voltage virtual value and zero The ratio between sequence voltage virtual value and
Step 7: the calculating of the capacitive susceptance under all non-fault line fundamental waves: processor (3) is according to formulaIt calculates Capacitive susceptance B under all non-fault line fundamental wavesjb；
Step 8: the calculating of all non-faulting feeder line capacitance currents: processor (3) is according to formula IfC=BjbU0Calculate all non-events Hinder the capacitance current I of feeder linefC；
Step 9: fault feeder capacitance current IgCCalculating；
Step 10: capacitance current of distribution network ICCalculating: processor (3) is according to formula IC=IfC+IgCCalculate power distribution network capacitor electricity Flow IC。
2. a kind of capacitance current of distribution network measurement method described in accordance with the claim 1, it is characterised in that: described in step 2 It manages device (3) and calculates the zero of each non-faulting feeder line according to the zero-sequence current sampled value of bus residual voltage and each non-faulting feeder line When sequence reactive power, wherein the zero sequence reactive power Q for the non-faulting feeder line that number is mmCalculation formula beH[uk] it is to ukCarry out Hilbert transformation, imkFor m-th of feeder line circuit measuring zero phase sequence current (2) K-th of instantaneous value in one cycle of zero-sequence current for the non-faulting feeder line that the number detected is m.
3. a kind of capacitance current of distribution network measurement method described in accordance with the claim 1, it is characterised in that: event described in step 9 Hinder feeder line capacitance current IgCCalculation method are as follows: being divided to fault feeder is that two kinds of situations of cable run or overhead transmission line calculate failures Feeder line capacitance current IgC, when fault feeder is cable run, processor (3) is according to formula IgC=KUnL calculates failure feedback Line capacitance electric current IgC, wherein K be fault feeder capacitance current estimate coefficient andS is cutting for cable run Area, UnFor cable run rated line voltage, L is the length of cable run；When fault feeder is overhead transmission line, processor (3) according to formula IgC=2.7Un' L ' calculating fault feeder capacitance current IgC, wherein Un' it is the specified line electricity of overhead transmission line Pressure, L ' are the length of overhead transmission line.
4. a kind of capacitance current of distribution network measuring device for realizing method as described in claim 1, it is characterised in that: including processing Device (3) and the power circuit (5) powered for power unit each in device, and the ethernet communication electricity to connect with processor (3) Road module (4)；After the input of the processor (3) is terminated with for transient single-phase earth fault to occur to distribution network system Zero sequence voltage detection circuit (1) that bus residual voltage is measured in real time and respectively to the zero-sequence current of a plurality of non-faulting feeder line The multiple feeder line circuit measuring zero phase sequence currents (2) being measured in real time.
5. device according to claim 4, it is characterised in that: the power circuit (5) includes 5V Switching Power Supply and and 5V 5V to the 3.3V voltage conversion circuit of the output end connection of Switching Power Supply, the output end of the 5V Switching Power Supply are power circuit (5)+5V voltage output end, 5V to the 3.3V voltage conversion circuit include voltage stabilizing chip AMS1117, inductance L2, polarity electricity Hold C7, polar capacitor C8, nonpolarity capacitor C9 and nonpolar capacitor C10, the 3rd pin of the voltage stabilizing chip AMS1117, polarity One end of the anode of capacitor C7 and nonpolar capacitor C9 are connect with the voltage output end of 5V Switching Power Supply, the polar capacitor C7 Cathode and the other end of nonpolar capacitor C9 be grounded, the 2nd pin of the voltage stabilizing chip AMS1117 and polar capacitor C8's Anode is connect with one end of inductance L2, and the other end of the inductance L2 is connect with one end of nonpolar capacitor C10, and is arrived for 5V The 3.3V voltage output end of 3.3V voltage conversion circuit, the 1st pin of the voltage stabilizing chip AMS1117, polar capacitor C8 it is negative The other end of pole and nonpolar capacitor C10 are grounded；The 3.3V voltage output end of 5V to the 3.3V voltage conversion circuit is electricity + 3.3V the voltage output end of source circuit (5).
6. device according to claim 4, it is characterised in that: the processor (3) includes DSP digital signal processor TMS320F2812。
7. device according to claim 6, it is characterised in that: the zero sequence voltage detection circuit (1) includes three-phase and five-pole Formula voltage transformer pt 1, voltage transformer TV1, Transient Suppression Diode TVS1, porous magnetic bead CR1, resistance R1 and nonpolarity electricity Hold C1, one end of the auxiliary secondary winding of the three-phase five-pole voltage transformer PT1 is primary with the voltage transformer TV1's One end of winding connects, and the other end and the voltage of the auxiliary secondary winding of the three-phase five-pole voltage transformer PT1 are mutual The other end of the first winding of sensor TV1 connects, and one end of the secondary winding of the voltage transformer TV1 and transient state inhibit two poles The pin 1 of the pin 1 of pipe TVS1 and porous magnetic bead CR1 connect, the other end of the secondary winding of the voltage transformer TV1 and wink State inhibits the pin 2 of diode TVS1 and the pin 4 of porous magnetic bead CR1 to connect, the pin 2 and resistance of the porous magnetic bead CR1 One end of R1 connects, and the other end of the resistance R1 connects with one end of nonpolar capacitor C1 and is the zero sequence voltage detection electricity The other end of the pin 3 of residual voltage the output end V_OUT, the porous magnetic bead CR1 on road (1) and nonpolar capacitor C1 connect Ground；The residual voltage output end V_OUT and DSP digital signal processor TMS320F2812 of the zero sequence voltage detection circuit (1) ADC input port connection.
8. device according to claim 6, it is characterised in that: the electricity of multiple feeder line circuit measuring zero phase sequence currents (2) Line structure is identical and includes zero sequence current mutual inductor CT1, voltage transformer TV2, Transient Suppression Diode TVS2, porous magnetic bead An output end and the one of resistance R3 of CR2, resistance R2, resistance R3 and nonpolar capacitor C2, the zero sequence current mutual inductor CT1 One end of the first winding of end and voltage transformer TV2 connects, the another output of the first zero sequence current mutual inductor CT1 Connect with the other end of the first winding of the other end of resistance R3 and voltage transformer TV2, the voltage transformer TV2's is secondary One end of winding connects with the pin 1 of the pin 1 of Transient Suppression Diode TVS2 and porous magnetic bead CR2, the voltage transformer The other end of the secondary winding of TV2 connects with the pin 4 of the pin 2 of Transient Suppression Diode TVS2 and porous magnetic bead CR2, described The pin 2 of porous magnetic bead CR2 connects with one end of resistance R2, one end phase of the other end of the resistance R2 and nonpolar capacitor C2 Connect and be the zero-sequence current output end I_OUT of feeder line circuit measuring zero phase sequence current (2), the pin 3 of the porous magnetic bead CR2 and non- The other end of polar capacitor C2 is grounded；The zero-sequence current output end I_OUT of the feeder line circuit measuring zero phase sequence current (2) with The ADC input port of DSP digital signal processor TMS320F2812 connects.
9. device according to claim 6, it is characterised in that: the ethernet communication circuit module (4) includes chip W3100A, chip RTL8201BL, RJ45 interface N1, crystal oscillator X2, polar capacitor C68 and polar capacitor C71, magnetic bead CR38, non-pole Property capacitor C48, nonpolar capacitor C65, nonpolar capacitor C66, nonpolar capacitor C67, nonpolarity capacitor C69 and nonpolarity capacitor C72 and resistance R32, resistance R33, resistance R34, resistance R35 and resistance R93；The 1st pin and DSP of the chips W 3100A The 25th pin of digital signal processor TMS320F2812 connects, the 2nd pin, the 12nd pin, the 22nd of the chips W 3100A Pin, the 38th pin, the 39th pin, the 47th pin and the 58th pin connect with+3.3V the voltage output end of power circuit (5) It connects, the 3rd pin, the 13rd pin, the 23rd pin, the 45th pin, the 54th pin, the 56th pin and the 57th of the chips W 3100A Pin is grounded, and the 4th pin of the chips W 3100A is connect with the 47th pin of chip RTL8201BL, the chip The 21st~14 pin of W3100A is corresponding in turn to be drawn with the 18th pin of DSP digital signal processor TMS320F2812, the 43rd Foot, the 80th pin, the 85th pin, the 103rd pin, the 108th pin, the 111st pin, the connection of the 118th pin, the chip The 11st~5 pin of W3100A is corresponding in turn to be drawn with the 121st pin of DSP digital signal processor TMS320F2812, the 125th Foot, the 130th pin, the 132nd pin, the 138th pin, the 141st pin and the connection of the 144th pin, the of the chips W 3100A 32~29 pins and the 27th~24 pin are corresponding in turn to and the 21st pin of DSP digital signal processor TMS320F2812, the 24th Pin, the 27th pin, the 30th pin, the 33rd pin, the 36th pin, the 39th pin and the connection of the 54th pin, the chip The 33rd pin, the 37th pin, the 59th pin and the 60th pin of W3100A is grounded, the 34th pin of the chips W 3100A and The 10th pin of chip RTL8201BL passes through resistance R29 and connect with+3.3V the voltage output end of power circuit (5), the core The 35th pin of piece W3100A is connect by resistance R67 with the+3.3V voltage output end of power circuit (5), the chip The 36th pin of W3100A connect with the 11st pin of the 9th pin of chip RTL8201BL and RJ45 interface N1 and passes through resistance R31 is connect with+3.3V the voltage output end of power circuit (5), the 40th pin and chip RTL8201BL of the chips W 3100A The connection of the 21st pin, the 41st pin of the chips W 3100A connect with the 20th pin of chip RTL8201BL, the chip The 42nd pin of W3100A is connect with the 19th pin of chip RTL8201BL, the 43rd pin and chip of the chips W 3100A The 18th pin of RTL8201BL connects, and the 44th pin of the chips W 3100A and the 22nd pin of chip RTL8201BL connect It connecing, the 46th pin of the chips W 3100A is connect with the 16th pin of chip RTL8201BL, and the 48th of the chips W 3100A the Pin is connect with the 1st pin of chip RTL8201BL, the 49th pin of the chips W 3100A and the 6th of chip RTL8201BL Pin connection, the 50th pin of the chips W 3100A are connect with the 5th pin of chip RTL8201BL, the chips W 3100A The 51st pin connect with the 4th pin of chip RTL8201BL, the 52nd pin and chip of the chips W 3100A The 3rd pin of RTL8201BL connects, and the 53rd pin of the chips W 3100A is connect with the 2nd pin of chip RTL8201BL, The 55th pin of the chips W 3100A is connect with the 7th pin of chip RTL8201BL, the 61st pin of the chips W 3100A It is connect with the 149th pin of DSP digital signal processor TMS320F2812, the 62nd pin and DSP number of the chips W 3100A The 84th pin of word signal processor TMS320F2812 connects, at the 63rd pin and DSP digital signal of the chips W 3100A Manage the 42nd pin connection of device TMS320F2812；The 8th pin of the chip RTL8201BL is connect with one end of magnetic bead CR38 And it is grounded by nonpolarity capacitor C49, the other end of the magnetic bead CR38 and the 32nd pin, the nonpolarity of chip RTL8201BL The anode connection of one end of capacitor C67 and polar capacitor C68, the 11st pin of the chip RTL8201BL, the 17th pin, the 24 pins, the 29th pin and the 35th pin are grounded, and the 12nd pin of the chip RTL8201BL is grounded by resistance R28, institute The 13rd pin for stating chip RTL8201BL connect with the 9th pin of RJ45 interface N1 and is grounded by resistance R27, the chip One end of the 14th pin of RTL8201BL and the 48th pin and nonpolar capacitor C48, one end of nonpolar capacitor C72 and magnetic One end of pearl CR39 is connect with+3.3V the voltage output end of power circuit (5), the 15th pin of the chip RTL8201BL It is grounded by resistance R25, the other end and nonpolarity of the 45th pin of the chip RTL8201BL and nonpolar capacitor C48 The other end of capacitor C72 is grounded, and the 25th pin of the chip RTL8201BL is grounded by resistance R91, the chip The 26th pin of RTL8201BL is connect by resistance R92 with the+3.3V voltage output end of power circuit (5), the chip The 28th pin of RTL8201BL is connect with one end of resistance R93, the other end of the resistance R93, nonpolar capacitor C67 it is another The cathode of one end and polar capacitor C68 are grounded, and the 30th pin of the chip RTL8201BL draws with the 8th of RJ45 interface N1 Foot is connected with one end of resistance R35, the 31st pin of the chip RTL8201BL and the 7th pin and resistance of RJ45 interface N1 One end of R34 connects, and the other end of the resistance R35 and the other end of resistance R34 pass through capacitor C51 and be grounded, the chip The 33rd pin of RTL8201BL is connect with one end of the 2nd pin of RJ45 interface N1 and resistance R33, the chip RTL8201BL The 34th pin connect with one end of the pin 1 of RJ45 interface N1 and resistance R32, the other end and resistance R32 of the resistance R33 The other end pass through capacitor C50 and be grounded, the pin 6 of the RJ45 interface N1 is grounded by capacitor C5, the RJ45 interface N1 Pin 10 be grounded by resistance R26, the pin 12 of the RJ45 interface N1 passes through the+3.3V of resistance R30 and power circuit (5) Voltage output end connection, the 13rd pin and the 14th pin of the RJ45 interface N1 be grounded, and the of the chip RTL8201BL 36 pins are connect with one end, the anode of polar capacitor C71 and the other end of magnetic bead CR39 of nonpolar capacitor C69, the non-pole The other end of property capacitor C69 and the cathode of polar capacitor C71 are grounded, and the 37th pin of the chip RTL8201BL passes through electricity Resistance R100 is connect with+3.3V the voltage output end of power circuit (5), and the 38th pin of the chip RTL8201BL passes through resistance R88 is connect with+3.3V the voltage output end of power circuit (5), and the 39th pin of the chip RTL8201BL passes through resistance R101 It is connect with+3.3V the voltage output end of power circuit (5), the 40th pin of the chip RTL8201BL is connect by resistance R89 41st pin on ground, the chip RTL8201BL is connect by resistance R86 with the+3.3V voltage output end of power circuit (5), The 43rd pin of the chip RTL8201BL is grounded by resistance R90, and the 44th pin of the chip RTL8201BL passes through electricity Resistance R87 is connect with+3.3V the voltage output end of power circuit (5), and the 46th pin of the chip RTL8201BL is with crystal oscillator X2's One end is connected with one end of nonpolar capacitor C65, the 47th pin of the chip RTL8201BL and the other end of crystal oscillator X2 and non- One end of polar capacitor C66 connects, and the other end of the other end of the nonpolarity capacitor C65 and nonpolar capacitor C66 are grounded.
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