CN108922961B - Nonvolatile storage method and device - Google Patents
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Abstract
The present disclosure proposes a non-volatile storage method and apparatus; the nonvolatile storage method comprises the following steps: the method comprises the steps of taking a volatile resistance conversion device as a nonvolatile storage unit; and controlling and reading the breaking degree of the conductive path of the volatile resistance transition device, thereby realizing nonvolatile storage. The nonvolatile resistance conversion device is adopted as the storage unit, so that the storage density of the resistive random access memory array can be improved, the processing steps are reduced, and the manufacturing cost is reduced.
Description
Technical Field
The present disclosure relates to the field of memory technologies in the microelectronic industry, and in particular, to a nonvolatile memory method and apparatus.
Background
With the continuous innovation of microelectronics and semiconductor technology, the FLASH memory technology is faced with a series of bottleneck problems, such as the floating gate can not be thinned without limit along with the technology development, the data retention time is limited, the operation voltage is overlarge and the like. Among many new memories, the resistive random access memory has the advantages of low operation power consumption, good Endurance (Endurance), simple structure, small device area, and the like, and thus gradually becomes a research focus in the current new nonvolatile memory.
According to the stability of a conductive path under the condition of power failure, resistance conversion devices are divided into two types, namely a volatile resistance conversion device and a nonvolatile resistance conversion device. The former is in the case of power failure, the path is broken spontaneously, the written information can be lost, while the latter is in the case of power failure, the same path is kept, the written information is kept unchanged, and therefore the latter can be used for storing data. The volatile resistance-change memory device generally functions as a selector in the nonvolatile resistance-change memory device 1S1R array to eliminate the read-write crosstalk problem caused by the leakage channel in the crossbar array. When the selector operates at a larger operating current, the retention characteristic of the conductive bridge is changed, the conductive bridge is not easy to break and becomes a non-volatile storage characteristic, and the gating effect of the device cannot be realized.
Disclosure of Invention
Technical problem to be solved
The present disclosure provides a non-volatile storage method and apparatus to at least partially solve the above technical problems.
(II) technical scheme
According to an aspect of the present disclosure, there is provided a nonvolatile storage method including:
the method comprises the steps of taking a volatile resistance conversion device as a nonvolatile storage unit; and
and controlling and reading the breaking degree of the conductive path of the volatile resistance transition device, thereby realizing nonvolatile storage.
In some embodiments, the breaking degree of the conductive path of the volatile resistance transition device is controlled by adjusting the intensity of an erasing voltage, the thickness of a resistive switching medium layer of the volatile resistance transition device, the number of interfaces of the resistive switching medium layer or by current limiting.
In some embodiments, in the step of controlling and reading the breaking degree of the conductive path of the volatile resistance transition device,
controlling the conductive path of the volatile resistance transition device to have a first fracture degree Gap1 and a second fracture degree Gap 2;
the voltage required for the conductive path with a first fracture degree Gap1 to be reconnected to the complete conductive path is V1, and the voltage required for the conductive path with a second fracture degree Gap2 to be reconnected to the complete conductive path is V2;
if Gap1 < Gap2, then V1 < V2, by a read voltage VRead，V1＜VRead< V2, i.e., Gap1 and Gap2 were read.
In some embodiments, at a certain read voltage VReadLower, V1 < VRead< V2, Current along target cell RTargetAnd the path flows away, so that the target unit information is read, and the nonvolatile storage is realized.
In some embodiments, when the volatile resistance transition device is used as a memory cell for non-volatile storage, both the low resistance state and the high resistance state are broken conductive channels; when reading and writing information, the volatile resistance-switching device forms a complete conductive path.
In some embodiments, if the first fracture degree Gap1 < the second fracture degree Gap2, the low resistance state corresponds to the conductive path having a first fracture degree Gap1, and the high resistance state corresponds to the conductive path having a second fracture degree Gap 2.
In some embodiments, the first degree of fracture and the second degree of fracture are different in magnitude; and the first fracture degree is spontaneous fracture degree, the second fracture degree is non-spontaneous fracture degree, or both the first fracture degree and the second fracture degree are non-spontaneous fracture degree.
In some embodiments, the first degree of fragmentation Gap1 is a degree of spontaneous fragmentation: under a current limiting condition, the conductive path of the volatile resistance transition device forms the spontaneous fracture degree;
the second degree of fracture Gap2 is the degree of fracture of the conductive path upon an erase operation: under an erasing voltage intensity condition, the conductive path of the volatile resistance transition device forms a breaking degree of the conductive path after an erasing operation.
According to another aspect of the present disclosure, there is provided a nonvolatile memory device including: a volatile resistance-switching device and a controller; the controller is used for controlling the breakage degree of the conductive path of the volatile resistance transition device and performing nonvolatile storage by controlling and reading the change of the breakage degree.
In some embodiments, the volatile resistance conversion device is a two-terminal resistance conversion device including an upper electrode, a resistive switching medium layer, and a lower electrode; or
The volatile resistance conversion device is a two-end resistance conversion device and comprises an upper electrode, a buffer layer, a resistance change medium layer and a lower electrode.
(III) advantageous effects
According to the technical scheme, the nonvolatile storage method and the nonvolatile storage device have at least one of the following beneficial effects:
(1) the invention discloses a nonvolatile storage method and a nonvolatile storage device, in particular to a nonvolatile storage method for realizing nonvolatile storage by using a volatile resistance conversion device as a storage unit. By using the method and the device, self-selection low-power-consumption resistance transition storage can be realized by a small number of devices and a simple device structure.
(2) In a resistive random access memory of the conventional nonvolatile memory method and device, a complete conductive path and a fused conductive path are required to be formed to provide high and low resistance states, so that information storage is realized; when the volatile resistance transition device is used as a storage unit, the high resistance state and the low resistance state are broken conductive paths, and only the broken degrees are different. This has lower static power consumption because the complete conduction path is formed inside the device and allows a larger current to pass only during reading and writing.
(3) In the prior nonvolatile memory method and device, the cross crosstalk problem exists in the resistive random access memory array, but when the volatile resistance conversion device is used as a memory, the read voltage has special requirements, namely V1 < VRead< V2, which results in the self-selecting action of the volatile resistance-switching device as a memory.
Drawings
FIG. 1 is a flow chart of a non-volatile storage method of the present disclosure.
Fig. 2 is a schematic structural diagram of a two-terminal resistance transition device according to the present disclosure.
Fig. 3 is a schematic diagram of a conductive path with a small channel Gap1 formed by spontaneous fracture and a large channel Gap1 formed after an erase operation.
FIG. 4 shows the read voltage V1 < V given to the deviceReadWhen the voltage is less than V2, the development and evolution of the conductive path of the small-channel Gap1 and the large-channel Gap2 formed after the erasing operation are schematically shown.
Fig. 5 is a schematic diagram of the most serious cross talk phenomenon (the target cell is in a high resistance state, and the other cells are in low resistance states) in the resistive random access memory array in the conventional nonvolatile memory, and an equivalent circuit diagram thereof.
FIG. 6 is a schematic representation of Ag/HfO of the present disclosure2Pt (thickness 40/5/40nm, effective area 3X 3 μm2) Typical I-V curves for devices with positive and negative 10 ua current limit.
FIG. 7 is a schematic representation of Ag/HfO of the present disclosure2Typical I-V curves for a/Pt (40/5/40nm) device with 10 μ A current limit in the forward direction and no current limit in the reverse direction.
FIG. 8 is a schematic representation of Ag/HfO of the present disclosure2The characteristic results of the low-resistance state (Gap1) and the high-resistance state (Gap2) of the/Pt (40/5/40nm) device are shown in a diagram.
FIG. 9 is a schematic representation of Ag/HfO of the present disclosure2Scaling of/Pt devices to 50X 50nm2Typical I-V curve of time.
FIG. 10 is an Ag/SiO solid of the present disclosure2Pt (40/10/40nm, 3X 3 μm effective area)2) The device exhibits current limiting at 10 muA in the forward direction in comparison to the Ag/HfO devices described above2Similar characteristic I-V curves for the/Pt devices.
FIG. 11 is a block diagram of a non-volatile memory device according to the present disclosure.
< description of symbols >
1-an upper electrode; 2-a resistance change dielectric layer; 3-lower electrode.
Detailed Description
For the purpose of promoting a better understanding of the objects, aspects and advantages of the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawings.
The present disclosure provides a nonvolatile storage method and apparatus, which implement information storage by controlling and reading a conductive path rupture degree of a volatile resistance transition device, thereby directly using the volatile resistance transition device for nonvolatile storage.
The volatile resistance transition device is used for nonvolatile storage, and no longer acts as a selector, namely, high driving current is not needed, and low-power-consumption storage application is realized. Compared with the conventional resistance conversion memory device 1S1R, the volatile resistance conversion device adopted in the present disclosure as the memory cell can improve the memory density of the resistive memory array, reduce the processing steps, and reduce the manufacturing cost.
In summary, the disclosed volatile resistance changer is used for storage, and has the advantages of simple structure, self-selection, high selection ratio, large storage window, low static power consumption, low operation current, non-destructive reading and the like.
The non-volatile storage method of the present disclosure is described in detail below. As shown in fig. 1, the nonvolatile storage method of the present disclosure includes the steps of:
s1, using the volatile resistance conversion device as a nonvolatile storage memory cell;
as shown in fig. 2, the volatile resistance conversion device is a typical two-terminal resistance conversion device, and includes, from top to bottom: the resistive random access memory comprises an upper electrode, a buffer layer, a resistive random access dielectric layer and a lower electrode. The buffer layer is optional, that is, the volatile resistance transition device may also include, from top to bottom: the resistive random access memory comprises an upper electrode, a resistive random access dielectric layer and a lower electrode.
And S2, controlling and reading the breaking degree of the conductive path of the volatile resistance transition device, thereby realizing nonvolatile storage.
Specifically, the conductive path of the volatile resistance transition device is controlled to have a first fracture degree Gap1 and a second fracture degree Gap2, the voltage required for the conductive path with the first fracture degree Gap1 to be connected again into a complete conductive path is V1, and the voltage required for the conductive path with the second fracture degree Gap2 to be connected again into a complete conductive path is V2; if Gap1 is less than Gap2, V1 is less than V2, and a certain reading voltage V is passedRead，V1＜VRead< V2, Gap1 and Gap2 can be read, thereby realizing nonvolatile storage.
In the nonvolatile memory method of the present disclosure, the resistance transition mechanism of the volatile resistance transition device achieves resistance transition based on the formation and rupture of the conductive path, and in particular, based on the difference in the degree of rupture of the conductive path formed in the volatile resistance transition device (i.e., the difference in the rupture channel width).
As a way of controlling the breaking degree of the conductive path of the volatile resistance transition device, there may be a plurality of ways, for example, the breaking degree of the conductive path of the volatile resistance transition device may be controlled by adjusting the erase voltage intensity, the thickness of the resistive dielectric layer of the volatile resistance transition device, the number of interfaces of the resistive dielectric layer, or by current limiting, but the way of controlling the breaking degree of the conductive path of the volatile resistance transition device in the present disclosure is not limited thereto, and a person skilled in the art may also control the breaking degree of the conductive path of the volatile resistance transition device by other ways.
In one embodiment, as shown in fig. 3, the volatile resistance transition device includes, in order from top to bottom: an upper electrode 1, a resistance change medium layer 2 and a lower electrode 3. Under certain current limiting conditions, the conductive path spontaneously breaks after being formed, and has a certain spontaneous breaking degree Gap1, which corresponds to the small channel in fig. 3; under a certain erasing voltage intensity condition, the conductive path is brokenAnd the crack has a certain breaking degree Gap2, and corresponding to the large channel in fig. 3, the voltage required by the channel to connect the complete conductive channel again is V1 and V2 respectively. The spontaneous fracture degree of the conductive path Gap1 is less than the fracture degree of the conductive path Gap2 after the erasing operation, Gap1 is less than Gap2, and the voltage V1 which is required for the channel to be connected with the complete conductive channel again is less than V2, so that a certain voltage V can be passedRead(V1＜VRead< V2) to read out Gap1 and Gap2, as shown in fig. 5.
Although in the present embodiment, the first fracture degree is a spontaneous fracture degree, formed under a current limiting condition; the second fracture degree is the fracture degree of the conductive path after the erasing operation and is formed under the erasing voltage intensity condition, but the disclosure is not limited thereto, and the first fracture degree and the second fracture degree may both be the spontaneous fracture degree, or both are the non-spontaneous fracture degree, or one of the first fracture degree and the second fracture degree is the spontaneous fracture degree and the other is the non-spontaneous fracture degree, and the forming conditions (i.e. the control mode of the fracture degree) for the first fracture degree and the first fracture degree may be the same or different, as long as the two are different in size.
Referring further to FIG. 4, a certain read voltage V is applied to the deviceRead(V1＜VRead< V2), the conductive path of the small channel Gap1 forms a complete conductive path, and the width of the Gap2 remains unchanged because the large channel Gap2 formed after the erase operation does not reach the threshold transition voltage.
FIG. 5 shows the worst cross-talk phenomenon (target cell R) in the resistive random access memory array in the conventional non-volatile memory methodTargetHigh resistance state, low resistance state for other cells) and equivalent circuit diagrams thereof. As shown in fig. 5, the solid black line is a current path for correctly reading the information of the target cell, and the dotted gray line is an actual cross-talk path. Due to R1, the total resistance of R2 and R3 is much less than the target resistance RTargetThe current will flow away along the dashed line, resulting in an erroneous reading of the target information.
For the non-volatile storage method of the present disclosure, the volatile resistance switching device is used asWhen the memory cell is used, the low resistance state corresponds to a small-channel Gap1 conductive path, and the high resistance state corresponds to a large-channel Gap2 conductive path. Only when a certain read voltage V1 < V is given to the deviceReadThe difference between the high and low resistance states can be read only if the resistance is less than V2, as shown in FIG. 5. According to the equivalent circuit diagram, the read voltage V at this timeReadIt is not enough to simultaneously open the conductive paths of R1, R2 and R3 at the low resistance Gap1, so that the current will flow along the target cell RTargetFlow away so as to correctly read the information of the target unit. Therefore, when the volatile resistance conversion device is used as a storage unit, the influence of cross-talk current can be effectively reduced.
In one embodiment, the volatile resistance transition device is Ag/HfO2Pt (thickness 40/5/40nm, effective area 3X 3 μm2) The device, it includes from top to bottom in proper order: the resistive random access memory comprises an upper electrode, a resistive random access dielectric layer and a lower electrode, wherein the upper electrode is made of Ag and has the thickness of 40 nm; the resistance change dielectric layer is made of HfO2The thickness is 5 nm; the lower electrode is made of Pt and has a thickness of 40 nm. As shown in fig. 6, in the case of positive and negative 10 μ a current limiting, the device changes from the high resistance state to the low resistance state during initialization, the voltage is removed, and the device becomes low current when scanned again (forward or reverse), which proves the volatility of the device, i.e., the conductive channel is formed and broken during initialization. Since the spontaneously formed Gap1 is relatively small, the forward and reverse turn-on voltage after initialization is smaller than the initialization voltage.
As shown in fig. 7, when the current is limited by 10 μ a in the forward direction and not limited by the current in the reverse direction, similar to fig. 6, after the initialization is turned on (shown as (r) in fig. 7), the device exhibits a smaller threshold transition voltage when scanning in the forward direction again (shown as (r) in fig. 7, reading), which corresponds to a smaller spontaneous rupture channel width Gap1 of the conductive path. And the device shows a very obvious erasing behavior after the reverse current limiting is removed (as shown in fig. 7, the low resistance state is changed into the high resistance state). When the forward scan is again performed, the curve is turned on along the initialization (shown as (r) in fig. 7), showing a larger threshold transition voltage, corresponding to a larger conductive path rupture channel width Gap 2.
FIG. 8 shows the above Ag/HfO2Low-resistance state and high-resistance state protection of/Pt (40/5/40nm) deviceAnd maintaining a characteristic result schematic diagram. As shown in fig. 8, the low resistance state cannot be read accurately at a small voltage value of 0.25V, and a clear difference can be read at a slightly higher voltage of 0.5V. Thus, it is found that the Ag/HfO2the/Pt (40/5/40nm) device integrated array can effectively inhibit the cross-talk shown in FIG. 5, and meets the requirement of the present disclosure that the volatile resistance converter device is used as a nonvolatile memory storage unit, and the volatile resistance converter has the advantages of simple structure, self-selection, high selection ratio, large storage window, low static power consumption, low operating current, non-destructive reading and the like when being used for the nonvolatile memory storage unit.
FIG. 9 shows the above Ag/HfO2Scaling of/Pt devices to 50X 50 μm2Typical I-V curve of time. Although the phenomenon that the resistance is turned on first and then turned off is not generated, the breaking degree of a conductive path is regulated through reverse erasing operation, and a low resistance state (a conductive path state after the turning-on operation) and a high resistance state (a conductive path state after the erasing operation) can be still distinguished through specific voltage, so that the volatile resistance change device can still be used for nonvolatile storage under the condition of small device area.
In addition, the function of applying the volatile resistance change device to nonvolatile storage can be realized in resistance change devices with other structures. In another embodiment, the volatile resistance transition device is Ag/SiO2Pt (40/10/40nm, 3X 3 μm effective area)2) Device, as shown in FIG. 10, the Ag/SiO2the/Pt (40/10/40nm) device exhibited the same Ag/HfO characteristics as described above in the forward 10 μ A current limiting case2The similar characteristic I-V curve of the/Pt device exists in a high-low resistance state which can be read under a specific operating environment.
The above device test results show that volatile devices can be applied to non-volatile storage by controlling the degree of breakdown of the conductive path of the device.
The present disclosure also provides a nonvolatile memory device, as shown in fig. 11, including: a volatile resistance-switching device and a controller; the controller is used for controlling the breakage degree of the conductive path of the volatile resistance conversion device and performing nonvolatile storage by controlling and reading the change of the breakage degree.
The nonvolatile storage method and the nonvolatile storage device realize nonvolatile information storage by controlling and reading the breaking degree of a conductive path of a volatile resistance conversion device. With the adoption of the self-selection low-power-consumption resistance transition storage method and the self-selection low-power-consumption resistance transition storage device, the minimum devices and the simplest device structure can be realized.
So far, the embodiments of the present disclosure have been described in detail with reference to the accompanying drawings. In light of the above description, those skilled in the art will recognize that the disclosed non-volatile storage methods and apparatus are well suited.
It is to be noted that, in the attached drawings or in the description, the implementation modes not shown or described are all the modes known by the ordinary skilled person in the field of technology, and are not described in detail. Further, the above definitions of the various elements and methods are not limited to the various specific structures, shapes or arrangements of parts mentioned in the examples, which may be easily modified or substituted by those of ordinary skill in the art.
Of course, the method of the present disclosure may also include other steps according to actual needs, which are not described herein again since they are not related to the innovations of the present disclosure.
The above-mentioned embodiments are intended to illustrate the objects, aspects and advantages of the present disclosure in further detail, and it should be understood that the above-mentioned embodiments are only illustrative of the present disclosure and are not intended to limit the present disclosure, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present disclosure should be included in the scope of the present disclosure.
Claims (8)
1. A non-volatile storage method, comprising:
the method comprises the steps of taking a volatile resistance conversion device as a nonvolatile storage unit; and
controlling and reading the breaking degree of the conductive path of the volatile resistance conversion device, thereby realizing nonvolatile storage;
the breaking degree of a conductive path of the volatile resistance conversion device is controlled by adjusting the intensity of erasing voltage, the thickness of a resistance change medium layer of the volatile resistance conversion device, the interface number of the resistance change medium layer or current limiting;
controlling the conductive path of the volatile resistance transition device to have a first fracture degree Gap1 and a second fracture degree Gap 2;
the voltage required for the conductive path with a first fracture degree Gap1 to be reconnected to the complete conductive path is V1, and the voltage required for the conductive path with a second fracture degree Gap2 to be reconnected to the complete conductive path is V2;
if Gap1 < Gap2, then V1 < V2, by a read voltage VRead，V1＜VRead< V2, i.e., Gap1 and Gap2 were read.
2. The non-volatile storage method of claim 1, wherein at a certain read voltage VReadLower, V1 < VRead< V2, Current along target cell RTargetAnd the path flows away, so that the target unit information is read, and the nonvolatile storage is realized.
3. The nonvolatile memory method according to claim 1, wherein, when the volatile resistance transition device is used as a memory cell of the nonvolatile memory, both the low resistance state and the high resistance state are broken conductive paths; when reading and writing information, the volatile resistance-switching device forms a complete conductive path.
4. A non-volatile memory method as claimed in claim 3, wherein if the first degree of rupture Gap1 < the second degree of rupture Gap2, the low resistance state corresponds to the conductive path having a first degree of rupture Gap1 and the high resistance state corresponds to the conductive path having a second degree of rupture Gap 2.
5. The non-volatile storage method of claim 4, wherein the first degree of rupture and the second degree of rupture are different in magnitude; and the first fracture degree is spontaneous fracture degree, the second fracture degree is non-spontaneous fracture degree, or both the first fracture degree and the second fracture degree are non-spontaneous fracture degree.
6. The non-volatile storage method of claim 5,
the first fracture degree Gap1 is a spontaneous fracture degree: under a current limiting condition, the conductive path of the volatile resistance transition device forms the spontaneous fracture degree;
the second degree of fracture Gap2 is the degree of fracture of the conductive path upon an erase operation: under an erasing voltage intensity condition, the conductive path of the volatile resistance transition device forms a breaking degree of the conductive path after an erasing operation.
7. A non-volatile storage device, comprising: the nonvolatile memory comprises a volatile resistance conversion device and a controller, wherein the controller is used for controlling the breaking degree of a conductive path of the volatile resistance conversion device by adjusting the intensity of erasing voltage, the thickness of a resistance change medium layer of the volatile resistance conversion device, the interface number of the resistance change medium layer or current limiting, and performing nonvolatile memory by controlling and reading the change of the breaking degree;
wherein, in the step of controlling and reading the change of the rupture degree, the volatile resistance transition device conductive path is controlled to have a first rupture degree Gap1 and a second rupture degree Gap 2;
the voltage required for the conductive path with a first fracture degree Gap1 to be reconnected to the complete conductive path is V1, and the voltage required for the conductive path with a second fracture degree Gap2 to be reconnected to the complete conductive path is V2;
if Gap1 < Gap2, then V1 < V2, by a read voltage VRead，V1＜VRead< V2, i.e., Gap1 and Gap2 were read.
8. The non-volatile storage apparatus of claim 7,
the volatile resistance conversion device is a two-end resistance conversion device and comprises an upper electrode, a resistance change medium layer and a lower electrode; or
The volatile resistance conversion device is a two-end resistance conversion device and comprises an upper electrode, a buffer layer, a resistance change medium layer and a lower electrode.
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