CN108781057B - Mixer circuit for reducing phase noise and frequency offset variance in local oscillator - Google Patents
Mixer circuit for reducing phase noise and frequency offset variance in local oscillator Download PDFInfo
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Abstract
An apparatus for improving the operating frequency of an oscillating output signal by averaging the deviation of the operating frequency of at least two oscillating input signals. The apparatus includes circuitry to: (a) at least first and second oscillating input signals are mixed by a mixer circuit to generate a mixed signal. Each of the oscillating input signals has a common input operating frequency and the mixing signals have a composite operating frequency. Each input operating frequency is centered at a common nominal frequency with a frequency offset, and the composite operating frequency is centered at a multiple of the nominal frequency. (b) The synthesized operating frequency of the mixed signal is divided by a frequency divider circuit to produce an output signal having an operating frequency centered at a nominal frequency and having an average frequency deviation that is an average of the frequency deviations of the input signal. (c) And outputting the output signal.
Description
Technical Field
The present invention, in some embodiments thereof, relates to reducing the frequency deviation effect of an oscillating signal, and more particularly, but not exclusively, to reducing the frequency deviation effect of an oscillating signal by averaging the deviation effect of at least two oscillating input signals, particularly an oscillating input signal and a delayed oscillating signal generated by delaying the oscillating input signal.
Background
Oscillating signals are fundamental building blocks in various demanding applications, such as reference signals for analog circuits and/or clocks for digital circuits. Such applications may generally require an accurate low noise oscillating signal that can be generated with minimal power consumption and that remains accurate over a range of frequencies and times.
In digital communication systems, particularly wireless communication systems in which a plurality of mobile transceivers communicate with one or more base stations, the accuracy of the oscillating signal can be very important. Each transceiver includes a transmitter and a receiver that may require a precise and accurate reference frequency with low frequency drift characteristics to communicate with the base station(s). Timing circuits and/or components such as crystal oscillators, clock generators, etc. are often used to provide the required reference frequency, however, the frequency of the generated oscillating signal is prone to drift with time and temperature.
Disclosure of Invention
According to an aspect of some embodiments of the present invention there is provided an apparatus for improving the operating frequency of an oscillating output signal by averaging deviations of the operating frequency of two or more oscillating input signals. The apparatus includes one or more circuits for mixing at least first and second oscillating input signals by a first mixer circuit to produce mixed signals having a composite operating frequency, each of the oscillating input signals having a common input operating frequency. Each input operating frequency is centered at a common nominal frequency with a frequency offset, and the composite operating frequency is centered at a multiple of the nominal frequency. The one or more circuits generate an output signal having an output operating frequency centered at a nominal frequency and having an average frequency deviation that is an average of the frequency deviations of at least the first and second oscillating input signals by dividing the synthesized operating frequency of the mixed signal with a frequency divider circuit. The one or more circuits then output the output signal.
The first mixer circuit and/or the frequency divider circuit is configured to receive two additional oscillating input signals to generate the output signal.
Optionally, the apparatus comprises at least one delay circuit for delaying said first oscillating input signal received from the oscillating circuit to generate the second oscillating input signal as a delayed version of the first oscillating input signal.
The frequency deviation comprises a frequency offset and/or phase noise with respect to the center of the nominal frequency. The frequency offsets are randomly distributed around a nominal frequency of the oscillating input signal, and the phase noise involves a random frequency variation process in time relative to the nominal frequency.
The at least one or more circuits further include a High Pass Filter (HPF) for removing at least one low frequency component of the mixed signal.
The frequency divider circuit comprises a second mixer (M2) for generating the output signal and one or more Low Pass Filters (LPF) for removing one or more high frequency components from the output signal.
The frequency divider circuit further comprises a feedback path for generating a feedback signal from the output signal. A feedback signal is fed back to the second mixer (M2), the second mixer (M2) being for mixing the mixing signal and the feedback signal.
The feedback path also includes an amplifier for restoring a signal amplitude level of the feedback signal to be equal to a signal amplitude level of the mixing signal.
Optionally, the feedback path further comprises a frequency multiplier for multiplying an operating frequency of the feedback signal to match an operating frequency of the mixing signal.
Optionally, the apparatus includes one or more delay circuits for amplifying the output signal to increase a signal amplitude level of the output signal to compensate for attenuation of the signal amplitude level during the mixing and dividing.
According to an aspect of some embodiments of the present invention, there is provided a method of improving an operating frequency of an oscillating output signal by averaging deviations of the operating frequency of at least two oscillating input signals. The method comprises the following steps:
-receiving at least a first and a second oscillating input signal, the common input operating frequency of the at least first and second oscillating input signal being centered around a common nominal frequency and having a frequency offset.
-mixing the at least first and second oscillating input signals at a first mixer (M1) to generate a mixed signal having a synthetic operating frequency centered around a multiple of a nominal frequency.
-dividing the resulting operating frequency of the mixed signal at the divider circuit to produce an output signal having an output operating frequency centered at the nominal frequency and having an average frequency deviation that is an average of the frequency deviations of the at least first and second oscillating input signals.
-outputting the output signal.
The frequency divider circuit comprises a second mixer (M2) for generating the output signal and a feedback path for generating a feedback signal from the output signal, the feedback signal being fed back to the second mixer (M2), the second mixer (M2) being for mixing the mixed signal and the feedback signal.
Unless defined otherwise, all technical and/or scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Although methods and materials similar or equivalent to those described herein can be used in the practice or testing of embodiments of the present invention, exemplary methods and/or materials are described below. In case of conflict, the patent specification, including definitions, will control. In addition, the materials, methods, and examples are illustrative only and not necessarily intended to be limiting.
Drawings
Some embodiments of the invention are described herein, by way of example only, with reference to the accompanying drawings. With specific reference now to the drawings in detail, it is stressed that the particulars shown are by way of example and for purposes of illustrative discussion of the embodiments of the present invention. In this regard, the description taken with the drawings will make apparent to those skilled in the art how embodiments of the invention may be practiced.
In the drawings:
FIG. 1 is a schematic diagram of an exemplary apparatus for improving the frequency characteristics of an oscillating output signal, according to some embodiments of the invention;
FIG. 2 is an exemplary process flow diagram for improving the frequency characteristics of an oscillating output signal, according to some embodiments of the invention;
FIG. 3 is a schematic diagram of an exemplary apparatus for improving the frequency characteristics of an oscillating output signal using two input signals, according to some embodiments of the invention;
FIG. 4 is a schematic diagram of a gain-reduced power density plot of an exemplary oscillating output signal generated by averaging two oscillating input signals, according to some embodiments of the present invention;
FIG. 5 is a schematic diagram of an exemplary apparatus for improving the frequency characteristics of an oscillating output signal using four input signals, according to some embodiments of the invention; and
fig. 6 is a schematic diagram of an exemplary apparatus for improving the frequency characteristics of an oscillating output signal using a delayed input signal, according to some embodiments of the invention.
Detailed Description
The present invention, in some embodiments thereof, relates to reducing the frequency deviation effects of an oscillating signal and, more particularly, but not exclusively, to reducing the frequency deviation effects of an oscillating signal by averaging the deviation effects of at least two oscillating input signals, particularly an oscillating input signal and a delayed oscillating signal generated by delaying the oscillating input signal.
The present invention proposes devices, systems and methods for improving one or more frequency characteristics (e.g., accuracy, stability and/or variation with respect to time and/or temperature) of an oscillating signal by reducing one or more effects of deviations in the operating frequency of the oscillating signal. The bias effects may include, for example, frequency offset and/or phase noise (also referred to as phase drift). The frequency offset may appear as a deviation from the center of the nominal frequency, and for a plurality of oscillating signals in practical applications, the frequency offset may typically be randomly distributed around the center of the nominal frequency. In practical applications, the phase noise may be generally characterized by a random phase noise process, such as random, rapid, short-term fluctuations in the phase of the oscillating signal.
The frequency characteristics of the oscillating signal may be improved by averaging the effects of deviations of two or more oscillating input signals having a common nominal operating frequency to produce an output signal. Averaging the deviation effects may significantly improve the frequency characteristics of the output signal due to the random nature of the deviation effects, i.e. the random distribution of the frequency offset and the random course of the phase noise.
Improving the frequency characteristics of the oscillating signal by averaging the effects of deviations of two or more input signals may have significant benefits over current methods for improving frequency characteristics. One benefit is that by using two or more low-side oscillator circuits as sources of the oscillating input signal, costs may be reduced relative to using expensive high-side oscillator circuits that may have one or more improved frequency characteristics (e.g., temperature compensation and/or frequency tracking). Another benefit is that the complexity (and possibly cost) of the oscillator circuit can be reduced by avoiding the use of one or more phase noise reduction circuits, such as phase tracking circuits.
The frequency characteristics of two or more oscillating input signals are averaged by first mixing the input signals using a first mixing circuit to generate a mixed signal and dividing the mixed signal using a frequency divider circuit to recover a nominal operating frequency of the output signal. The resulting operating frequency of the mixed signal is a multiple of the nominal operating frequency. The mixed signal may be passed through a High Pass Filter (HPF) for removing one or more low frequency components from the mixed signal that the first mixing circuit generates when mixing the input signal. The mixed signal is then passed into a frequency divider circuit, which may include a second mixing circuit coupled with a feedback path that feeds back an output signal to provide a feedback signal to the second mixing circuit. The second mixing circuit is for generating an output signal by mixing the mixing signal and the feedback signal. The frequency divider circuit may further include a Low Pass Filter (LPF) to remove one or more high frequency components from an output signal that the second mixing circuit generates when mixing the mixed signal and the feedback signal. The frequency divider circuit may further comprise an amplifier in the feedback path for restoring the amplitude level of the feedback signal to the nominal amplitude level of the input signal.
Optionally, one or more delay circuits are used to delay one or more input signals to produce one or more delayed signals as delayed versions of the input signals. The delayed signal may be used with an input signal to generate an output signal.
Optionally, the frequency divider circuit comprises a frequency multiplier for multiplying the feedback signal. If the number n of input signals is a power of 2, a frequency multiplier may be required when more than two oscillating input signals are used to generate the output signal. When mixing n input signals having a common nominal frequency, the resulting operating frequency of the mixed signals is the nominal frequency multiplied by n. In order to properly adjust the feedback signal before it enters the second mixing circuit, the feedback signal may be multiplied to have the same nominal frequency as the mixed signal.
Optionally, the output signal is amplified to increase a signal amplitude level of the output signal to compensate for attenuation of the signal amplitude level during mixing and frequency division.
Before explaining at least one embodiment of the invention in detail, it is to be understood that the invention is not necessarily limited in its application to the details of construction and the arrangement of the components and/or methods set forth in the following description and/or illustrated in the drawings and/or examples. The invention is capable of other embodiments or of being practiced or carried out in various ways.
The present invention may be a system, method and/or computer program product. The computer program product may include a computer-readable storage medium (or multiple media) having computer-readable program instructions thereon for causing a processor to perform various aspects of the invention.
The computer readable storage medium may be a tangible apparatus that can retain and store the instructions for use by the instruction execution device. The computer-readable storage medium may be, but is not limited to, for example: electronic memory devices, magnetic memory devices, optical memory devices, electromagnetic memory devices, semiconductor memory devices, or any suitable combination of the foregoing.
The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a corresponding computing/processing device, or an external computer or external storage device, via a network, such as the internet, a local area network, a wide area network, and/or a wireless network.
The computer-readable program instructions may execute entirely on the user's computer, partly on a remote computer or entirely on the remote computer or server as a stand-alone software package. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, to perform aspects of the present invention, circuitry, including, for example, programmable logic circuitry, field-programmable gate arrays (FPGAs) or Programmable Logic Arrays (PLAs), may be used to personalize electronic circuitry by executing computer-readable program instructions with state information of the computer-readable program instructions.
Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
Referring now to fig. 1, fig. 1 is a schematic diagram of an exemplary apparatus for improving frequency characteristics of an oscillating output signal, according to some embodiments of the invention. The exemplary apparatus 100 includes a mixer circuit 110 and a frequency divider circuit 120, the mixer circuit 110 receiving a plurality of oscillating input signals (102A to 102N) having an operating frequency centered about a common nominal frequency, the frequency divider circuit 120 outputting an oscillating output signal 106 having an operating frequency centered about the same common nominal frequency. Each input signal 102 may be received from, for example, an oscillator circuit. The mixing circuit 110 includes one or more mixers (M1)112 for mixing two or more input signals 102 and an HPF 114 for removing one or more low frequency components from the mixed signal output by the mixer (M1)112 to produce the mixed signal 104.
Optionally, the mixer circuit includes one or more delay circuits 116 for delaying one or more input signals 102 to produce one or more delayed signals that are delayed versions of the input signal(s) 102 to be entered into the mixer (M1) 112.
The mixed signal 104 is divided in frequency in the frequency divider circuit 120 using a mixer (M2)122, the mixed signal 104 is mixed with the feedback signal 108 by the mixer (M2)122, and the feedback signal 108 is received through a feedback path that feeds the output signal 106 back to the frequency divider circuit 120. The feedback path includes an amplifier 126 for restoring the amplitude level of the feedback signal 108 to the nominal amplitude level of the input signal 102.
Optionally, the feedback path includes a frequency multiplier 128 for multiplying the operating frequency of the feedback signal 108. When more than two input signals 102 are used to generate the mixed signal 104, the frequency multiplier 128 may be required to multiply the operating frequency of the feedback signal 108 to equal the operating frequency of the mixed signal 104. The signal output from the mixer (M2)122 is passed through the LPF 124, and the LPF 124 removes one or more high frequency components of the mixed signal to produce the output signal 106.
Optionally, the apparatus 100 includes one or more output amplifiers 130 for restoring the amplitude level of the output signal 106 to produce the amplified output signal 107. The amplitude level of the output signal 106 may need to be restored because the output signal 106 may be attenuated compared to the input signal 102 due to mixing and/or frequency division operations performed in the mixer circuit 110 and/or the frequency divider circuit 120.
Referring now to fig. 2, fig. 2 is a flow diagram of an exemplary process of improving the frequency characteristics of an oscillating output signal, according to some embodiments of the invention. The process 200 for improving the frequency characteristics of the oscillating output signal 106 may be accomplished by averaging the frequency characteristics of one or more oscillating input signals 102 using the example apparatus 100.
As shown at 210, the process 200 begins by receiving two or more input signals 102 at the mixer (M1)112 that are at least partially independent of each other. The oscillating input signals 102 all have a common operating frequency centered at a nominal frequency and may each include one or more deviations (deviation effects), such as frequency offset and/or phase noise. Each input signal 102 may be represented as described in equation 1 below:
equation 1:
wherein each input signal 102 is defined as si(t) having a frequency ωop,i，ωop,iMay be indicated as the operating frequency of the input signal and may also include a phase process expressed as a continuous time
Where i denotes the index of the input signals 102A to 102N. Frequency omegaiRepresented by ωc＝2πfcAnd may also include a frequency offsetMove omegai＝2πfi. The two oscillating input signals have a common amplitude level a.
Assume a frequency offset ω of the input signal 102iTo have a finite variance σ2Nominal frequency ω ofc＝2πfcAre distributed randomly as centers. Assuming a phase noise process of the input signal 102
Is a random process, wherein the average of the process is
The autocorrelation is R (t)1,t2)＝2πβmin(t1,t2). Wherein t is1,t2Representing different points in time and is an autocorrelation desired parameter factor associated with each input signal 102. The parameter beta is a characteristic of the local oscillator and will vary from oscillator to oscillator. Although the present invention can be applied to any type of phase noise, the assumptions made above represent fairly a typical real-world system, and may further present the worst case scenario, since the evolution of the input signal is unpredictable. The phase noise process thus defined is generated as:
equation 2:
wherein the content of the first and second substances,
is a Gaussian (Gaussian) process around a circle such that i ═ 1,2, and (·) is a Dirac (Dirac) trigonometric function. As discussed, the synthetic random process may be characterized as a Wiener (Wiener) process with the following expected and autocorrelation values:
equation 3:
in the mixing circuit, the signal 102 is mixed at filter (M1)112 and filtered at HPF 114 to produce a mixed signal 104, the mixed signal 104 having a composite operating frequency that is the sum of the operating frequencies of all the input signals 102. Since the operating frequencies of all input signals 102 have a common nominal frequency, denoted sM(t) the combined operating frequency of the mixed signal 104 is nfc(input signal 102 s)i(t) operating frequency) and is directly related to the input signal 102, as shown in equation 4 below.
Equation 4:
as shown at 220, the mixed signal 104 is divided using a frequency divider circuit 120 to produce an output signal 106 s' (t) as shown in equation 5 below.
Equation 5:
s′(t)∝cos(ω′t+θ′t)
equations 1 and 5 are derived for divider circuit 120, resulting in equation 6 below, where the mixed signal is mixed with feedback signal 108 (having a restored nominal amplitude level) in divider circuit 120.
Equation 6:
it is clear that the output signal 106 is an oscillating signal with a frequency ω having a phase noise process1,…,ωnIs the phase noise process of the input signal 102
Average value of (a). Derivation of equations 1 through 6 may be complex for a typical order n (n input signals 102), and thus the derivation of equations 1 through 6 above is generalized and described in detail below for the low-order embodiment of the present invention.
As shown at 230, the output signal 106 is output from the apparatus 100 for one or more of a number of applications, such as a reference clock for digital circuitry, a modulation clock for a Radio Frequency (RF) transceiver, and so forth.
By averaging the deviation(s) of the input signal 102 to reduce the deviation(s), the operating frequency characteristics of the output signal 106 can be significantly improved. The output signal 106 has a frequency at a nominal frequency ωcA centered operating frequency, but may include a reduced deviation(s) due to an average of deviations between two or more input signals 102 (deviation effects). The random nature of the deviation(s), i.e. the input signal 102 operating frequency ωop,iRandom distribution of frequency offsets therebetween and phase noise process
The random nature of (a) allows averaging operations to be performed to statistically reduce the effects of skew. The reduced deviation may have the following features. Each input signal 102siFrequency shift ω of (t)iThe variance of (c) can be expressed as σ2. The output signal 106 s' (t) will have a variance σ2The operating frequency of/n. Similarly, the autocorrelation of the phase noise process of the output signal 106 is also divided by n, equal to R (t)1,t2)＝2πβ min(t1,t2)/n。
The reduced deviation of the output signal 106 may increase the amplitude noise to some extent, however, one or more amplification circuits, such as output amplifier 130, may be applied to the output signal 106 for restoring the amplitude level of the output signal 106 to remove and/or reduce the amplitude noise, thereby improving the signal-to-noise ratio of the output signal 106. Furthermore, both mixer circuit 110 and divider circuit 120 may incur at least some signal power loss, yet the noise level remains unchanged, thereby achieving a higher signal-to-noise ratio of output signal 106. The output signal may be further amplified to restore the amplitude level of the output signal 106 that may be attenuated during mixing and frequency division.
Some embodiments of the invention are provided by way of examples illustrating possible embodiments and/or preferred embodiments.
Referring now to fig. 3, fig. 3 is a schematic diagram of an exemplary apparatus for improving frequency characteristic(s) of an oscillating output signal using two input signals, according to some embodiments of the invention. Apparatus 100A is a particular variation of exemplary apparatus 100 that receives two oscillating input signals 102A and 102B having an operating frequency centered at a common frequency and generates an output signal 106A, the operating frequency of output signal 106A being centered at a nominal frequency and having a reduced deviation(s) from the center. Apparatus 100A includes a mixer circuit 110A and a frequency divider circuit 120A. Two input signals 102As1(t) and 102Bs2(t) is shown in the following equation 7.
Equation 7:
input signals 102As at mixer (M1)112A1(t) and 102Bs2(t) are mixed to produce the pre-filtered mixed signals 103As As shown in equation 8 belowM(t)。
Equation 8:
pre-filtered mixed signal 103 As'M(t) includes two frequency components. The first frequency component is at the nominal frequency ω of the input signals 102A and 102BcThe sum of (ω)op,1+ωop,2) As the center. The second frequency component is at the nominal frequency ω of the input signals 102A and 102BcDifference of difference (ω)op,1-ωop,2) As the center.
The pre-filtered mixed signal 103A is then input into HPF 114A, and HPF 114A removes the low frequency components of pre-filtered mixed signal 103A to produce mixed signal 104As As shown in equation 9 belowM(t)。
Equation 9:
Equation 10:
Equation 11:
then, the signal output from the mixer (M2)122A is output to the LPF 124A, and the LPF 124A removes the high-frequency component ω of the mixed signal1+ω2+ω′To produce output signal 106A. Accordingly, the output signal 106A may be represented as shown in equation 12 below.
Equation 12:
combining equations 10 and 12 yields the expression in equation 13 below.
Equation 13:
equation 13 translates into two terms as represented by equation 14 below.
Equation 14:
as can be seen from equation 14, by averaging the deviations of the input signals 102A and 102B using the apparatus 100A, the deviation (deviation effect) of the output signal 106 is reduced.
According to the previously proposed assumptions, the phase noise process
And
are random processes, for example they may be Wiener (Wiener) processes, with an average value of 0, autocorrelation
Wherein E [.]Representing the desired operator and beta is a parameter. Since the two phase noise processes are independent, the composite phase noise process θ 'of output signal 106A'tIs expressed in the following equation 15.
Equation 15:
this may be interpreted as a reduction in the noise variance of the output signal 106A. This gain reduction is shown by comparing the power spectral density of one of the input signals 104A and 102B with the power spectral density of the average output signal 106A.
Referring now to fig. 4, fig. 4 is a schematic diagram of a power density plot showing gain reduction of an exemplary oscillating output signal produced by averaging two oscillating input signals, in accordance with some embodiments of the present invention. Relative power density plot 400 shows a power density plot of an oscillating output signal produced by averaging two oscillating input signals using a device such as device 100A. Graph 410 shows the relative power density characteristics of an oscillating output signal, such as the oscillating output signal, compared to graph 420, graph 420 showing the relative power density characteristics of an oscillating input signal, such as oscillating input signals 102A and 102B. As is evident from graph 400, graph 410 associated with averaged output signal 106 shows a 3dB reduction in noise compared to graph 420 associated with one of the original input signals 102A and 102B.
Referring now to fig. 5, fig. 5 is a schematic diagram of an exemplary apparatus for improving frequency characteristic(s) of an oscillating output signal using four input signals, according to some embodiments of the invention. Although a device using 2 or 4 inputs is described herein, it is apparent that 3 signals may be configured as inputs. Apparatus 100B is a particular variation of exemplary apparatus 100 that receives four oscillating input signals 102A, 102B, 102C, 102D having an operating frequency centered at a common frequency and produces an output signal 106B having an operating frequency of output signal 106B centered at a nominal operating frequency and having a reduced deviation(s) from the center. The operation of the apparatus 100B is similar to the operation of, for example, the apparatus 100A, with the exception that the operating frequency of the feedback signal 108B is multiplied to equal the operating frequency of the mixed signal 104B. The apparatus 100B includes a mixer circuit 110B and a frequency divider circuit 120B. The four input signals 102A-102D are mixed using a two-stage mixer (M1)112B, which (M1)112B first mixes each pair 102A-102B and 120C-102D, and then mixes the outputs of the two mixers (M1)112B in a mixer (M1) 112C. The four output signals 102As1(t)，102Bs2(t)，103C s3(t), and 102D s4(t) is shown in the following equation 16.
Equation 16:
the pre-filtered mixed signal 103B is then output to the HPF to remove low frequency components of the pre-filtered mixed signal 103B to produce a mixed signal 104B. The mixing signal comprises four signals at 2fcA low frequency component centered on and a sum of 4fcA central high frequency component. The low frequency components are removed by HPF 114B and mixed signal 104A includes only amplitude equal to A4High frequency component [ omega ] of/81+ω2+ω3+ω4]. The signal 104B is fed to a mixer (M2)112B in the divider circuit 120B, the mixer (M2)112B mixes the mixed signal 104B with the feedback signal 108B to produce an intermediate output signal. The intermediate output signal passes through LPF 124B, LPF 124B removing high frequency components of the output signal to produce output signal 106B. Output signal 106B is fed back to divider circuit 120B and into an amplifier that restores the amplitude level of feedback signal 108B to a nominal amplitude level equal to the amplitude level of mixed signal 104B. The feedback signal 108B is output to the frequency multiplier 128A, and the frequency multiplier 128A multiplies the operating frequency of the feedback signal 108B by four times to equal the operating frequency of the mixed signal 104B. Due to the action of the two-stage mixers (M1)112B and 112C, the operating frequency of the mixed signal 104B is 4 times the nominal operating frequency of the input signals 102A-102B.
Following the same equation shown for device 100A, average output signal 106B is represented as in equation 17 below.
Equation 17:
it is apparent from equation 17 that by averaging the deviations of the input signals 102A-102D using the apparatus 100B, the deviation (deviation effect) of the output signal 106 is reduced.
Alternatively, there are multiple embodiments for an apparatus, such as apparatus 100, for receiving an oscillating input signal of any order n to produce an output signal, such as output signal 106. Apparatus 100 may use a multi-stage mixer (M1), such as mixer (M1)112, in a mixing circuit, such as mixing circuit 110, coupled to an appropriate frequency multiplier, such as frequency multiplier 126, in a frequency divider circuit, such as frequency divider circuit 120. The output signal 106 may also be taken from an amplifier 126 instead of a Low Pass Filter (LPF) 124.
Referring now to fig. 6, fig. 6 is a schematic diagram of an exemplary apparatus for improving frequency characteristics of an oscillating output signal using a delayed input signal, according to some embodiments of the invention. The apparatus 100C is a particular variation of the exemplary apparatus 100 that receives an oscillating input signal 102A. It is possible to reduce phase noise by using a single oscillator and in particular by mixing the input signal 102A from the oscillator with its own delayed version. In this case, the two processes associated with the oscillating signal 102A and the delayed oscillating input signal 102A1 are not independent. In this configuration, the degree of reduction of the phase noise depends on the delay. Furthermore, the degree of reduction of the phase noise may also depend on the process itself. The apparatus 100C includes a delay circuit 116A configured to delay the input signal 102A by a predetermined time period (delay) to generate a delayed signal 102A1 that is a delayed version of the input signal 102A. The delays may have different values and may be selected based on the local oscillator used to generate the oscillating input signal and the desired phase noise reduction. Additionally or alternatively, the amount of delay may depend on physical limitations: the amount of delay really determines the size of the delay circuit. Thus, the available space in the device sets an upper limit for the size of the delay circuit and thus for the amount of delay that can be achieved. The amount of delay is a result of a trade-off between phase noise reduction and circuit size. The input signal 102A is mixed with the delayed signal 102A1 in an (M1) mixer, such as an (M1)112A mixer, to produce a pre-filtered mixed signal 103C. The signal flowing from mixer (M1)112A through device 100C is then similar to the signal flowing through device 100A.
Although the oscillating input signal 102A and the delayed oscillating input signal 102A1 are not independent, it will be shown below that the apparatus of the present invention allows for a reduction of the phase noise of the output signal in case the phase noise process is random, in particular a Wiener process.
For example, assume that the phase noise process in the oscillating input signal 102A is a Wiener (Wiener) process as described above. Considering the phase noise process at two times t and s, where t ≦ s, the difference process is verified as
Averaging the process shown with its own delayed version (delayed by τ) yields new process W ', new process W'tIs no longer a wiener process. The mean value of the synthesis process is 0 and the step increment between any time t and s has the following characteristics:
equation 18:
if the oscillating input signal 102A and the delayed oscillating input signal 102A1 are observed over a time interval (t-s). ltoreq.τ, the variance of the new process is half that of the original process, which means that the phase noise of the oscillating input signal 102A is reduced 1/2. For larger time intervals, the variance is reduced by a constant τ/2, which becomes smaller over time relative to the original variance 2 π β (t-s). In any case, the phase noise of the output signal is reduced compared to the phase noise of the oscillating input signal 102A.
More generally, the delay τ may be selected based on a time period during which the variance of the process should be statistically reduced or a time period of interest. Specifically, the delay may be set based on the number of symbols during which the phase noise is estimated. In particular, if the delay is set equal to the time of interest,then the phase noise of the output signal is thetai′＝θi/2. The time of interest depends on the application of the invention.
For example, in a system where the phase noise is estimated every 10 symbols, the delay is chosen to be τ 10, and the phase noise process of the output signal will behave like a wiener process with half the variance between each estimation.
The choice of delay is therefore dependent on the desired period of time for which we need a reduced variance in the process. As already mentioned above, in practice the larger the value of the delay τ, the larger the delay circuit has to be. The choice of delay involves a trade-off between the space available on the circuit board and the degree to which the delay or in other words the phase noise is reduced.
The arrangement depicted in fig. 6 produces the desired effect of reducing phase noise, particularly variance noise, if the oscillating input signal 102A is delayed by an amount of time greater than the time of interest.
It will be apparent that a number of additional embodiments may be created for an apparatus, such as apparatus 100, said apparatus 100 comprising one or more delay circuits, such as delay circuit 116, to delay any number of oscillating input signals 102, such as said oscillating input signal 102. Further, any single input 102 may be delayed using multi-stage delay circuit 116 to generate additional one or more delayed signals, such as delayed signal 102a 1. For example, a single input signal 102A may be received by apparatus 100 including 3 delay circuits 116. The input signal 102A may be input to the first delay circuit 116 to generate the delayed signal 102A 1. The delayed signal 102a1 may then be input to the second delay circuit 116 to generate the delayed signal 102a2, and the delayed signal 102a2 may then be input to the third delay circuit 116 to generate the delayed signal 102 A3. The apparatus 100 may be configured to receive the fourth signal 102A, 102A1, 102A2, and 102A3 to generate the output signal 106.
The description of various embodiments of the present invention has been presented for purposes of illustration but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical advancement, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein with respect to technology found in the marketplace.
The term "about" as used herein means ± 10%.
The terms "comprising," consisting of …, "" including, "" consisting of …, "" having, "and combinations thereof mean" including, but not limited to. The term includes the terms "consisting of and" consisting essentially of.
The phrase "consisting essentially of means that a component or method may include additional ingredients and/or steps, but only if the other ingredients and/or steps do not materially alter the basic and novel characteristics of the claimed component or method.
As used herein, the singular forms "a", "an" and "the" include the plural forms as well, unless the context clearly indicates otherwise. For example, the term "a compound" or "at least one compound" may include a plurality of compounds, including mixtures thereof.
The word "exemplary" is used herein to mean "serving as an example, instance, or illustration. Any embodiment described as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments and/or to exclude combinations of features from other embodiments.
The term "optionally" as used herein means "provided in some embodiments and not provided in other embodiments". Any particular embodiment of the invention may include a plurality of "optional" features unless such features conflict.
Throughout this application, various embodiments of the invention may be presented in a range format. It is to be understood that the description in range format is merely for convenience and brevity and should not be construed as an inflexible limitation on the scope of the invention. Accordingly, the description of a range should be considered to have specifically disclosed all the possible sub-ranges as well as individual numerical values within that range. For example, a description of a range from 1 to 6 should be considered to have certain disclosed sub-ranges, such as from 1 to 3, 1 to 4, 1 to 5, 2 to 4, 2 to 6, 3 to 6, etc., as well as individual numbers within that range, such as 1,2, 3, 4, 5, and 6. This applies regardless of the breadth of the range.
Whenever a numerical range is indicated herein, it is intended to include any number of the referenced number (fractional or integer) within the indicated range. "range/range" and "range/range from" first indicating number "to" second indicating number "between the first indicating number and the second indicating number are used interchangeably herein and are intended to include the first and second indicating numbers and all fractional and integer numbers therebetween.
It is appreciated that certain features of the invention, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the invention which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable subcombination or as suitable in any other described embodiment of the invention. Certain features described in the context of various embodiments are not considered essential features of those embodiments, unless the embodiments are inoperative without such elements.
All publications, patents and patent applications mentioned in this specification are herein incorporated in their entirety by reference into the specification, to the same extent as if each individual publication, patent or patent application was specifically and individually indicated to be incorporated herein by reference. In addition, citation or identification of any reference in this application shall not be construed as an admission that such reference is available as prior art to the present invention. Insofar as section headings are used, they should not be construed as limiting.
Claims (13)
1. An apparatus for improving an operating frequency of an oscillating output signal by averaging deviations in the operating frequency of at least two oscillating input signals, comprising:
at least one circuit for:
mixing at least first and second oscillating input signals, each having a common input operating frequency, by a first mixer circuit to produce a mixed signal having a synthesized operating frequency, each of the input operating frequencies being centered about a common nominal frequency and having a frequency offset, and the synthesized operating frequency being centered about a multiple of the nominal frequency;
dividing, by a frequency divider circuit, a synthesized operating frequency of the mixed signal to produce an output signal having an output operating frequency centered about a nominal frequency and having an average frequency deviation that is an average of frequency deviations of the at least first and second oscillating input signals; and
outputting the output signal;
wherein the first mixer circuit and/or the frequency divider circuit is configured to receive at least two additional oscillating input signals to generate the output signal.
2. The apparatus of claim 1, further comprising at least one delay circuit for delaying the first oscillating input signal received from an oscillating circuit to generate the second oscillating input signal as a delayed version of the first oscillating input signal.
3. The apparatus of claim 1, wherein the frequency offset comprises a frequency offset relative to the center of the nominal frequency and/or phase noise, wherein the frequency offset is randomly distributed around the nominal frequency of the oscillating input signal, and the phase noise involves a random frequency variation process in time relative to the nominal frequency.
4. The apparatus of any of claims 1-3, wherein the at least one circuit further comprises a High Pass Filter (HPF) to remove at least one low frequency component of the mixed signal.
5. The apparatus of any of claims 1 to 3, wherein the frequency divider circuit comprises a second mixer for generating the output signal and at least one Low Pass Filter (LPF) for removing at least one high frequency component from the output signal.
6. The apparatus of claim 5, wherein the frequency divider circuit further comprises a feedback path to generate a feedback signal from the output signal, the feedback signal being fed back to the second mixer, the second mixer to mix the mixed signal and the feedback signal.
7. The device of claim 6, wherein the feedback path further comprises an amplifier for restoring a signal amplitude level of the feedback signal to be equal to a signal amplitude level of the mixing signal.
8. The apparatus of claim 6 or 7, wherein the feedback path further comprises a frequency multiplier for multiplying an operating frequency of the feedback signal to match an operating frequency of the mixing signal.
9. The apparatus of any of claims 1-3, wherein the at least one circuit is to amplify the output signal to increase a signal amplitude level of the output signal to compensate for attenuation of the signal amplitude level during the mixing and dividing.
10. A method of improving the operating frequency of an oscillating output signal by averaging deviations in the operating frequency of at least two oscillating input signals, comprising:
receiving at least first and second oscillating input signals having a common input operating frequency centered about a common nominal frequency and having a frequency offset;
mixing the at least first and second oscillating input signals at a first mixer circuit to produce a mixed signal having a synthesized operating frequency centered at a multiple of a nominal frequency;
dividing the combined operating frequency of the mixed signal at a divider circuit to produce an output signal having an output operating frequency centered about a nominal frequency and having an average frequency deviation that is an average of the frequency deviations of the at least first and second oscillating input signals; and
outputting the output signal;
the method also includes adapting the first mixer circuit and/or the frequency divider circuit to receive at least two additional oscillating input signals to generate an output signal.
11. The method of claim 10, further comprising applying at least one delay circuit for delaying the first oscillating input signal received from an oscillating circuit to generate the second oscillating input signal as a delayed version of the first oscillating input signal.
12. The method of claim 10 or 11, wherein the frequency offset comprises a frequency offset relative to the center of the nominal frequency and/or a phase noise, wherein the frequency offset is randomly distributed around a nominal frequency of the oscillating input signal and the phase noise involves a random frequency variation process in time relative to the nominal frequency.
13. The method of claim 10 or 11, wherein the frequency divider circuit comprises a second mixer for generating the output signal and a feedback path for generating a feedback signal from the output signal, the feedback signal being fed back to the second mixer, the second mixer being for mixing the mixed signal and the feedback signal.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/EP2016/054248 WO2017148505A1 (en) | 2016-02-29 | 2016-02-29 | Mixing circuit to reduce the phase noise and frequency offset variance in local oscillators |
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| Publication Number | Publication Date |
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| CN108781057A CN108781057A (en) | 2018-11-09 |
| CN108781057B true CN108781057B (en) | 2020-12-15 |
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| CN201680082453.0A Expired - Fee Related CN108781057B (en) | 2016-02-29 | 2016-02-29 | Mixer circuit for reducing phase noise and frequency offset variance in local oscillator |
Country Status (2)
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| CN (1) | CN108781057B (en) |
| WO (1) | WO2017148505A1 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103891148A (en) * | 2011-10-31 | 2014-06-25 | 安哈姆尼克有限公司 | Electronic oscillation circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH08167918A (en) * | 1994-12-13 | 1996-06-25 | Hitachi Ltd | Communication equipment |
| JP3245042B2 (en) * | 1996-03-11 | 2002-01-07 | 沖電気工業株式会社 | Tuning oscillation circuit |
| JP2007057393A (en) * | 2005-08-24 | 2007-03-08 | Epson Toyocom Corp | Frequency stability measuring system |
| DE602006006164D1 (en) * | 2006-05-30 | 2009-05-20 | Infineon Technologies Ag | Dynamic frequency divider to divide by N |
| US8046621B2 (en) * | 2007-09-24 | 2011-10-25 | Broadcom Corporation | Method and system for generation of signals up to extremely high frequencies using a delay block |
| US9065458B2 (en) * | 2010-04-14 | 2015-06-23 | Bae Systems Plc | Frequency synthesis and noise reduction |
| US8917759B2 (en) * | 2012-01-31 | 2014-12-23 | Innophase Inc. | Transceiver architecture and methods for demodulating and transmitting phase shift keying signals |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103891148A (en) * | 2011-10-31 | 2014-06-25 | 安哈姆尼克有限公司 | Electronic oscillation circuit |
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| WO2017148505A1 (en) | 2017-09-08 |
| CN108781057A (en) | 2018-11-09 |
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