CN108565256A - Noise suppressing method in difference silicon hole array and its differential signal transmission structure - Google Patents

Noise suppressing method in difference silicon hole array and its differential signal transmission structure Download PDF

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Publication number
CN108565256A
CN108565256A CN201810320148.1A CN201810320148A CN108565256A CN 108565256 A CN108565256 A CN 108565256A CN 201810320148 A CN201810320148 A CN 201810320148A CN 108565256 A CN108565256 A CN 108565256A
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CN
China
Prior art keywords
metal
metal column
mim capacitor
differential signal
column
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CN201810320148.1A
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Chinese (zh)
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CN108565256B (en
Inventor
赵文生
泮金炜
王高峰
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杭州电子科技大学
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Publication of CN108565256A publication Critical patent/CN108565256A/en
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics

Abstract

The present invention discloses noise suppressing method and its differential signal transmission structure in difference silicon hole array.The present invention is using the method for introducing compensating electric capacity between differential pair structure, to reach the crosstalk between reducing differential signal.Differential signal transmission structure includes top layer dielectric layer and base semiconductor substrate layer.There are two MIM capacitors for setting in top layer dielectric layer;First MIM capacitor is made of the first metal top crown, the first MIM capacitor medium, the first metal bottom crown, and the second MIM capacitor is made of the second metal top crown, the second MIM capacitor medium, the second metal bottom crown;Silicon hole there are five being set in base semiconductor substrate layer up and down;First metal column, the second metal column form first differential pair structure, and third metal column, the 4th metal column form second differential pair structure, be used for transmission differential signal;Fifth metal column is as return path.

Description

Noise suppressing method in difference silicon hole array and its differential signal transmission structure

Technical field

The invention belongs to three dimensional integrated circuits fields, and in particular to the noise suppressing method in a kind of difference silicon hole array And its differential signal transmission structure.

Background technology

As the key technology of three dimensional integrated circuits, silicon hole technology has obtained extensive research in recent decades.Pass through Silicon hole technology, three dimensional integrated circuits obtain huge progress, are provided with higher integrated level, shorter interconnection length, more Good noise inhibiting ability and lower transmission loss.But with increasing for signal frequency, signal that silicon hole technology is brought Integrity issue also becomes increasingly conspicuous, the cross-interference issue being mainly reflected between silicon hole.

In order to ensure the integrality of signal, it is proposed that transmitted using differential signal.It, can in the way of differential signal transmission To effectively improve the transmission quality of signal, but the crosstalk between differential signal similarly exists.

Invention content

One object of the present invention is directed to the deficiency of current differential signal transmission, provides in a kind of difference silicon hole array Noise suppressing method, be a kind of crosstalk compensation mechanism, to reduce the crosstalk between differential signal.

The present invention reduces difference letter specifically using the method for introducing compensating electric capacity between two differential pair structures to reach Crosstalk between number, compensating electric capacity use capacity plate antenna.

It is a further object to provide the differential transfer structure based on the above method, which can effectively drop Crosstalk between low differential signal.

The differential signal transmission structure of the present invention includes top layer dielectric layer (213) and base semiconductor substrate setting up and down Layer (111);

The top layer dielectric layer (213), material is insulating materials, is inside provided with the first, second MIM capacitances;Described First MIM capacitor is by pole under the first metal top crown (209) setting up and down, the first MIM capacitor dielectrics (214), the first metal Plate (210) constitute, the second MIM capacitor by the second metal top crown (211) setting up and down, the second MIM capacitor medium (215), Second metal bottom crown (212) is constituted;

The first metal top crown (209) is identical as the size of the second metal top crown (211), pole under the first metal Plate (210) is identical as the size of the second metal bottom crown (212), the first MIM capacitor medium (214) and the second MIM capacitor medium (215) size is identical.

The thickness of the first and second MIM capacitor medium (214-215), the first metal polar plate (209-210) and second The area of metal polar plate (211-212) determines the size of MIM capacitor value, and the size of MIM capacitor value influences between differential signal The inhibition of crosstalk.

The shortest distance of two MIM capacitors to semiconductor substrate layer (111) top surface is equal.

The base semiconductor substrate layer (111), material is silicon materials, inside sets the silicon hole there are five up and down; It is filled by metal column in the silicon hole, is filled by insulating layer between metal column and silicon hole;

Preferably, the diameter of above-mentioned five silicon holes is equal;Fifth metal column (105) and other four metal intercolumniations Distance is equal.

First metal column (101), the second metal column (102) first differential pair structure of composition, third metal column (103), 4th metal column (104) forms second differential pair structure, is used for transmission differential signal;Fifth metal column (105) is as return Path;

First metal top crown (209) of first MIM capacitor is connected by metal wire and the first metal column (101) top surface It connects, the first metal bottom crown (210) is connect by metal wire with the 4th metal column (104) top surface;The second of second MIM capacitor Metal top crown (211) is connect by metal wire with third metal column (103) top surface, and the second metal bottom crown (212) passes through gold Belong to line to connect with the second metal column (102) top surface;

First metal column (101), fifth metal column (105), the 4th metal column (104) three center are located at same On straight line, the second metal column (102), fifth metal column (105), third metal column (103) three center are located at same straight line On;

The distance between first metal column (101) and the second metal column (102) and metal column (103) and metal column (104) The distance between it is equal, the distance between two differential pair structures influence signal cross-talk size.

First MIM capacitor is located in the first metal column (101), fifth metal column (105), the 4th metal column (104) three On straight line AA ' where the heart, the second MIM capacitor is located at the second metal column (102), fifth metal column (105), third metal column (103) on the straight line BB ' where three center.

First MIM capacitor is at a distance from the first metal column (101) and second MIM capacitor and the second metal column (102) Distance it is equal.

The course of work:

Differential signal is inputted by top surface the first and second metal column (101-102) of the first differential pair structure, a part of from first Metal column (101) top surface flows into step (209) on the first metal of the first MIM capacitor, flows through the first metal bottom crown (210) stream Enter the 4th metal column (104), flowed out from the 4th metal column (104) bottom surface, a part is flowed into from the second metal column (102) top surface Second metal bottom crown (212) of the second MIM capacitor flows through the second metal top crown (211) and flows into third metal column (103), It being flowed out from third metal column (103) bottom surface, another part flows into third and fourth metal column (103-104) by silicon base (111), It is flowed out from third and fourth bottom surface metal column (103-104).

The beneficial effects of the invention are as follows:

The present invention makees differential crosstalk compensation with capacity plate antenna and constitutes a kind of high performance differential transfer structure, greatly drops Crosstalk between low differential signal.

Description of the drawings

Figure 1A is the top view of base semiconductor substrate layer;

Figure 1B is the front view of base semiconductor substrate layer;

Fig. 2A is the top view of top layer dielectric layer;

Fig. 2 B are the cutaway side views of top layer dielectric layer and semiconductor substrate layer along AA ';

Fig. 2 C are the cutaway side views of top layer dielectric layer and semiconductor substrate layer along BB ';

Fig. 3 is the structure chart of silicon hole;

Fig. 4 is the equivalent circuit diagram of structure of the invention;

Fig. 5 does not add crosstalk to mend with capacity plate antenna for the present invention as the differential transfer structure of differential crosstalk compensation and generally The transmission characteristic comparison diagram for the differential transfer structure repaid.

Specific implementation mode

Below in conjunction with attached drawing, the invention will be further described.

Metal column (105) as shown in Figure 1, which is located among base semiconductor substrate layer, is used as signal return path, first difference Divide to being made of metal column (101-102), is located on the left of base semiconductor substrate layer, input of the top as differential signal End.Second differential pair is made of metal column (103-104), is located at the right side of base semiconductor substrate layer.Metal column (101- 105) it is filled by insulating layer (106-110) between silicon hole.

First metal top crown (209), the first metal bottom crown (210) and the first MIM capacitor dielectrics as shown in Figure 2 (214) first MIM capacitor is formed, the second metal top crown (211), the second metal bottom crown (212) and the second MIM capacitor are situated between Matter (215) forms second MIM capacitor, and two MIM capacitors are in the same horizontal position.Metal wire (205) connects first MIM First metal top crown (209) of capacitance, metal wire (206) connect the first metal bottom crown (210) of first MIM capacitor. Metal wire (207) connects the second metal bottom crown (212) of second MIM capacitor, and metal wire (208) connects second MIM electricity The the second metal top crown (211) held.Metal column (201) is used to connect top surface and metal wire (205) bottom of metal column (101) Face, metal column (202) are used to connect the bottom surface of the top surface and metal wire (207) of metal column (102), and metal column (203) is for connecting Connect the bottom surface of the top surface and metal wire (208) of metal column (103), metal column (204) be used to connect metal column (104) top surface and The bottom surface of metal wire (206).

Fig. 3 is the section schematic diagram of existing silicon hole 300, has metal inside 301 and insulating layer 302 to run through substrate 303 It constitutes.Metal inside 301 can be copper, tungsten or polysilicon.It, can shape between metal inside 301 and substrate 303 to prevent leakage current It is used as insulating layer at layer of oxide layer 302.

Fig. 4 is the equivalent-circuit model of structure of the invention, when the difference that MIM capacitor value C1 is C14 and C13, MIM capacitor value When C2 is the difference of C23 and C24, crosstalk compensation effect is best.

Fig. 5 does not add crosstalk to mend with capacity plate antenna for the present invention as the differential transfer structure of differential crosstalk compensation and generally The transmission characteristic comparison diagram for the differential transfer structure repaid.It can be seen that the differential transfer structure of the present invention can be effective by comparison diagram Reduce the crosstalk between differential pair.

Claims (10)

1. the noise suppressing method in difference silicon hole array, it is characterised in that introduce the side of compensating electric capacity between differential pair structure Method, to reach the crosstalk between reducing differential signal.
2. the noise suppressing method in difference silicon hole array as described in claim 1, it is characterised in that compensating electric capacity uses Capacity plate antenna.
3. differential signal transmission structure, it is characterised in that including top layer dielectric layer setting up and down and base semiconductor substrate layer;
The first, second MIM capacitor is provided in the top layer dielectric layer;First MIM capacitor by setting gradually up and down The first metal top crown, the first MIM capacitor medium, the first metal bottom crown constitute, the second MIM capacitor by setting gradually up and down The second metal top crown, the second MIM capacitor medium, the second metal bottom crown constitute;
Silicon hole there are five being set in the base semiconductor substrate layer up and down;It is filled out by metal column in the silicon hole It fills, is filled by insulating layer between metal column and silicon hole;First metal column, the second metal column form first differential pair knot Structure, third metal column, the 4th metal column form second differential pair structure, are used for transmission differential signal;Fifth metal column conduct Return path;
First metal top crown of first MIM capacitor is connect by metal wire with the first metal column top surface, pole under the first metal Plate is connect by metal wire with the 4th metal column top surface;Second metal top crown of second MIM capacitor passes through metal wire and Three metal column top surfaces connect, and the second metal bottom crown is connect by metal wire with the second metal column top surface.
4. differential signal transmission structure as claimed in claim 3, it is characterised in that the first metal top crown and second The size of metal top crown is identical, and the first metal bottom crown is identical as the size of the second metal bottom crown, the first MIM capacitor medium It is identical as the size of the second MIM capacitor medium.
5. differential signal transmission structure as claimed in claim 3, it is characterised in that the first and second MIM capacitor medium The area of thickness, the first metal polar plate and the second metal polar plate determines the size of MIM capacitor value, the size shadow of MIM capacitor value The inhibition of crosstalk between sound differential signal.
6. differential signal transmission structure as claimed in claim 3, it is characterised in that the diameter of five silicon holes is equal;5th Four metal intercolumnar distances of metal column and other are equal.
7. differential signal transmission structure as claimed in claim 3, it is characterised in that first metal column, fifth metal Column, the 4th metal column three center are located along the same line, the second metal column, fifth metal column, third metal column three center It is located along the same line;
First MIM capacitor is located on the straight line AA ' where the first metal column, fifth metal column, the 4th metal column three center, and Two MIM capacitors are located on the straight line BB ' where the second metal column, fifth metal column, third metal column three center.
8. differential signal transmission structure as claimed in claim 3, it is characterised in that between the first metal column and the second metal column Distance and metal column it is equal with the distance between metal column, the distance between two differential pair structures influence signal cross-talk it is big It is small.
9. differential signal transmission structure as claimed in claim 3, it is characterised in that first MIM capacitor and the first metal column Distance and second MIM capacitor are equal at a distance from the second metal column.
10. differential signal transmission structure as claimed in claim 3, it is characterised in that two MIM capacitors to semiconductor substrate layer The shortest distance of top surface is equal.
CN201810320148.1A 2018-04-11 2018-04-11 Noise suppressing method and its differential signal transmission structure in difference through silicon via array CN108565256B (en)

Priority Applications (1)

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CN201810320148.1A CN108565256B (en) 2018-04-11 2018-04-11 Noise suppressing method and its differential signal transmission structure in difference through silicon via array

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CN201810320148.1A CN108565256B (en) 2018-04-11 2018-04-11 Noise suppressing method and its differential signal transmission structure in difference through silicon via array

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CN108565256B CN108565256B (en) 2019-10-18

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1943286A (en) * 2004-02-13 2007-04-04 莫莱克斯公司 Preferential asymmetric through-hole positoning for printed circuit boards
US20130111745A1 (en) * 2011-11-04 2013-05-09 International Business Machines Corporation Process for providing electrical connections with reduced via capacitance on circuit boards
CN103947055A (en) * 2011-11-23 2014-07-23 泛达公司 Compensation network using an orthogonal compensation

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1943286A (en) * 2004-02-13 2007-04-04 莫莱克斯公司 Preferential asymmetric through-hole positoning for printed circuit boards
US20130111745A1 (en) * 2011-11-04 2013-05-09 International Business Machines Corporation Process for providing electrical connections with reduced via capacitance on circuit boards
CN103947055A (en) * 2011-11-23 2014-07-23 泛达公司 Compensation network using an orthogonal compensation

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